Commit Graph

291248 Commits

Author SHA1 Message Date
Petar Jovanovic 326ec32403 [MIPS GlobalISel] Add lowerCall
Add minimal support to lower function calls.
Support only functions with arguments/return that go through registers
and have type i32.

Patch by Petar Avramovic.

Differential Revision: https://reviews.llvm.org/D45627

llvm-svn: 334071
2018-06-06 07:24:52 +00:00
Ivan Donchevskii 2ebe3a0240 [Frontend] Honor UserFilesAreVolatile flag getting file buffer in ASTUnit
Do not memory map the main file if the flag UserFilesAreVolatile is set to true
in ASTUnit when calling FileSystem::getBufferForFile.

Differential Revision: https://reviews.llvm.org/D47460

llvm-svn: 334070
2018-06-06 07:17:26 +00:00
Eric Fiselier cb5b004a9b Remove unused code from __functional_base. NFC.
Patch from Arthur O'Dwyer.

`__user_alloc_construct_impl` is used by <experimental/memory_resource>, but
this `__user_alloc_construct` is never used.

Also, `<experimental/memory_resource>` doesn't need a full definition of
`std::tuple`; just the forward declaration in `<__tuple>` will suffice.

Reviewed as https://reviews.llvm.org/D46806

llvm-svn: 334069
2018-06-06 06:42:27 +00:00
Petr Hosek fc9b29bd61 [Support] Use zx_cache_flush on Fuchsia to flush instruction cache
Fuchsia doesn't use __clear_cache, instead it provide zx_cache_flush
system call. Use it to flush instruction cache.

Differential Revision: https://reviews.llvm.org/D47753

llvm-svn: 334068
2018-06-06 06:26:18 +00:00
Vlad Tsyrklevich a7d25d5934 [Analyzer][Z3] Test fixes for Z3 constraint manager
Summary:
Since Z3 tests have been not been running [1] some tests needed to be
updated. I also added a regression test for [1].

[1] https://reviews.llvm.org/D47722

Reviewers: george.karpenkov, NoQ, ddcc

Reviewed By: george.karpenkov

Subscribers: mikhail.ramalho, dcoughlin, xazax.hun, szepet, zzheng, a.sidorin, cfe-commits

Differential Revision: https://reviews.llvm.org/D47726

llvm-svn: 334067
2018-06-06 06:25:51 +00:00
Vlad Tsyrklevich 80a764bab1 [Analyzer] Fix the Z3 lit test config
Summary:
The '%analyze' extra_args config argument seems to have been erroneously
deleted in r315627 disabling Z3 tests for the clang analyzer. Add the
flag back.

Reviewers: george.karpenkov, NoQ, ddcc

Reviewed By: george.karpenkov

Subscribers: xazax.hun, szepet, delcypher, a.sidorin, llvm-commits

Differential Revision: https://reviews.llvm.org/D47722

llvm-svn: 334066
2018-06-06 06:25:37 +00:00
Vlad Tsyrklevich 6f8f15fa72 [Analyzer] Fix Z3ConstraintManager crash (PR37646)
Summary:
Fix another Z3ConstraintManager crash, use fixAPSInt() to extend a
boolean APSInt.

Reviewers: george.karpenkov, NoQ, ddcc

Reviewed By: george.karpenkov

Subscribers: xazax.hun, szepet, a.sidorin, cfe-commits

Differential Revision: https://reviews.llvm.org/D47617

llvm-svn: 334065
2018-06-06 06:09:02 +00:00
Dean Michael Berris c561970b27 [XRay][compiler-rt] Refactor recursion guard for Basic and FDR Mode
Summary:
This change extracts the recursion guard implementation from FDR Mode
and updates it to do the following:

- Do the atomic operation correctly to be signal-handler safe.

- Make it usable in both FDR and Basic Modes.

Before this change, the recursion guard relied on an unsynchronised read
and write on a volatile thread-local. A signal handler could then run in
between the read and the write, and then be able to run instrumented
code as part of the signal handling. Using an atomic exchange instead
fixes that by doing a proper mutual exclusion even in the presence of
signal handling.

Reviewers: kpw, eizan, jfb

Reviewed By: eizan

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47696

llvm-svn: 334064
2018-06-06 06:07:48 +00:00
Petr Hosek 8084f91e92 [Fuchsia] Include install-distribution-stripped in bootstrap targets
This enables the use of install-distribution-stripped target in the
2-stage builds.

Differential Revision: https://reviews.llvm.org/D47758

llvm-svn: 334063
2018-06-06 05:18:39 +00:00
Jan Korous 67da1257ee [Sema] Fix parsing of anonymous union in language linkage specification
C++17 [dcl.link]p4:
A linkage specification does not establish a scope.

C++17 [class.union.anon]p2:
Namespace level anonymous unions shall be declared static.

Differential Revision: https://reviews.llvm.org/D45884

rdar://problem/37545925

llvm-svn: 334062
2018-06-06 05:16:34 +00:00
Craig Topper 3942b2e003 [X86] Move the vec_set/vec_ext builtins for 64-bit elements to BuiltinsX86_64.def.
The instructions these correspond to and the intrinsics that use them are only available in 64-bit mode.

llvm-svn: 334061
2018-06-06 04:51:52 +00:00
Reid Kleckner 05df851327 Fix std::tuple errors
llvm-svn: 334060
2018-06-06 01:44:10 +00:00
Reid Kleckner 368d52b7e0 Implement bittest intrinsics generically for non-x86 platforms
I tested these locally on an x86 machine by disabling the inline asm
codepath and confirming that it does the same bitflips as we do with the
inline asm.

Addresses code review feedback.

llvm-svn: 334059
2018-06-06 01:35:08 +00:00
Kostya Serebryany 1fd005f552 [libFuzzer] initial implementation of -data_flow_trace. It parses the data flow trace and prints the summary, but doesn't use the information in any other way yet
llvm-svn: 334058
2018-06-06 01:23:29 +00:00
Craig Topper f3914b74c1 [X86] Add builtins for vector element insert and extract for different 128 and 256 bit vector types. Use them to implement the extract and insert intrinsics.
Previously we were just using extended vector operations in the header file.

This unfortunately allowed non-constant indices to be used with the intrinsics. This is incompatible with gcc, icc, and MSVC. It also introduces a different performance characteristic because non-constant index gets lowered to a vector store and an element sized load.

By adding the builtins we can check for the index to be a constant and ensure its in range of the vector element count.

User code still has the option to use extended vector operations themselves if they need non-constant indexing.

llvm-svn: 334057
2018-06-06 00:24:55 +00:00
Eric Fiselier c797bb23b8 Fix test failures after r334053.
llvm-svn: 334056
2018-06-06 00:13:49 +00:00
Sanjay Patel 59313be8d3 [CodeGen] assume max/default throughput for unspecified instructions
This is a fix for the problem arising in D47374 (PR37678):
https://bugs.llvm.org/show_bug.cgi?id=37678

We may not have throughput info because it's not specified in the model 
or it's not available with variant scheduling, so assume that those
instructions can execute/complete at max-issue-width.

Differential Revision: https://reviews.llvm.org/D47723

llvm-svn: 334055
2018-06-05 23:34:45 +00:00
Craig Topper 6b5b5ce06c [X86] Implement __builtin_ia32_vec_ext_v2si correctly even though we only use it with an index of 0.
This builtin takes an index as its second operand, but the codegen hardcodes an index of 0 and doesn't use the operand. The only use of the builtin in the header file passes 0 to the operand so this works for that usage. But its more correct to use the real operand.

llvm-svn: 334054
2018-06-05 22:40:03 +00:00
Eric Fiselier 8cef7fd75a Fix PR37694 - std::vector doesn't correctly move construct allocators.
C++2a[container.requirements.general]p8 states that when move constructing
a container, the allocator is move constructed. Vector previously copy
constructed these allocators. This patch fixes that bug.

Additionally it cleans up some unnecessary allocator conversions
when copy constructing containers. Libc++ uses
__internal_allocator_traits::select_on_copy_construction to select
the correct allocator during copy construction, but it unnecessarily
converted the resulting allocator to the user specified allocator
type and back. After this patch list and forward_list no longer
do that.

Technically we're supposed to be using allocator_traits<allocator_type>::select_on_copy_construction,
but that should seemingly be addressed as a separate patch, if at all.

llvm-svn: 334053
2018-06-05 22:32:52 +00:00
Amaury Sechet a79b6b3ef0 [Mips] Remove uneeded variants of ADDC/ADDE lowering
Summary: As it turns out, the lowering for the Mips16* family of target is the exact same thing as what the ops expands to, so the code handling them can be removed and the ops only enabled for the MipsSE* family of targets.

Reviewers: smaksimovic, atanasyan, abeserminji

Subscribers: sdardis, arichardson, llvm-commits

Differential Revision: https://reviews.llvm.org/D47703

llvm-svn: 334052
2018-06-05 22:13:56 +00:00
Craig Topper 11899b04a4 [X86] Make __builtin_ia32_vec_ext_v2si require ICE for its index argument. Add warnings for out of range indices for __builtin_ia32_vec_ext_v2si, __builtin_ia32_vec_ext_v4hi, and __builtin_ia32_vec_set_v4hi.
These should take a constant value for an index and that constant should be a valid element number.

llvm-svn: 334051
2018-06-05 21:54:35 +00:00
Guozhi Wei c4c6b548c5 [CodeGenPrepare] Move Extension Instructions Through Logical And Shift Instructions
CodeGenPrepare pass move extension instructions close to load instructions in different BB, so they can be combined later. But the extension instructions can't move through logical and shift instructions in current implementation. This patch enables this enhancement, so we can eliminate more extension instructions.

Differential Revision: https://reviews.llvm.org/D45537

This is re-commit of r331783, which was reverted by r333305. The performance regression was caused by some unlucky alignment, not a code generation problem.

llvm-svn: 334049
2018-06-05 21:03:52 +00:00
Zachary Turner 8ac1c38a72 [FileSystem] Remove OpenFlags param from several functions.
There was only one place in the entire codebase where a non
default value was being passed, and that place was already hidden
in an implementation file.  So we can delete the extra parameter
and all existing clients continue to work as they always have,
while making the interface a bit simpler.

Differential Revision: https://reviews.llvm.org/D47789

llvm-svn: 334046
2018-06-05 19:58:26 +00:00
Matt Arsenault 57e541e87e AMDGPU: Preserve metadata when widening loads
Preserves the low bound of the !range. I don't think
it's legal to do anything with the top half since it's
theoretically reading garbage.

llvm-svn: 334045
2018-06-05 19:52:56 +00:00
Matt Arsenault 9224c00d2b AMDGPU: Use more custom insert/extract_vector_elt lowering
Apply to i8 vectors.

llvm-svn: 334044
2018-06-05 19:52:46 +00:00
Krzysztof Parzyszek b984ffcc71 [Hexagon] Add pattern to generate 64-bit neg instruction
llvm-svn: 334043
2018-06-05 19:52:39 +00:00
Krzysztof Parzyszek d8b093efef [Hexagon] Add more patterns for generating abs/absp instructions
llvm-svn: 334038
2018-06-05 19:00:50 +00:00
Michael Berg 96925fe0df guard fneg with fmf sub flags
Summary: This change uses fmf subflags to guard optimizations as well as unsafe. These changes originated from D46483.

Reviewers: spatel, hfinkel

Reviewed By: spatel

Subscribers: nemanjai

Differential Revision: https://reviews.llvm.org/D47389

llvm-svn: 334037
2018-06-05 18:49:47 +00:00
Vitaly Buka b89704fa6f [lsan] Do not check for leaks in the forked process
Summary:
If calling process had threads then forked process will fail to detect
references from them.

Fixes https://github.com/google/sanitizers/issues/836

Reviewers: alekseyshl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47751

llvm-svn: 334036
2018-06-05 18:15:57 +00:00
Michael Berg 8f6d6c817d NFC: adding baseline fneg case for fmf
llvm-svn: 334035
2018-06-05 18:12:25 +00:00
Alex Shlyapnikov 236c3f9c4a [LSan] Report proper error on allocator failures instead of CHECK(0)-ing
Summary:
Following up on and complementing D44404.

Currently many allocator specific errors (OOM, for example) are reported as
a text message and CHECK(0) termination, not stack, no details, not too
helpful nor informative. To improve the situation, detailed and
structured errors were defined and reported under the appropriate conditions.

Reviewers: eugenis

Subscribers: srhines, mgorny, delcypher, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D47645

llvm-svn: 334034
2018-06-05 18:02:09 +00:00
Sam McCall 89f529356a [clangd] Fix inverted test again, sigh
llvm-svn: 334033
2018-06-05 18:00:48 +00:00
Sam McCall 661d89c324 [clangd] Quality fixes (uninit var, missing debug output, pattern decl CCRs).
llvm-svn: 334032
2018-06-05 17:58:12 +00:00
Simon Dardis 0d95ff03f2 [mips] Fix the predicates for arithmetic operations
Reviewers: smaksimovic, atanasyan, abeserminji

Differential Revision: https://reviews.llvm.org/D47635

llvm-svn: 334031
2018-06-05 17:53:22 +00:00
Aaron Smith a642f8f343 PDB support of function-level linking and splitted functions
Summary:
The patch adds support of splitted functions (when MSVC is used with PGO) and function-level linking feature.

SymbolFilePDB::ParseCompileUnitLineTable function relies on fact that ranges of compiled source files in the binary are continuous and don't intersect each other. The function creates LineSequence for each file and inserts it into LineTable, and implementation of last one relies on continuity of the sequence. But it's not always true when function-level linking enabled, e.g. in added input test file test-pdb-function-level-linking.exe there is xstring's std__basic_string_char_std__char_traits_char__std__allocator_char_____max_size (.00454820) between test-pdb-function-level-linking.cpp's foo (.00454770) and main (.004548F0).

To fix the problem this patch renews the sequence on each address gap.

Reviewers: asmith, zturner

Reviewed By: asmith

Subscribers: mgorny, lldb-commits

Differential Revision: https://reviews.llvm.org/D47708

llvm-svn: 334030
2018-06-05 17:19:21 +00:00
Greg Bedwell a9a6d54146 [UpdateTestChecks] Error if --llvm-mca-binary gets an empty string
If the command line was mistyped like:
./update_mca_test_checks.py --llvm-mca-binary= /path/to/llvm-mca *.s
                                              ^-- extra whitespace

then /path/to/llvm-mca would get treated by argparse as a test-path
pattern and could actually be opened in write mode and overwritten.

llvm-svn: 334029
2018-06-05 17:16:19 +00:00
Andrea Di Biagio 757600bccb [llvm-mca] Correctly update the CyclesLeft of a register read in the presence of partial register updates.
This patch fixe the logic in ReadState::cycleEvent(). That method was not
correctly updating field `TotalCycles`.

Added extra code comments in class ReadState to better describe each field.

llvm-svn: 334028
2018-06-05 17:12:02 +00:00
Fangrui Song c581e567b3 Remove a self-referencing #include
llvm-svn: 334027
2018-06-05 16:59:40 +00:00
Sam McCall d9b54f0025 [clangd] Boost code completion results that are narrowly scoped (local, members)
Summary:
This signal is considered a relevance rather than a quality signal because it's
dependent on the query (the fact that it's completion, and implicitly the query
context).

This is part of the effort to reduce reliance on Sema priority, so we can have
consistent ranking between Index and Sema results.

Reviewers: ioeric

Subscribers: klimek, ilya-biryukov, MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D47762

llvm-svn: 334026
2018-06-05 16:30:25 +00:00
Stella Stamenova f2c14af389 [lit, pdb] Fix func-symbols.test (on Windows)
Summary: This test was failing sporadically on windows because the order in which the symbols are generated was different between builds. To fix the test, we need to run FileCheck twice - once for each set of symbols we want to verify. The test only runs on Windows.

Reviewers: asmith, zturner, labath

Subscribers: stella.stamenova, llvm-commits

Differential Revision: https://reviews.llvm.org/D47746

llvm-svn: 334025
2018-06-05 16:20:36 +00:00
Rui Ueyama 66f28f7cd9 Do not show unrelated "-m is missing" error message.
Previously, "-m is missing" error message is shown if you pass a
nonexistent file or don't pass any file at all to lld, as shown below:

  $ ld.lld nonexistent.o
  ld.lld: error: cannot open nonexistent.o: No such file or directory
  ld.lld: error: target emulation unknown: -m or at least one .o file required

This patch eliminates the second error message because it's not related
and even inaccurate (you passed a .o file though it didn't exist).

llvm-svn: 334024
2018-06-05 16:13:40 +00:00
Simon Pilgrim f2f043acbb [X86][SSE] Use multiplication scale factors for v8i16 SHL on pre-AVX2 targets.
Similar to v4i32 SHL, convert v8i16 shift amounts to scale factors instead to improve performance and reduce instruction count. We were already doing this for constant shifts, this adds variable shift support.

Reduces the serial nature of the codegen, which relies on chains of plendvb/pand+pandn+por shifts.

This is a step towards adding support for vXi16 vector rotates.

Differential Revision: https://reviews.llvm.org/D47546

llvm-svn: 334023
2018-06-05 15:17:39 +00:00
Nirav Dave 05b589101e [MC][X86] Allow assembler variable assignment to register name.
Summary:
Allow extended parsing of variable assembler assignment syntax and modify X86 to permit
VAR = register assignment. As we emit these as .set directives when possible, we inline
such expressions in output assembly.

Fixes PR37425.

Reviewers: rnk, void, echristo

Reviewed By: rnk

Subscribers: nickdesaulniers, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D47545

llvm-svn: 334022
2018-06-05 15:13:39 +00:00
Yaxun Liu 6328f9a988 [CUDA][HIP] Do not emit type info when compiling for device
CUDA/HIP does not support RTTI on device side, therefore there
is no point of emitting type info when compiling for device.

Emitting type info for device not only clutters the IR with useless
global variables, but also causes undefined symbol at linking
since vtable for cxxabiv1::class_type_info has external linkage.

Differential Revision: https://reviews.llvm.org/D47694

llvm-svn: 334021
2018-06-05 15:11:02 +00:00
Matt Arsenault 191bc71541 DAG: Stop dropping invariant/dereferencable
When legalizing illegal FP load results, this was
for some reason dropping the invariant and dereferencable
memory flags. There doesn't seem to be any reason for this,
and the equivalent isn't done for integer loads.

Fixes an issue in a future AMDGPU commit where some identical
loads fail to merge because one of the loads ends up
dropping the flags.

llvm-svn: 334020
2018-06-05 14:52:24 +00:00
John Brawn e4ff0bd401 [InstCombine] Correct the cmp operand type used when canonicalizing abs/nabs
When adjusting a cmp in order to canonicalize an abs/nabs select pattern we need
to use the type of the existing operand when creating a new operand not the
type of a select operand, as the two may be different.

This fixes PR37686.

llvm-svn: 334019
2018-06-05 14:10:55 +00:00
Marc-Andre Laperle d41bc70094 [clangd] Remove unused variables
Summary: Signed-off-by: Marc-Andre Laperle <marc-andre.laperle@ericsson.com>

Subscribers: klimek, ilya-biryukov, ioeric, MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D47737

llvm-svn: 334018
2018-06-05 14:07:45 +00:00
Marc-Andre Laperle 945b5a3df0 [clangd] Add "member" symbols to the index
Summary:
This adds more symbols to the index:
- member variables and functions
- enum constants in scoped enums

The code completion behavior should remain intact but workspace symbols should
now provide much more useful symbols.
Other symbols should be considered such as the ones in "main files" (files not
being included) but this can be done separately as this introduces its fair
share of problems.

Signed-off-by: Marc-Andre Laperle <marc-andre.laperle@ericsson.com>

Reviewers: ioeric, sammccall

Reviewed By: ioeric, sammccall

Subscribers: hokein, sammccall, jkorous, klimek, ilya-biryukov, jkorous-apple, ioeric, MaskRay, cfe-commits

Differential Revision: https://reviews.llvm.org/D44954

llvm-svn: 334017
2018-06-05 14:01:40 +00:00
Gabor Buella 1181f94ae4 [X86] NFC Fix typo introduced in r328016 HSI->HDI
llvm-svn: 334016
2018-06-05 12:55:12 +00:00
Krzysztof Parzyszek aafb8c204c [Hexagon] Minor cleanups in isel lowering
llvm-svn: 334015
2018-06-05 12:49:19 +00:00