Commit Graph

956 Commits

Author SHA1 Message Date
Sirish Pande f4db4b2cb4 Remove iostream from New Value Jump.
llvm-svn: 154703
2012-04-13 21:01:35 +00:00
Sirish Pande 0e6e36d1d0 Add support for Hexagon Architectural feature, New Value Jump.
llvm-svn: 154696
2012-04-13 20:22:31 +00:00
Sirish Pande a8071a0f88 Pass to replace tranfer/copy instructions into combine instruction where possible.
llvm-svn: 154695
2012-04-13 20:22:19 +00:00
Craig Topper eb455832b4 Silence various build warnings from Hexagon backend that show up in release builds. Mostly converting 'assert(0)' to 'llvm_unreachable' to silence warnings about missing returns. Also fold some variable declarations into asserts to prevent the variables from being unused in release builds.
llvm-svn: 154660
2012-04-13 06:38:11 +00:00
Ted Kremenek 967aaa956f Update CMake build.
llvm-svn: 154622
2012-04-12 22:15:23 +00:00
Evandro Menezes 6a6a66e313 Hexagon: fix CMake error.
llvm-svn: 154620
2012-04-12 21:44:58 +00:00
Sirish Pande b486144c12 HexagonPacketizer patch.
llvm-svn: 154616
2012-04-12 21:06:38 +00:00
Evandro Menezes 5cee621c88 Hexagon: enable assembler output through the MC layer.
llvm-svn: 154597
2012-04-12 17:55:53 +00:00
Craig Topper 1fcf5bcae1 Prune some includes
llvm-svn: 153502
2012-03-27 07:54:11 +00:00
Craig Topper 7da2aa24c2 Remove some unnecessary forward declarations.
llvm-svn: 153245
2012-03-22 06:52:14 +00:00
Craig Topper b25fda95f6 Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
llvm-svn: 152997
2012-03-17 18:46:09 +00:00
Craig Topper f3f6650f8f Fix some copy and paste remnants of Cell and SPU in Hexagon files.
llvm-svn: 152981
2012-03-17 09:39:20 +00:00
Craig Topper bc3168b128 Fix typo in file header.
llvm-svn: 152980
2012-03-17 09:28:37 +00:00
Craig Topper b545408116 Pass TargetOptions to HexagonTargetMachine constructor by reference to match other targets and the base class.
llvm-svn: 152979
2012-03-17 09:24:09 +00:00
Craig Topper bef78fc2ee Convert more static tables of registers used by calling convention to uint16_t to reduce space.
llvm-svn: 152538
2012-03-11 07:57:25 +00:00
Craig Topper 4b02a29eba Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.
llvm-svn: 152016
2012-03-05 05:37:41 +00:00
Craig Topper 1d32658877 Use uint16_t to store register overlaps to reduce static data.
llvm-svn: 152001
2012-03-04 10:43:23 +00:00
Craig Topper 420525ce3b Use uint16_t to store registers in callee saved register tables to reduce size of static data.
llvm-svn: 151996
2012-03-04 03:33:22 +00:00
Evan Cheng 65f9d19c4f Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call.
llvm-svn: 151645
2012-02-28 18:51:51 +00:00
Daniel Dunbar ee7b899343 Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack prediction. ...", it is breaking the Clang build during the Compiler-RT part.
llvm-svn: 151630
2012-02-28 15:36:07 +00:00
Evan Cheng 87c7b09d8d Some ARM implementaions, e.g. A-series, does return stack prediction. That is,
the processor keeps a return addresses stack (RAS) which stores the address
and the instruction execution state of the instruction after a function-call
type branch instruction.

Calling a "noreturn" function with normal call instructions (e.g. bl) can
corrupt RAS and causes 100% return misprediction so LLVM should use a
unconditional branch instead. i.e.
mov lr, pc
b _foo
The "mov lr, pc" is issued in order to get proper backtrace.

rdar://8979299

llvm-svn: 151623
2012-02-28 06:42:03 +00:00
Evandro Menezes cf95bb758c Delete incorrect reference to inexistent Hexagon architecture manuals.
llvm-svn: 151582
2012-02-27 23:00:52 +00:00
Craig Topper 317640dfd0 Remove HexagonGenIntrinsics.inc from Hexagon cmake file. It does not appear in the Makefile and the output it produces isn't used. The Hexagon intrinsics are all in the global Intrinsics.gen.
llvm-svn: 151514
2012-02-27 02:59:43 +00:00
Benjamin Kramer 9fceb90175 Remove unused cl::opt, make another opt static.
llvm-svn: 151398
2012-02-24 22:09:25 +00:00
Brendon Cahoon d5d166d4d4 Fix the numbering of some of the registers and reclassify a couple of them.
Also, some basic clean up.  Patch by Evandro Menezes.

llvm-svn: 151266
2012-02-23 18:17:17 +00:00
Sirish Pande 2a783d5b94 Efficient pattern for store truncate. Patch by Evandro Menezes.
llvm-svn: 151166
2012-02-22 16:45:10 +00:00
Jia Liu b22310fda6 Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
llvm-svn: 150878
2012-02-18 12:03:15 +00:00
Sirish Pande 30804c24ca Optimize redundant sign extends and negation of predicates.
llvm-svn: 150606
2012-02-15 18:52:27 +00:00
Eric Christopher 53da633f93 Revert "Replacing HexagonOptimizeSZExtends with HexagonPeephole."
This reverts commit 1656806a944bbd23e98c6e578810fe02495ab741.

llvm-svn: 150605
2012-02-15 18:34:25 +00:00
Eric Christopher d9811eb7be Revert "Optimize redundant sign extends and negation of predicates"
as it's breaking the build.

This reverts commit 11241abca5e2a313412fed594bb9d9fa2a2057fb.

llvm-svn: 150604
2012-02-15 18:32:25 +00:00
Sirish Pande 99571325f1 Replacing HexagonOptimizeSZExtends with HexagonPeephole.
llvm-svn: 150603
2012-02-15 18:31:35 +00:00
Sirish Pande 4736aee81e Optimize redundant sign extends and negation of predicates
llvm-svn: 150601
2012-02-15 18:22:18 +00:00
Sirish Pande 545983ea46 Test for commit access.
llvm-svn: 150178
2012-02-09 15:20:33 +00:00
Andrew Trick 1fa5bcbe2a Codegen pass definition cleanup. No functionality.
Moving toward a uniform style of pass definition to allow easier target configuration.
Globally declare Pass ID.
Globally declare pass initializer.
Use INITIALIZE_PASS consistently.
Add a call to the initializer from CodeGen.cpp.
Remove redundant "createPass" functions and "getPassName" methods.

While cleaning up declarations, cleaned up comments (sorry for large diff).

llvm-svn: 150100
2012-02-08 21:23:13 +00:00
Brendon Cahoon 6f35837048 Use TSFlag bit to describe instruction properties.
Creating the isPredicated TSFlag enables the code
to use the property defined in the instruction format
instead of using a large switch statement.

llvm-svn: 150078
2012-02-08 18:25:47 +00:00
Craig Topper e55c556a24 Convert assert(0) to llvm_unreachable
llvm-svn: 149961
2012-02-07 02:50:20 +00:00
Benjamin Kramer ae87d7b4b2 Hexagon: Remove forbidden iostream includes (it introduces static initializers)
Reorder includes while at it.

llvm-svn: 149863
2012-02-06 10:19:29 +00:00
Craig Topper c4965bce14 Convert assert(0) to llvm_unreachable
llvm-svn: 149814
2012-02-05 07:21:30 +00:00
Andrew Trick f8ea108c05 TargetPassConfig: confine the MC configuration to TargetMachine.
Passes prior to instructon selection are now split into separate configurable stages.
Header dependencies are simplified.
The bulk of this diff is simply removal of the silly DisableVerify flags.

Sorry for the target header churn. Attempting to stabilize them.

llvm-svn: 149754
2012-02-04 02:56:59 +00:00
Andrew Trick ccb673659a Added TargetPassConfig. The first little step toward configuring codegen passes.
Allows command line overrides to be centralized in LLVMTargetMachine.cpp.
LLVMTargetMachine can intercept common passes and give precedence to command line overrides.
Allows adding "internal" target configuration options without touching TargetOptions.
Encapsulates the PassManager.
Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs.
Allows modifying the target configuration hooks without rebuilding the world.

llvm-svn: 149672
2012-02-03 05:12:41 +00:00
Rafael Espindola 77295818f0 Fix the cmake build
llvm-svn: 149561
2012-02-01 23:40:51 +00:00
Andrew Trick d06df96a7c VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).
This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.

Patch by Sergei Larin!

llvm-svn: 149547
2012-02-01 22:13:57 +00:00
David Blaikie 46a9f016c5 More dead code removal (using -Wunreachable-code)
llvm-svn: 148578
2012-01-20 21:51:11 +00:00
Jakob Stoklund Olesen f43b599550 Add a CoveredBySubRegs property to Register descriptions.
When set, this bit indicates that a register is completely defined by
the value of its sub-registers.

Use the CoveredBySubRegs property to infer which super-registers are
call-preserved given a list of callee-saved registers.  For example, the
ARM registers D8-D15 are callee-saved.  This now automatically implies
that Q4-Q7 are call-preserved.

Conversely, Win64 callees save XMM6-XMM15, but the corresponding
YMM6-YMM15 registers are not call-preserved because they are not fully
defined by their sub-registers.

llvm-svn: 148363
2012-01-18 00:16:39 +00:00
Chad Rosier 64dc8aa44f Initializing to false makes better sense. Thanks, David.
llvm-svn: 147679
2012-01-06 20:11:59 +00:00
Chad Rosier 6b64c3c683 Fix uninitialized variable warning.
llvm-svn: 147675
2012-01-06 19:59:58 +00:00
Benjamin Kramer b668401b2e Clean up some Release build warnings.
llvm-svn: 147289
2011-12-27 11:41:05 +00:00
Benjamin Kramer 32481916eb Hexagon: Remove unused variables.
llvm-svn: 146846
2011-12-18 12:00:09 +00:00
Benjamin Kramer 9ca2e7293b Hexagon: Fix a nasty order-of-initialization bug.
Reenable the tests.

llvm-svn: 146750
2011-12-16 19:08:59 +00:00
NAKAMURA Takumi 93d990bd61 Target/Hexagon: Fix CMake build.
llvm-svn: 146724
2011-12-16 06:21:02 +00:00
Tony Linthicum b3705e0b9e Add MCTargetDesc library to Hexagon target
llvm-svn: 146692
2011-12-15 22:29:08 +00:00
Chandler Carruth 637cc6a8aa Initial CodeGen support for CTTZ/CTLZ where a zero input produces an
undefined result. This adds new ISD nodes for the new semantics,
selecting them when the LLVM intrinsic indicates that the undef behavior
is desired. The new nodes expand trivially to the old nodes, so targets
don't actually need to do anything to support these new nodes besides
indicating that they should be expanded. I've done this for all the
operand types that I could figure out for all the targets. Owners of
various targets, please review and let me know if any of these are
incorrect.

Note that the expand behavior is *conservatively correct*, and exactly
matches LLVM's current behavior with these operations. Ideally this
patch will not change behavior in any way. For example the regtest suite
finds the exact same instruction sequences coming out of the code
generator. That's why there are no new tests here -- all of this is
being exercised by the existing test suite.

Thanks to Duncan Sands for reviewing the various bits of this patch and
helping me get the wrinkles ironed out with expanding for each target.
Also thanks to Chris for clarifying through all the discussions that
this is indeed the approach he was looking for. That said, there are
likely still rough spots. Further review much appreciated.

llvm-svn: 146466
2011-12-13 01:56:10 +00:00
NAKAMURA Takumi 4ea3c8f54a Target/Hexagon: Fix CMake build. We don't use add_llvm_library_dependencies().
llvm-svn: 146457
2011-12-13 00:36:04 +00:00
Daniel Dunbar 8889bb08b8 LLVMBuild: Introduce a common section which currently has a list of the
subdirectories to traverse into.
 - Originally I wanted to avoid this and just autoscan, but this has one key
   flaw in that new subdirectories can not automatically trigger a rerun of the
   llvm-build tool. This is particularly a pain when switching back and forth
   between trees where one has added a subdirectory, as the dependencies will
   tend to be wrong. This will also eliminates FIXME implicitly.

llvm-svn: 146436
2011-12-12 22:45:54 +00:00
Tony Linthicum 36e0519ca2 fix warning
llvm-svn: 146420
2011-12-12 21:52:59 +00:00
Tony Linthicum 1213a7a57f Hexagon backend support
llvm-svn: 146412
2011-12-12 21:14:40 +00:00