8e861d7eee
Simplify the loop in StrChrOptimizer. FileCheckize test.
...
llvm-svn: 115095
2010-09-29 22:29:12 +00:00
b024be3162
Add a convenience variable so I'm not chasing all over looking for
...
a context.
llvm-svn: 115094
2010-09-29 22:24:45 +00:00
824645abc9
Teach SimplifyLibCalls how to optimize strrchr.
...
llvm-svn: 115091
2010-09-29 21:50:51 +00:00
cb03b14089
Add support to let FE encode method access specifier.
...
llvm-svn: 115089
2010-09-29 21:44:16 +00:00
95ae73c394
Generalize DISubprogram element to encode various flags instead of just one boolean for isArtificial.
...
This is a backword compatible change.
llvm-svn: 115084
2010-09-29 21:04:46 +00:00
0cd522428c
UnreachableBlockElim could incorrectly return false when it had not modified the CFG, but HAD modified some PHI nodes. Fixes PR8174.
...
llvm-svn: 115083
2010-09-29 20:57:19 +00:00
99c985c37d
Fix PR8247: JumpThreading can cause a block to become unreachable while still having predecessor, if it is part of a self-loop.
...
Because of this, we cannot use the Simplify* APIs, as they can assert-fail on unreachable code. Since it's not easy to determine
if a given threading will cause a block to become unreachable, simply defer simplifying simplification to later InstCombine and/or
DCE passes.
llvm-svn: 115082
2010-09-29 20:34:41 +00:00
923a8cf356
Remove PointerTracking from cmakelists …
...
llvm-svn: 115076
2010-09-29 19:39:50 +00:00
a1bd5a1fad
Assign DW_ACCESS_public accessibility attribute to members by default.
...
llvm-svn: 115067
2010-09-29 19:08:08 +00:00
0860520527
Add specializations of addrmode2 that allow differentiating those forms
...
which require the use of the shifter-operand. This will be used to split
the ldr/str instructions such that those versions needing the shifter operand
can get a different scheduling itenerary, as in some cases, the use of the
shifter can cause different scheduling than the simpler forms.
llvm-svn: 115066
2010-09-29 19:03:54 +00:00
23ebf4b319
Add parens to fix GCC warning:
...
lib/Target/X86/X86MCCodeEmitter.cpp: 190: error: suggest parentheses around '&&' within '||'
llvm-svn: 115064
2010-09-29 18:56:57 +00:00
af995f0ee5
remove PointerTracking from mainline, Edwin is going to move it out to ClamAV
...
for LLVM 2.9
llvm-svn: 115062
2010-09-29 18:43:27 +00:00
2b43c1cf42
implement rdar://8491845 - Gas supports commuted forms of non-commutable instructions.
...
llvm-svn: 115061
2010-09-29 18:39:16 +00:00
d67ca0ed4c
Revert r114919, which caused some serious regressions on ARM.
...
llvm-svn: 115053
2010-09-29 18:05:19 +00:00
97bf273870
Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.
...
LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned. Radar 8489376.
llvm-svn: 115047
2010-09-29 17:54:10 +00:00
c7b10f3745
Add braces for legibility.
...
llvm-svn: 115043
2010-09-29 17:32:29 +00:00
05eccf0e44
One Printer to rule them all, One Printer to find them,
...
One Printer to lower them all and in the back end bind them.
(Remove option to use the old non-MC asm printer.)
llvm-svn: 115038
2010-09-29 15:23:40 +00:00
53f0bf194a
Move "local commons" to the end of .bss to match the gnu as behavior.
...
llvm-svn: 115037
2010-09-29 14:52:01 +00:00
d36e3e8850
improve heuristics to find the 'and' corresponding to 'tst' to also catch opportunities on thumb2
...
added some doxygen on the way
llvm-svn: 115033
2010-09-29 10:12:08 +00:00
8f7851d2b4
fix rdar://8490728 - llvm-mc rejects gpr64 form of 'movmskpd'
...
llvm-svn: 115029
2010-09-29 05:05:03 +00:00
52e6020883
add assembler support for the cvtsd2sil/cvtsd2siq mnemonics, rdar://8456382
...
llvm-svn: 115027
2010-09-29 04:55:40 +00:00
5da7f9fcfd
make the x86 mccode emitter emit the 0x67 and 0x66 prefix bytes in the same
...
order as cctools for diffability.
llvm-svn: 115022
2010-09-29 03:43:43 +00:00
a4e1c74947
implement support for 32-bit address operands in 64-bit mode, which
...
are defined to emit the 0x67 prefix byte. rdar://8482675
llvm-svn: 115021
2010-09-29 03:33:25 +00:00
86a6222469
MC-COFF: Fix symbol storage class for globals
...
llvm-svn: 115020
2010-09-29 03:13:41 +00:00
f60062fd55
add basic avx support to the disassembler, also teach it about ssmem/sdmem
...
operands.
With this done, we can remove the _Int suffixes from the round instructions
without the disassembler blowing up. This allows the assembler to support
them, implementing rdar://8456376 - llvm-mc rejects 'roundss'
llvm-svn: 115019
2010-09-29 02:57:56 +00:00
ff3a3930a0
add asmparser support for cvttpd2dq by removing some Int_ prefixes.
...
Clean up cvttps2dq by removing some redundant implementations of the
same instruction. rdar://8456382
llvm-svn: 115018
2010-09-29 02:36:32 +00:00
ef1c2fc305
implement rdar://8456382 - cvtsd2si support, by removing some Int_ prefixes.
...
llvm-svn: 115017
2010-09-29 02:24:57 +00:00
a63292a3ca
implement rdar://8456378 and PR7557 - support for the fstsw,
...
an instruction that requires a WHOLE NEW wonderful kind of alias.
llvm-svn: 115015
2010-09-29 01:50:45 +00:00
b44fd24fc1
change the protocol TargetAsmPArser::MatchInstruction method to take an
...
MCStreamer to emit into instead of an MCInst to fill in. This allows the
matcher extra flexibility and is more convenient.
llvm-svn: 115014
2010-09-29 01:42:58 +00:00
3a7e8cd6bd
Rework comparison handling to set a register on true/false. This avoids
...
problems with phi-nodes in blocks that have hard and not virtual registers.
Accordingly update branch handling to compensate.
llvm-svn: 115013
2010-09-29 01:14:47 +00:00
edd4b600f3
Remove unnecessary set ahead of time.
...
llvm-svn: 115011
2010-09-29 00:50:57 +00:00
2259d67a33
Separate itinerary classes for mvn from mov; for tst / teq from cmp / cmn.
...
llvm-svn: 115010
2010-09-29 00:49:25 +00:00
2c8e7f421c
Remove assert, add comment.
...
llvm-svn: 115009
2010-09-29 00:49:09 +00:00
c35d7bbe43
Assign bitwise binary instructions different itinerary classes from ALU instructions such as add / sub.
...
llvm-svn: 115008
2010-09-29 00:27:46 +00:00
0097dd0d5a
Add support to model pipeline bypass / forwarding.
...
llvm-svn: 115005
2010-09-28 23:50:49 +00:00
b0b2c57149
Revert r114997. It was causing a failure on darwin10-selfhost.
...
llvm-svn: 115002
2010-09-28 23:11:55 +00:00
a86a6d2fed
32-bit constant ints only for now.
...
llvm-svn: 115001
2010-09-28 22:47:54 +00:00
b4b12535e8
Removed a bunch of unnecessary target_link_libraries.
...
llvm-svn: 114999
2010-09-28 22:39:14 +00:00
d848beb1e5
Fix a FIXME. _foo.eh symbols are currently always exported so that the linker
...
knows about them. This is not necessary on 10.6 and later.
llvm-svn: 114997
2010-09-28 22:36:56 +00:00
25a7bc9081
When an MDNode changes to become identical to another MDNode,
...
delete the MDNode that changed, rather than the other MDNode.
This is less work, because it doesn't require the changed node
to be re-inserted into the uniquing map and it doesn't require
the is-function-local flag to be recomputed. Also, it avoids
trouble when the existing node is part of a complicated
data structure.
llvm-svn: 114996
2010-09-28 22:07:19 +00:00
a3181e2d79
Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise
...
cost modeling for if-conversion. Now if only we had a way to estimate the misprediction probability.
Adjsut CodeGen/ARM/ifcvt10.ll. The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.
llvm-svn: 114995
2010-09-28 21:57:50 +00:00
953b1afd5f
Integer materialization needed the same thinko change.
...
llvm-svn: 114994
2010-09-28 21:55:34 +00:00
7d483d352b
Resolve this GCC warning:
...
ARMTargetMachine.cpp:53: error: control reaches end of non-void function
llvm-svn: 114992
2010-09-28 21:40:26 +00:00
81bdc93bbb
User proper libcall names & condcodes while compiling for ARM EABI.
...
Patch by Evzen Muller!
llvm-svn: 114991
2010-09-28 21:39:26 +00:00
1a450c61f3
Scope a varible inside an if statement, to make it clear that
...
it's not used afterwards.
llvm-svn: 114986
2010-09-28 21:02:55 +00:00
1b35f4cc66
Give the if-converter access to MachineLoopInfo, and use it to generate plausible branch prediction
...
estimates.
llvm-svn: 114981
2010-09-28 20:42:15 +00:00
a349ed0693
Fix spelling.
...
llvm-svn: 114974
2010-09-28 18:54:43 +00:00
88af7d00fc
Part one of switching to using a more sane heuristic for determining if-conversion profitability.
...
Rather than having arbitrary cutoffs, actually try to cost model the conversion.
For now, the constants are tuned to more or less match our existing behavior, but these will be
changed to reflect realistic values as this work proceeds.
llvm-svn: 114973
2010-09-28 18:32:13 +00:00
5154ee0bca
Make ConstantRange::makeICmpRegion handle all the edge cases properly. This
...
also fixes PR8250.
llvm-svn: 114972
2010-09-28 18:18:36 +00:00
7a55481fa4
Provide an interface to let FEs anchor debug info for types.
...
llvm-svn: 114969
2010-09-28 18:08:20 +00:00
45c83d496f
Factor out dbg_value comment printing and teach MC asm printing to use it.
...
This should make the arm-linux self-host buildbot happy again.
llvm-svn: 114964
2010-09-28 17:05:56 +00:00
01d20a76fe
On elf, undefined symbols can start with .L.
...
llvm-svn: 114958
2010-09-28 16:19:11 +00:00
cd43c696c9
Use the canonical library name for library PIC16Passes.
...
llvm-svn: 114953
2010-09-28 14:24:47 +00:00
0fcb8c688d
Added library LLVMPIC16passes to CMake build.
...
llvm-svn: 114952
2010-09-28 14:02:45 +00:00
3da4255d07
Add ARM Disassembler to the CMake build.
...
llvm-svn: 114949
2010-09-28 11:48:19 +00:00
e084cff9aa
Remove trailing spaces of MipsMachineFunction.h
...
llvm-svn: 114948
2010-09-28 10:06:53 +00:00
bb033893ca
Remove trailing spaces of MipsTargetObjectFile.cpp
...
llvm-svn: 114947
2010-09-28 09:55:24 +00:00
bf86fd3c47
80-col fixups.
...
llvm-svn: 114943
2010-09-28 04:18:29 +00:00
3dc97324c1
Add a command line option "-arm-strict-align" to disallow unaligned memory
...
accesses for ARM targets that would otherwise allow it. Radar 8465431.
llvm-svn: 114941
2010-09-28 04:09:35 +00:00
7990df1ae2
Rework builtin handling and call setup. The builtin handling
...
now takes a libcall operand, sets up the arguments correctly and
handles stack adjustments.
llvm-svn: 114934
2010-09-28 01:21:42 +00:00
e68635acdb
Fix typo.
...
llvm-svn: 114931
2010-09-28 00:35:33 +00:00
6f98bfd870
Fix fp constant loads to have a destination register.
...
llvm-svn: 114930
2010-09-28 00:35:09 +00:00
185051cb8e
Remove dead argument.
...
llvm-svn: 114920
2010-09-27 23:15:27 +00:00
9c93fd5598
Weight loop unrolling counts by nesting depth. Unrolling deeply nested loops tends to cause high
...
register pressure and thus excess spills, which we don't currently recover from well. This should
be re-evaluated in the future if our ability to generate good spills/splits improves.
Partial fix for <rdar://problem/7635585>.
llvm-svn: 114919
2010-09-27 22:58:54 +00:00
175d6411c8
Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to
...
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.
llvm-svn: 114915
2010-09-27 22:28:11 +00:00
96bfb50c03
Write relocations in the end of the file. This matches what gas does and
...
makes files easier to diff.
llvm-svn: 114898
2010-09-27 22:04:54 +00:00
9e9ed98305
ARM-mode eh.sjlj.longjmp MC lowering
...
llvm-svn: 114896
2010-09-27 21:47:04 +00:00
9ca41113f6
Make sure .text doesn't produce extra alignment.
...
llvm-svn: 114895
2010-09-27 21:40:27 +00:00
1083573796
Don't try to constant fold libm functions with non-finite arguments.
...
Usually we wouldn't do this anyway because llvm_fenv_testexcept would return an
exception, but we have seen some cases where neither errno nor fenv detect an
exception on arm-linux.
llvm-svn: 114893
2010-09-27 21:29:20 +00:00
11fed543c9
Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to
...
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.
llvm-svn: 114892
2010-09-27 21:28:44 +00:00
9735f4ff8d
Factor symbol value computation into a function.
...
llvm-svn: 114891
2010-09-27 21:23:02 +00:00
ce2e535b19
MC-COFF: Fix signed/unsigned comparison.
...
llvm-svn: 114888
2010-09-27 21:17:39 +00:00
6b2aaf1a36
Hard to imagine there are still people using inferior compilers.
...
llvm-svn: 114862
2010-09-27 20:12:58 +00:00
d116d8a4e9
MC/AsmParser: Handle exponents in floating point literals.
...
llvm-svn: 114861
2010-09-27 20:12:52 +00:00
415a7a6fec
Revert "Disable codegen prepare critical edge splitting. Machine instruction passes now"
...
This reverts revision 114633. It was breaking llvm-gcc-i386-linux-selfhost.
It seems there is a downstream bug that is exposed by
-cgp-critical-edge-splitting=0. When that bug is fixed, this patch can go back
in.
Note that the changes to tailcallfp2.ll are not reverted. They were good are
required.
llvm-svn: 114859
2010-09-27 18:43:48 +00:00
69aa15155f
Odd additional stub framework for the ARM MC ELF emission.
...
llc now recognizes the "intent" to support MC/obj emission for ARM, but
given that they are all stubs, it asserts on --filetype=obj --march=arm
Patch by Jason Kim.
llvm-svn: 114856
2010-09-27 18:31:37 +00:00
cceded493f
Remove unused argument.
...
llvm-svn: 114852
2010-09-27 18:13:03 +00:00
c758311025
Push twines deeper into SourceMgr's error handling methods.
...
llvm-svn: 114847
2010-09-27 17:42:11 +00:00
786874de82
MMX parameters aren't handled here yet.
...
llvm-svn: 114844
2010-09-27 17:29:47 +00:00
117f7708c4
Don't try to make a vector of x86mmx; this won't work,
...
and asserts.
llvm-svn: 114843
2010-09-27 17:29:14 +00:00
16ef49686c
Delete an unused function.
...
llvm-svn: 114841
2010-09-27 16:58:21 +00:00
ca8ebc8de2
Delete an unused declaration.
...
llvm-svn: 114839
2010-09-27 16:54:49 +00:00
a0da88931c
Add support for viewing graphviz graphs with xdot.py.
...
llvm-svn: 114832
2010-09-27 16:28:34 +00:00
9a1b8598ef
Make this code 65-bit clean.
...
llvm-svn: 114828
2010-09-27 15:15:44 +00:00
d628377a2d
MC-COFF: Drop empty sections, and label symbols. Convert relocations
...
targeted at symbols into relocations relative to the containing section.
Patch by Nathan Jeffords!
llvm-svn: 114823
2010-09-27 08:58:26 +00:00
b6a7f97c88
yet more aliases.
...
llvm-svn: 114822
2010-09-27 07:24:57 +00:00
882626cd5b
add a couple more aliases, rdar://8456378
...
llvm-svn: 114821
2010-09-27 07:21:41 +00:00
972c60d821
fix rdar://8470918 - llvm-mc can't assemble smovl
...
llvm-svn: 114819
2010-09-27 07:11:53 +00:00
ff0062af62
Fix rdar://8468087 - llvm-mc commutes fmul (and friend) operands.
...
My previous fix for rdar://8456371 should only apply to fmulp/faddp,
not to fmul/fadd. Instruction set orthogonality is overrated or
something.
llvm-svn: 114818
2010-09-27 07:08:21 +00:00
9f06f911d1
the latest assembler that runs on powerpc 10.4 machines doesn't
...
support aligned comm. Detect when compiling for 10.4 and don't
emit an alignment for comm. THis will hopefully fix PR8198.
llvm-svn: 114817
2010-09-27 06:44:54 +00:00
b5b71e07af
improve indentation
...
llvm-svn: 114815
2010-09-27 06:34:01 +00:00
0720611e3a
Insert missing coherency in comment. Add a quick check for hardware
...
divide support also.
llvm-svn: 114813
2010-09-27 06:08:12 +00:00
29ab6d1f82
Mass rename for Jim.
...
llvm-svn: 114812
2010-09-27 06:02:23 +00:00
422e463be7
This code should never fire on non-darwin subtargets.
...
llvm-svn: 114811
2010-09-27 06:01:51 +00:00
4f59cbfb66
implement support for 'clr' alias. This is part of rdar://8416805,
...
but balrog was wanting it on irc.
llvm-svn: 114809
2010-09-27 04:23:03 +00:00
c8a4973389
Fixed some tests to avoid LiveIntervals::getInstructionFromIndex(..) overhead where possible. Thanks to Jakob for the suggestions.
...
llvm-svn: 114798
2010-09-26 03:37:09 +00:00
10117c762a
Avoid using VNInfo::getCopy as much as possible. I want to get rid of it.
...
llvm-svn: 114794
2010-09-25 18:10:38 +00:00
564956867e
Removed VNInfo::isDefAccurate(). Def "accuracy" can be checked by testing whether LiveIntervals::getInstructionFromIndex(def) returns NULL.
...
llvm-svn: 114791
2010-09-25 12:04:16 +00:00
299479020a
Add ret instruction to PTX backend
...
llvm-svn: 114788
2010-09-25 07:46:17 +00:00
75d65b9a03
Move ELF to HasReliableSymbolDifference=true. Also take the opportunity to put
...
symbols defined in merge sections in independent atoms.
llvm-svn: 114786
2010-09-25 05:42:19 +00:00
b590a927cd
LoadPRE was not properly checking that the load it was PRE'ing post-dominated the block it was being hoisted to.
...
Splitting critical edges at the merge point only addressed part of the issue; it is also possible for non-post-domination
to occur when the path from the load to the merge has branches in it. Unfortunately, full anticipation analysis is
time-consuming, so for now approximate it. This is strictly more conservative than real anticipation, so we will miss
some cases that real PRE would allow, but we also no longer insert loads into paths where they didn't exist before. :-)
This is a very slight net positive on SPEC for me (0.5% on average). Most of the benchmarks are largely unaffected, but
when it pays off it pays off decently: 181.mcf improves by 4.5% on my machine.
llvm-svn: 114785
2010-09-25 05:26:18 +00:00
48cc21620f
Fix IIC_iEXTAr itinerary class of Cortex-A9.
...
llvm-svn: 114784
2010-09-25 01:09:28 +00:00
8f9a2244fc
Remove a unused instruction itinerary class.
...
llvm-svn: 114782
2010-09-25 01:06:02 +00:00
ebacd2b023
If we're changing the source of a memcpy we need to use the alignment
...
of the source, not the original alignment since it may no longer
be valid.
Fixes rdar://8400094
llvm-svn: 114781
2010-09-25 00:57:26 +00:00
62d626ce86
Fix zero and sign extension instructions scheduling itineraries.
...
llvm-svn: 114780
2010-09-25 00:49:35 +00:00
bc71af341e
Remove SlotIndex::PHI_BIT. It is no longer used by anything.
...
llvm-svn: 114779
2010-09-25 00:45:18 +00:00
250fed25fd
Remove the only use of SlotIndex::isPHI. This bit is not being set consistently
...
and it will be removed shortly.
llvm-svn: 114778
2010-09-25 00:45:15 +00:00
335b9a8ea9
Terminator gaps were unused. Might as well delete them.
...
llvm-svn: 114776
2010-09-24 23:58:56 +00:00
e37da03e60
More pseudo instruction scheduling itinerary fixes.
...
llvm-svn: 114768
2010-09-24 22:41:41 +00:00
8118ef8d3d
Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash.
...
llvm-svn: 114767
2010-09-24 22:24:05 +00:00
1d35ad62cc
Fix scheduling itinerary for pseudo mov immediate instructions which expand into two real instructions.
...
llvm-svn: 114766
2010-09-24 22:03:46 +00:00
cf1f985838
Reapply 114678 and 114667. Reverting them did not fix the bot:
...
http://google1.osuosl.org:8011/builders/llvm-gcc-i386-linux-selfhost/builds/69
llvm-svn: 114761
2010-09-24 21:19:03 +00:00
4a6ab13fb9
Add ARM explicit MCInst lowering for the Thumb eh.sjlj.setjmp sequence.
...
llvm-svn: 114758
2010-09-24 20:47:58 +00:00
ded5f66813
Get rid of pop_macro warnings on MSVC.
...
llvm-svn: 114750
2010-09-24 19:48:47 +00:00
dbcc4b4d4d
Enable code placement optimization pass for ARM.
...
llvm-svn: 114746
2010-09-24 19:07:23 +00:00
6a4cd59b08
We can't return SSE/MMX vectors if SSE is disabled.
...
llvm-svn: 114745
2010-09-24 19:05:48 +00:00
3843bb9d2c
Revert 114678 and 114667 to see if
...
http://google1.osuosl.org:8011/builders/llvm-gcc-i386-linux-selfhost
gets happy.
llvm-svn: 114742
2010-09-24 18:48:08 +00:00
cbb421887d
Attach a DebugLoc to a GC point in order to get precise information in the JIT of a GC point.
...
llvm-svn: 114736
2010-09-24 17:27:50 +00:00
ce17f72c38
MC/AsmParser: Handle a missed case of floating literals in the lexer.
...
llvm-svn: 114733
2010-09-24 17:10:26 +00:00
40a4222996
Fix a potential null dereference bug.
...
llvm-svn: 114723
2010-09-24 05:18:35 +00:00
2af1653032
MC/AsmParser: Support .single and .double for embedding floating point literals.
...
- I believe more modern 'gas' supports a more enhanced set of arithmetic on
them, but for now the only thing we can do is emit them as data.
llvm-svn: 114719
2010-09-24 01:59:56 +00:00
3068a93dc1
MC/Lexer: Add 'Real' token type for floating point literals.
...
llvm-svn: 114718
2010-09-24 01:59:31 +00:00
74c1f1192c
MC: Add missing ')' in diagnostic.
...
llvm-svn: 114717
2010-09-24 01:58:56 +00:00
2c5df619c4
Revert r114703 and r114702, removing the isConditionalMove flag from instructions. After further
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reflection, this isn't going to achieve the purpose I intended it for. Back to the drawing board!
llvm-svn: 114710
2010-09-23 23:45:25 +00:00
7fbbe9a43a
Set alignment operand for NEON VST instructions.
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llvm-svn: 114709
2010-09-23 23:42:37 +00:00
c0aed7179a
ARM-mode eh.sjlj.setjmp pseudo MC-inst lowering expansion
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llvm-svn: 114707
2010-09-23 23:33:56 +00:00
2f3728f576
#+4 --> #4 for consistency with other asm output
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llvm-svn: 114706
2010-09-23 23:32:38 +00:00
07f07290d8
Fix formatting of output .s code
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llvm-svn: 114705
2010-09-23 23:03:26 +00:00
bd57e0ce3d
Add isConditionalMove bits to X86 and ARM instructions.
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llvm-svn: 114703
2010-09-23 22:57:01 +00:00
9eeb890172
Set alignment operand for NEON VLD instructions.
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llvm-svn: 114696
2010-09-23 21:43:54 +00:00
f458f04eb1
Correctly handle weak undefined symbols. Before we would get a invalid binding
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(2 == STB_WEAK | STB_GLOBAL).
llvm-svn: 114690
2010-09-23 19:55:14 +00:00
7d34837676
never mind. I can't read, apparently
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llvm-svn: 114689
2010-09-23 19:42:17 +00:00
1596f7f6f3
Fix r114632. Return if the only terminator is an unconditional branch after the redundant ones are deleted.
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llvm-svn: 114688
2010-09-23 19:42:03 +00:00
836341a17a
Fix opcode value for the 'trap' instruction, keeping the type suffix on the
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constant. Hopefully the non-Darwin bots will like it...
llvm-svn: 114687
2010-09-23 19:32:40 +00:00
3d50a3e237
explicit 'unsigned long' on constant value. Hopefully make bots happier.
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llvm-svn: 114686
2010-09-23 19:08:04 +00:00
e38495dbc0
Unbreak build. Jim, please review.
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llvm-svn: 114684
2010-09-23 18:57:26 +00:00
6b8b2b7312
Revert 114634 for now since buildbot claim it broke Clang self-hosting. I doubt it but it's possible it's exposing another bug somewhere.
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llvm-svn: 114681
2010-09-23 18:32:19 +00:00
8503054410
Clean up the 'trap' instruction printing a bit. Non-Darwin assemblers don't
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(yet) recognize the 'trap' mnemonic, so we use .short/.long to emit the
opcode directly. On Darwin, however, we do want the mnemonic for more
readable assembly code and better disassembly.
Adjust the .td file to use the 'trap' mnemonic and handle using the binutils
workaround in the assembly printer. Also tweak the formatting of the opcode
values to make them consistent between the MC printer and the old printer.
llvm-svn: 114679
2010-09-23 18:05:37 +00:00
6366d1b858
Correctly compute the offset of the symbol. Forgot these bits from the
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last commit.
llvm-svn: 114678
2010-09-23 18:01:31 +00:00
ea20e257b2
nuke unused var
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llvm-svn: 114676
2010-09-23 17:58:00 +00:00
48e108753b
Represent relocations against local symbols as relocations against the section
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they are in. Both ways should be equivalent, but gas produces relocations
against the section.
Roman wrote the patch, I added the test.
llvm-svn: 114667
2010-09-23 17:25:18 +00:00
3aecb15f0a
Fix llvm-extract so that it changes the linkage of all GlobalValues to
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"external" even when doing lazy bitcode loading. This was broken because
a function that is not materialized fails the !isDeclaration() test.
llvm-svn: 114666
2010-09-23 17:25:06 +00:00
57214f533a
Fix VS 2010 build.
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Patch by Nathan Jeffords!
llvm-svn: 114661
2010-09-23 16:59:36 +00:00
2816588eb9
Fix the FIXME.
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llvm-svn: 114639
2010-09-23 14:14:56 +00:00
b6d175a39d
Follow up to r114630. Do not optimize away unconditional branch following a conditional one.
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llvm-svn: 114634
2010-09-23 07:18:35 +00:00
794aaa79e2
Disable codegen prepare critical edge splitting. Machine instruction passes now
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break critical edges on demand.
llvm-svn: 114633
2010-09-23 06:55:34 +00:00
66c8cd2b32
If there are multiple unconditional branches terminating a block, eliminate all
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but the first one. Those will never be executed. There was logic to do this
but it was faulty.
llvm-svn: 114632
2010-09-23 06:54:40 +00:00
d4b31a7630
Don't sink insert_subreg, subreg_to_reg, reg_sequence. They are meant to be
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close to their sources to facilitate coalescing.
llvm-svn: 114631
2010-09-23 06:53:00 +00:00
79687dda9a
SDISel should not optimize a unconditional branch following a conditional branch
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when the unconditional branch destination is the fallthrough block. The
canonicalization makes it easier to allow optimizations on DAGs to invert
conditional branches. The branch folding pass (and AnalyzeBranch) will clean up
the unnecessary unconditional branches later.
This is one of the patches leading up to disabling codegen prepare critical edge
splitting.
llvm-svn: 114630
2010-09-23 06:51:55 +00:00
fd1bc42230
Moved the PBQP allocator class out of the header and back in to the cpp file to hide the gory details.
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Allocator instances can now be created by calling createPBQPRegisterAllocator.
Tidied up use of CoalescerPair as per Jakob's suggestions.
Made the new PBQPBuilder based construction process the default. The internal construction process
remains in-place and available via -pbqp-builder=false for now. It will be removed shortly if the new
process doesn't cause any regressions.
llvm-svn: 114626
2010-09-23 04:28:54 +00:00
002ad003a3
Fixed a crash in the enhanced disassembler where
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because of the lack of a newline, AsmToken::Eof
was being found instead of AsmToken::EndOfStatement.
llvm-svn: 114621
2010-09-23 02:14:12 +00:00
85dcd3d0f4
Add support for ELF PLT references for ARM MC asm printing. Adding a
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new VariantKind to the MCSymbolExpr seems like overkill, but I'm not sure
there's a more straightforward way to get the printing difference captured.
(i.e., x86 uses @PLT, ARM uses (PLT)).
llvm-svn: 114613
2010-09-22 23:27:36 +00:00
a9424d4f2f
Enable a few additional asserts in MC instruction lowering.
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llvm-svn: 114601
2010-09-22 23:01:28 +00:00
3231d13ddd
A select between a constant and zero, when fed by a bit test, can be efficiently
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lowered using a series of shifts.
Fixes <rdar://problem/8285015>.
llvm-svn: 114599
2010-09-22 22:58:22 +00:00
bbb9287080
Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case.
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llvm-svn: 114597
2010-09-22 22:35:21 +00:00
463a05342a
Change VDUPLANE DAG combiner to just return the result instead of calling
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CombineTo to avoid putting the result on the worklist. I don't think it makes
much difference for now, but it might help someday as we add more DAG
combine optimizations.
llvm-svn: 114595
2010-09-22 22:27:30 +00:00
dee12d8110
Avoid some Mach-O specific alignment being done on ELF.
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llvm-svn: 114594
2010-09-22 22:27:05 +00:00
7bce0596a7
allow target-specific label suffixes, patch by Yuri Gribov!
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llvm-svn: 114592
2010-09-22 22:19:53 +00:00
2280674fa9
Combine both VMOVDRR(VMOVRRD) and VMOVRRD(VMOVDRR), instead of just doing one
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of those. Refactor to share code for handling BUILD_VECTOR(VMOVRRD).
I don't have a testcase that exercises this, but it seems like an obvious
good thing to do.
llvm-svn: 114589
2010-09-22 22:09:21 +00:00
2348393cf5
Teach memdep about TBAA tags.
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llvm-svn: 114588
2010-09-22 21:41:02 +00:00
804fcd4794
Use DW_OP_fbreg when offset is based on frame register.
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llvm-svn: 114585
2010-09-22 21:10:38 +00:00
1f57cc4a59
add FIXME
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llvm-svn: 114578
2010-09-22 20:55:15 +00:00
c1b3e072f4
Temporarily work around new address lowering while I figure out what
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needs to happen for darwin.
llvm-svn: 114577
2010-09-22 20:42:08 +00:00
003fd5b65e
Remove a few commented out bits
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llvm-svn: 114576
2010-09-22 20:32:34 +00:00
0e527b7ed5
Fix typo and add a FIXME.
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llvm-svn: 114570
2010-09-22 19:04:41 +00:00
b6832a4372
When moving zext/sext to be folded with a load, ignore the issue of whether
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truncates are free only in the case where the extended type is legal but the
load type is not. If both types are illegal, such as when they are too big,
the load may not be legalized into an extended load.
llvm-svn: 114568
2010-09-22 18:44:56 +00:00
e12c8ba05b
Add PrintSpecial() handling for in ARM MC instruction printer.
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llvm-svn: 114563
2010-09-22 18:37:14 +00:00
6ebd728067
grammar tweakage
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llvm-svn: 114561
2010-09-22 18:18:30 +00:00
3bde49aa29
remove trailing whitespace
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llvm-svn: 114560
2010-09-22 18:16:55 +00:00
18456f3d73
CrashRecovery/Darwin: Override raise() as well so that crash recovery doesn't
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end up altering the thread on which crashes are done because of its use of
Darwin's broken raise() implementation.
llvm-svn: 114558
2010-09-22 17:46:10 +00:00
9bac6cb544
Correctly align bss.
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llvm-svn: 114556
2010-09-22 17:43:04 +00:00
284eebc1ae
Add MC instruction printer support for ARM and Thumb1 jump tables.
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llvm-svn: 114555
2010-09-22 17:39:48 +00:00
e1223fb583
Attempt to fix llvm-gcc build. It was crashing when building gcov.o for an
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ARM cross-compiler on x86, because the MMO size did not match the type size.
This fixes the MMO size and also the size of the stack object to match the
type size.
llvm-svn: 114554
2010-09-22 17:35:14 +00:00
1573b29ea7
Add MC instruction printer support for TB[BH] style thumb2 jump tables.
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llvm-svn: 114553
2010-09-22 17:15:35 +00:00
754e1efffc
Clean up comment.
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llvm-svn: 114550
2010-09-22 16:45:13 +00:00
415624cf3f
fix rdar://8456371 - Handle commutable instructions written backward.
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llvm-svn: 114536
2010-09-22 06:26:39 +00:00
bd85725341
Fix an inconsistency in the x86 backend that led it to reject "calll foo" on
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x86-32: 32-bit calls were named "call" not "calll". 64-bit calls were correctly
named "callq", so this only impacted x86-32.
This fixes rdar://8456370 - llvm-mc rejects 'calll'
This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.
llvm-svn: 114534
2010-09-22 05:49:14 +00:00
37fc469f88
fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"
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Teaching the code generator about CR8-15, how to rex them up, etc.
llvm-svn: 114533
2010-09-22 05:29:50 +00:00
2bb9504d1a
fix rdar://8456417 - llvm-mc can't do basic math
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llvm-svn: 114532
2010-09-22 05:05:16 +00:00
9dfd2e354e
add the missing aliases for fp stack cmovs, rdar://8456391
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llvm-svn: 114531
2010-09-22 04:56:20 +00:00
8a236b63d8
reimplement elf TLS support in terms of addressing modes, eliminating SegmentBaseAddress.
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llvm-svn: 114529
2010-09-22 04:39:11 +00:00
1261b81e82
Fix rdar://8456364 - llvm-mc rejects '%CS'
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llvm-svn: 114528
2010-09-22 04:11:10 +00:00
39cf8deded
fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp'
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-This line, and those below, will be ignored--
M test/MC/AsmParser/X86/x86_instructions.s
M lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm-svn: 114527
2010-09-22 04:04:03 +00:00
a91e510f94
fix rdar://8456361 - llvm-mc rejects 'rep movsd'
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llvm-svn: 114526
2010-09-22 03:50:32 +00:00
a5156c30ed
convert the last 4 X86ISD nodes that should have memoperands to have them.
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llvm-svn: 114523
2010-09-22 01:28:21 +00:00
ed85da5600
give X86ISD::FNSTCW16m a memoperand, since it touches memory. It only
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can access the stack due to how it is generated though.
llvm-svn: 114522
2010-09-22 01:11:26 +00:00
78f518b79b
give FP_TO_INT16_IN_MEM and friends a memoperand. They are only
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used with stack slots, but hey, lets be safe.
llvm-svn: 114521
2010-09-22 01:05:16 +00:00
54e5329545
give VZEXT_LOAD a memory operand, it now works with segment registers.
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llvm-svn: 114515
2010-09-22 00:34:38 +00:00
07827ba978
revert r114386 now that address modes work correctly, we get a nice
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call through gs-relative memory now.
llvm-svn: 114510
2010-09-22 00:11:31 +00:00
e479e9643b
give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257
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llvm-svn: 114508
2010-09-21 23:59:42 +00:00
d757c88bba
OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison.
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llvm-svn: 114506
2010-09-21 23:49:07 +00:00
d64f9b8381
Add start of support for MC instruction printer of ARM jump tables. Filling in
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the rest of it is next up.
llvm-svn: 114500
2010-09-21 23:28:16 +00:00
61158f98ab
Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes
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irrelevant, but add a new test for the new, improved functionality.
llvm-svn: 114494
2010-09-21 22:51:46 +00:00
6f8bd42ec7
Build the complement interval dupli after the split intervals instead of
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creating it before and subtracting split ranges.
This way, the SSA update code in LiveIntervalMap can properly create and use new
phi values in dupli. Now it is possible to create split regions where a value
escapes along two different CFG edges, creating phi values outside the split
region.
This is a work in progress and probably quite broken.
llvm-svn: 114492
2010-09-21 22:32:21 +00:00
d58d7c1907
reimplement support for GS and FS relative address space matching
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by having X86DAGToDAGISel::SelectAddr get passed in the parent node
of the operand match (the load/store/atomic op) and having it get
the address space from that, instead of having special FS/GS addr
mode operations that require duplicating the entire instruction set
to support.
This makes FS and GS relative accesses *far* more predictable and
work much better. It also simplifies the X86 backend a bit, more
to come.
There is still a pending issue with nodes like ISD::PREFETCH and
X86ISD::FLD, which really should be MemSDNode's but aren't.
llvm-svn: 114491
2010-09-21 22:07:31 +00:00
c467aa2fa4
Fixed pr20314-2.c failure, added E, F, p constraint letters.
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llvm-svn: 114490
2010-09-21 22:04:54 +00:00
a9e57e0eff
Rework passing parent pointers into complexpatterns, I forgot
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that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.
llvm-svn: 114489
2010-09-21 22:00:25 +00:00
4ddcb6a6b4
Move a sign-extend or a zero-extend of a load to the same basic block as the
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load when the type of the load is not legal, even if truncates are not free.
The load is going to be legalized to an extending load anyway.
llvm-svn: 114488
2010-09-21 21:54:27 +00:00
ff714f9992
Clarify a comment.
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llvm-svn: 114487
2010-09-21 21:44:14 +00:00
99ff76212a
If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg.
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Testcase is in r114476.
This fixes radar 8412415.
llvm-svn: 114478
2010-09-21 20:56:33 +00:00
Benjamin Kramer