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748 Commits

Author SHA1 Message Date
Chris Lattner 39c70f4833 split the 32-bit integer arithmetic instructions out to their own file. 
llvm-svn: 115627
 2010-10-05 16:39:12 +00:00
Chris Lattner 1b3aa8678e move 32-bit shift and rotates out to their own file. 
llvm-svn: 115607
 2010-10-05 07:00:12 +00:00
Chris Lattner a68466c202 move sign and zero extensions out to their own file. 
llvm-svn: 115605
 2010-10-05 06:52:26 +00:00
Chris Lattner 84571a1581 move some instructions from Instr64Bit -> InstrInfo. 
bswap32 doesn't read eflags.

llvm-svn: 115604
 2010-10-05 06:47:35 +00:00
Chris Lattner da8c94ef44 move CMOV_FR32 and friends to InstrCompiler, since they are 
pseudo instructions.

Move POPCNT to InstrSSE since they are SSE4 instructions.

llvm-svn: 115603
 2010-10-05 06:41:40 +00:00
Chris Lattner 44a5a2b569 move various pattern matching support goop out of X86Instr64Bit, to live 
with the 32-bit stuff.

llvm-svn: 115602
 2010-10-05 06:37:31 +00:00
Chris Lattner fa9b058eef split conditional moves and setcc's out to their own file. 
llvm-svn: 115601
 2010-10-05 06:33:16 +00:00
Chris Lattner f9594ba4e7 move string pseudo instructions to InstrCompiler consolidate 64-bit and 32-bit together. 
llvm-svn: 115600
 2010-10-05 06:27:48 +00:00
Chris Lattner c184a57e98 move the atomic pseudo instructions out to X86InstrCompiler.td 
llvm-svn: 115599
 2010-10-05 06:22:35 +00:00
Chris Lattner c793f8bca6 move more pseudo instructions out to X86InstrCompiler.td 
llvm-svn: 115598
 2010-10-05 06:10:16 +00:00
Chris Lattner 52d3935dfe move VMX instructions out to their own file. 
llvm-svn: 115597
 2010-10-05 06:06:53 +00:00
Chris Lattner ae33f5d93b continue moving stuff out to X86InstrSystem.td. Move 
control flow stuff out to X86InstrControl.td.  Move
some compiler pseudo instructions and Pat<> patterns
out to X86InstrCompiler.td

llvm-svn: 115596
 2010-10-05 06:04:14 +00:00
Chris Lattner dec85b8c64 refactor .td files a bit, moving system instructions out to X86InstrSystem.td 
llvm-svn: 115591
 2010-10-05 05:32:15 +00:00
Chris Lattner 45270db916 Implement support for the bizarre 3DNow! encoding (which is unlike anything 
else in X86), and add support for pavgusb.  This is apparently the
only instruction (other than movsx) that is preventing ffmpeg from building
with clang.

If someone else is interested in banging out the rest of the 3DNow! 
instructions, it should be quite easy now.

llvm-svn: 115466
 2010-10-03 18:08:05 +00:00
Chris Lattner ae1a9de083 stub out a header to put 3dNow! instructions into. 
llvm-svn: 115429
 2010-10-02 23:06:23 +00:00
Owen Anderson 2c5df619c4 Revert r114703 and r114702, removing the isConditionalMove flag from instructions. After further 
reflection, this isn't going to achieve the purpose I intended it for.  Back to the drawing board!

llvm-svn: 114710
 2010-09-23 23:45:25 +00:00
Owen Anderson bd57e0ce3d Add isConditionalMove bits to X86 and ARM instructions. 
llvm-svn: 114703
 2010-09-23 22:57:01 +00:00
Chris Lattner bd85725341 Fix an inconsistency in the x86 backend that led it to reject "calll foo" on 
x86-32: 32-bit calls were named "call" not "calll".  64-bit calls were correctly
named "callq", so this only impacted x86-32.

This fixes rdar://8456370 - llvm-mc rejects 'calll'

This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.

llvm-svn: 114534
 2010-09-22 05:49:14 +00:00
Chris Lattner 8a236b63d8 reimplement elf TLS support in terms of addressing modes, eliminating SegmentBaseAddress. 
llvm-svn: 114529
 2010-09-22 04:39:11 +00:00
Chris Lattner 54e5329545 give VZEXT_LOAD a memory operand, it now works with segment registers. 
llvm-svn: 114515
 2010-09-22 00:34:38 +00:00
Chris Lattner d58d7c1907 reimplement support for GS and FS relative address space matching 
by having X86DAGToDAGISel::SelectAddr get passed in the parent node
of the operand match (the load/store/atomic op) and having it get
the address space from that, instead of having special FS/GS addr
mode operations that require duplicating the entire instruction set
to support.

This makes FS and GS relative accesses *far* more predictable and
work much better.  It also simplifies the X86 backend a bit, more
to come.

There is still a pending issue with nodes like ISD::PREFETCH and
X86ISD::FLD, which really should be MemSDNode's but aren't.

llvm-svn: 114491
 2010-09-21 22:07:31 +00:00
Chris Lattner c6d8839a2b even though I'm about to rip it out, simplify the address mode stuff 
llvm-svn: 114468
 2010-09-21 19:41:58 +00:00
Chris Lattner cea0a8d7ae fix rdar://8444631 - encoder crash on 'enter' 
What a weird instruction.

llvm-svn: 114190
 2010-09-17 18:02:29 +00:00
Chris Lattner 5be87c619b fix the encoding of sldt GR16 to have the 0x66 prefix, and 
add sldt GR32, which isn't documented in the intel manual
but which gas accepts.  Part of rdar://8418316

llvm-svn: 113938
 2010-09-15 04:45:10 +00:00
Chris Lattner 8ead237758 fix bugs in push/pop segment support, rdar://8407242 
llvm-svn: 113422
 2010-09-08 22:13:08 +00:00
Chris Lattner a9ca7837e4 implement proper support for sysret{,l,q}, rdar://8403907 
llvm-svn: 113350
 2010-09-08 05:45:34 +00:00
Chris Lattner 063363fa80 implement the iret suite of instructions properly, 
fixing rdar://8403974

llvm-svn: 113349
 2010-09-08 05:38:31 +00:00
Chris Lattner 4703cb4a96 fix the encoding of the "jump on *cx" family of instructions, 
rdar://8061602

llvm-svn: 113343
 2010-09-08 04:30:51 +00:00
Evan Cheng 5444b36e01 Remove a dead comment. 
llvm-svn: 113259
 2010-09-07 20:01:10 +00:00
Chris Lattner 34e366b45c fix the operand constraints of the immediate form of in/out, 
allowing unsigned 8-bit operands.  This fixes rdar://8208481

llvm-svn: 113182
 2010-09-06 23:29:05 +00:00
Roman Divacky e1278b57f9 Redefine LOOP* instructions from I to Ii8PCRel as they take an i8 argument. 
llvm-svn: 113158
 2010-09-06 18:43:14 +00:00
Jakob Stoklund Olesen 08aede2538 Don't call Predicate_* from X86 target. 
llvm-svn: 112921
 2010-09-03 00:35:18 +00:00
Anton Korobeynikov b3b53ecac0 Fix nasty mingw32 bug, which e.g. prevented llvm-gcc bootstrap there. 
Mark _alloca call as clobberring EFLAGS, otherwise some DCE might remove
other flags-clobberring stuff (e.g. cmp instructions) occuring after
_alloca call.

llvm-svn: 112034
 2010-08-25 07:50:11 +00:00
Chris Lattner 58bd73a5a7 Add a new llvm.x86.int intrinsic, allowing access to the 
x86 int and int3 instructions.  Patch by Peter Housel!

llvm-svn: 111831
 2010-08-23 19:39:25 +00:00
Chris Lattner f547740d3f fix PR7465, mishandling of lcall and ljmp: intersegment long 
call and jumps.

llvm-svn: 111496
 2010-08-19 01:18:43 +00:00
Eric Christopher 54194bd127 Rework how the non-sse2 memory barrier is lowered so that the 
encoding is correct for the built-in assembler.

Based on a patch from Chris.

llvm-svn: 111083
 2010-08-14 21:51:50 +00:00
Eric Christopher b9627ee79b Wording. 
llvm-svn: 110618
 2010-08-09 22:52:47 +00:00
Eric Christopher 32f5d6b9be Be a little bit more specific about target for the memory barrier 
instructions.

llvm-svn: 110360
 2010-08-05 18:36:20 +00:00
Eric Christopher 2db8464282 Make x86-64 membarriers work without sse and clean up some of the 
uses.

llvm-svn: 110274
 2010-08-04 23:03:04 +00:00
Bruno Cardoso Lopes 405405bbfe Fix typo! 
llvm-svn: 109877
 2010-07-30 19:41:24 +00:00
Bruno Cardoso Lopes 36c2ea6c7a Temporary hack to let codegen assert or generate poor code in case 
we are using AVX and no AVX version of the desired intruction is present,
this is better for incremental dev (without fallbacks it's easier to spot
what's missing). Not sure this is the best hack thought (we can also disable
all HasSSE* predicates by dinamically marking them 'false' if AVX is present)

llvm-svn: 109434
 2010-07-26 21:01:18 +00:00
Bruno Cardoso Lopes 09dc24beac Add x86 CLMUL (Carry-less multiplication) cpu feature 
llvm-svn: 109206
 2010-07-23 01:17:51 +00:00
Bruno Cardoso Lopes acd9230b1b Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual 
llvm-svn: 109204
 2010-07-23 00:54:35 +00:00
Eric Christopher 9a77382685 Custom lower the memory barrier instructions and add support 
for lowering without sse2.  Add a couple of new testcases.

Fixes a few libgomp tests and latent bugs.  Remove a few todos.

llvm-svn: 109078
 2010-07-22 02:48:34 +00:00
Eric Christopher d27913e516 Pulling out previous patch, must've run the tests in 
the wrong directory.

llvm-svn: 109005
 2010-07-21 09:23:56 +00:00
Eric Christopher b2d1067024 Lower MEMBARRIER on x86 and support processors without SSE2. 
Fixes a pile of libgomp failures in the llvm-gcc testsuite due
to the libcall not existing.

llvm-svn: 109004
 2010-07-21 09:05:23 +00:00
Bruno Cardoso Lopes 9de0ca73d4 Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions! 
llvm-svn: 108769
 2010-07-19 23:32:44 +00:00
Daniel Dunbar 9db7d0addd X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the same 
instruction, we only want to allow the one for the current subtarget.
 - This also fixes suffix matching for jmp instructions, because it eliminates
   the ambiguity between 'jmpl' and 'jmpq'.

llvm-svn: 108746
 2010-07-19 20:44:16 +00:00
Daniel Dunbar 2e9f58517d X86: Mark some tail call pseduo instruction as code gen only. 
llvm-svn: 108684
 2010-07-19 07:21:04 +00:00
Daniel Dunbar 1cd02510d3 X86: Mark In32/64BitMode on LEAVE[64] and SYSEXIT[64]. 
llvm-svn: 108683
 2010-07-19 07:21:01 +00:00