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7 Commits

Author SHA1 Message Date
Matt Arsenault 4b7fc85c0b Revert "AMDGPU: Fix iterator error when lowering SI_END_CF" 
This reverts r367500 and r369203. This is causing various test
failures.

llvm-svn: 369417
 2019-08-20 17:45:25 +00:00
Matt Arsenault 479f3bdb2c AMDGPU: Fix iterator error when lowering SI_END_CF 
If the instruction is the last in the block, there is no next
instruction but the iteration still needs to look at the new block.

llvm-svn: 369203
 2019-08-18 00:20:44 +00:00
Stanislav Mekhanoshin a6322941ff [AMDGPU] gfx1010 VMEM and SMEM implementation 
Differential Revision: https://reviews.llvm.org/D61330

llvm-svn: 359621
 2019-04-30 22:08:23 +00:00
David Stuttard 20ea21c6ed [AMDGPU] Add support for immediate operand for S_ENDPGM 
Summary:
Add support for immediate operand in S_ENDPGM

Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6

Reviewers: alexshap

Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59213

llvm-svn: 355902
 2019-03-12 09:52:58 +00:00
Matt Arsenault 870397739e AMDGPU: Preserve undef flag when expanding SI_IF 
Fixes undefined value verifier error.

llvm-svn: 355426
 2019-03-05 18:38:00 +00:00
Matt Arsenault 0da6350dc8 AMDGPU: Remove remnants of old address space mapping 
llvm-svn: 341165
 2018-08-31 05:49:54 +00:00
Mark Searles 987f292c56 [AMDGPU] prevent hitting Assertion `isReg() && "Wrong MachineOperand accessor"' 
The use iterator, used within findMaskOperands(), can return anything which is
not a def. isUse() requires a register, so check isReg() before calling isUse().

Differential Revision: https://reviews.llvm.org/D48047

llvm-svn: 334459
 2018-06-12 00:41:26 +00:00