Commit Graph

139181 Commits

Author SHA1 Message Date
Richard Osborne c104bf2769 Fix parameter name in prototypes in XCoreDisassembler.
llvm-svn: 170332
2012-12-17 13:55:49 +00:00
Chandler Carruth 95e1fb8a42 Hoist a convertValue call to the two paths where it is needed.
I noticed this while looking at r170328. We only ever do a vector
rewrite when the alloca *is* the vector type, so it's good to not paper
over bugs here by doing a convertValue that isn't needed.

llvm-svn: 170331
2012-12-17 13:51:03 +00:00
Richard Osborne 041071c558 Add instruction encodings / disassembly support for rus instructions.
llvm-svn: 170330
2012-12-17 13:50:04 +00:00
Kostya Serebryany ec339f70d6 [asan] asan_allocator2: don't use TLS and fix calloc
llvm-svn: 170329
2012-12-17 13:43:47 +00:00
Chandler Carruth ce4562bdcb Hoist the insertVector helper to be a static helper.
This will allow its use inside of memcpy rewriting as well. This routine
is more complex than extractVector, and some of its uses are not 100%
where I want them to be so there is still some work to do here.

While this can technically change the output in some cases, it shouldn't
be a change that matters -- IE, it can leave some dead code lying around
that prior versions did not, etc.

Yet another step in the refactorings leading up to the solution to the
last component of PR14478.

llvm-svn: 170328
2012-12-17 13:41:21 +00:00
Richard Osborne e405e58639 Add instruction encodings for ZEXT and SEXT.
Previously these were marked with the wrong format.

llvm-svn: 170327
2012-12-17 13:20:37 +00:00
Dmitry Vyukov ca2d2e11ac tsan: correct llvm libc++ name
llvm-svn: 170326
2012-12-17 13:07:35 +00:00
Chandler Carruth b6bc8749e8 Lift the extractVector helper all the way out to a static helper function.
The method helpers all implicitly act upon the alloca, and what we
really want is a fully generic helper. Doing memcpy rewrites is more
special than all other rewrites because we are at times rewriting
instructions which touch pointers *other* than the alloca. As
a consequence all of the helpers needed by memcpy rewriting of
sub-vector copies will need to be generalized fully.

Note that all of these helpers ({insert,extract}{Integer,Vector}) are
woefully uncommented. I'm going to go back through and document them
once I get the factoring correct.

No functionality changed.

llvm-svn: 170325
2012-12-17 13:07:30 +00:00
Chandler Carruth 769445ef03 Factor the vector load rewriting into a more generic form.
This makes it suitable for use in rewriting memcpy in the presence of
subvector memcpy intrinsics.

No functionality changed.

llvm-svn: 170324
2012-12-17 12:50:21 +00:00
Richard Osborne 3a0d5cc314 Add instruction encodings / disassembly support for 2r instructions.
llvm-svn: 170323
2012-12-17 12:29:31 +00:00
Richard Osborne 016967e4ff Add instruction encodings / disassembly support for 0r instructions.
llvm-svn: 170322
2012-12-17 12:26:29 +00:00
Richard Osborne 1cc2b68ad6 Simplify assertion in XCoreInstPrinter.
llvm-svn: 170321
2012-12-17 12:13:46 +00:00
Richard Osborne 4e1e14bccd Update comments to match recommended doxygen style.
llvm-svn: 170320
2012-12-17 12:13:41 +00:00
Richard Osborne eb31fa483e Remove unnecessary include.
llvm-svn: 170319
2012-12-17 12:13:32 +00:00
Duncan Sands 7cb52522fe Fix typo that results in new landing pads not getting a name, fixing PR14617.
Patch by Chris Toshok.

llvm-svn: 170318
2012-12-17 12:02:36 +00:00
Duncan Sands 66c2cd3d88 Fix comment typo.
llvm-svn: 170317
2012-12-17 11:43:15 +00:00
Daniel Jasper e25509f857 Fix several formatting problems.
More specifically:
- Improve formatting of static initializers.
- Fix formatting of lines comments in enums.
- Fix formmating of trailing line comments.

llvm-svn: 170316
2012-12-17 11:29:41 +00:00
Kostya Serebryany 1aae0e67fa [asan] asan_alocator2: implement quarantine and Reallocate
llvm-svn: 170315
2012-12-17 09:06:25 +00:00
Dmitry Vyukov a53767ea22 tsan: add __has_feature(thread_sanitizer)
llvm-svn: 170314
2012-12-17 08:52:05 +00:00
Kostya Serebryany 41ffe3db59 [asan] implement AsanChunkFifoList via IntrusiveList<AsanChunk>
llvm-svn: 170313
2012-12-17 07:54:29 +00:00
Han Ming Ong 3e70c45fa8 <rdar://problem/12890901>
Capturing thread name during profiling.

llvm-svn: 170312
2012-12-17 07:33:07 +00:00
Dmitry Vyukov be66bf152e tsan: update docs
llvm-svn: 170311
2012-12-17 07:16:54 +00:00
Kostya Serebryany c510015419 [asan] asan_alocator2: implement free() stacks and actually make malloc/free stacks work
llvm-svn: 170310
2012-12-17 06:31:53 +00:00
Chandler Carruth 1aa9f173fc Clean up a small (messy) section of Clang's release notes for 3.2.
llvm-svn: 170309
2012-12-17 06:24:36 +00:00
Craig Topper 354ed773b8 Remove EFLAGS from the BLSI/BLSMSK/BLSR patterns. The nodes created by DAG combine don't contain an EFLAGS def.
llvm-svn: 170308
2012-12-17 06:13:48 +00:00
Craig Topper f3ff6ae066 Simplify BMI ANDN matching to use patterns instead of a DAG combine. Also add ANDN to isDefConvertible.
llvm-svn: 170305
2012-12-17 05:12:30 +00:00
Craig Topper f924a58af1 Add rest of BMI/BMI2 instructions to the folding tables as well as popcnt and lzcnt.
llvm-svn: 170304
2012-12-17 05:02:29 +00:00
Craig Topper 5b08cf7736 Remove store forms of DEC/INC from isDefConvertible. Since they are stores they don't have a register def.
llvm-svn: 170303
2012-12-17 04:55:07 +00:00
Bill Schmidt a3d121cd61 This patch fixes PR13624, which notes a 64-bit PowerPC ELF ABI
incompatibility with how complex values are returned.  It is sufficient
to flag all complex types as direct rather than indirect.

A new test case is provided that checks correct IR generation for the
various supported flavors of _Complex.

llvm-svn: 170302
2012-12-17 04:20:17 +00:00
Chandler Carruth ccca504f3a Fix the first part of PR14478: memset now works.
PR14478 highlights a serious problem in SROA that simply wasn't being
exercised due to a lack of vector input code mixed with C-library
function calls. Part of SROA was written carefully to handle subvector
accesses via memset and memcpy, but the rewriter never grew support for
this. Fixing it required refactoring the subvector access code in other
parts of SROA so it could be shared, and then fixing the splat formation
logic and using subvector insertion (this patch).

The PR isn't quite fixed yet, as memcpy is still broken in the same way.
I'm starting on that series of patches now.

Hopefully this will be enough to bring the bullet benchmark back to life
with the bb-vectorizer enabled, but that may require fixing memcpy as
well.

llvm-svn: 170301
2012-12-17 04:07:37 +00:00
Chandler Carruth eae65a5629 Extract the logic for inserting a subvector into a vector alloca.
No functionality changed. Another step of refactoring toward solving
PR14487.

llvm-svn: 170300
2012-12-17 04:07:35 +00:00
Chandler Carruth 514f34f9c4 Lift the integer splat computation into a helper function.
No functionality changed. Refactoring leading up to the fix for PR14478
which requires some significant changes to the memset and memcpy
rewriting.

llvm-svn: 170299
2012-12-17 04:07:30 +00:00
Craig Topper 588ceec0f7 Add debug prints for when optimizeLoadInstr folds a load.
llvm-svn: 170298
2012-12-17 03:56:00 +00:00
Nico Weber 555d1aa3a4 IdentifierResolver: Remove an unnecessary include and an unused parameter.
llvm-svn: 170297
2012-12-17 03:51:09 +00:00
Dmitri Gribenko 544bd61989 Documentation: add a missing word
llvm-svn: 170296
2012-12-16 19:55:39 +00:00
Richard Osborne c5287b8889 Add tests for disassembly of 1r XCore instructions.
llvm-svn: 170295
2012-12-16 18:06:30 +00:00
Dmitri Gribenko 2d1fa58fa9 Clang ReleaseNotes: add information about documentation comments support
llvm-svn: 170294
2012-12-16 17:38:09 +00:00
Richard Osborne 1b5562ad8e Add instruction encodings and disassembly for 1r instructions.
llvm-svn: 170293
2012-12-16 17:37:34 +00:00
Richard Osborne e31735a52b Add XCore disassembler.
Currently there is no instruction encoding info and
XCoreDisassembler::getInstruction() always returns Fail. I intend to add
instruction encodings and tests in follow on commits.

llvm-svn: 170292
2012-12-16 17:29:14 +00:00
Richard Osborne 872f51e301 Remove invalid instruction encodings.
llvm-svn: 170291
2012-12-16 16:46:31 +00:00
Richard Osborne e298556706 Mark anything deriving from PseudoInstXCore as a pseudo instruction.
llvm-svn: 170290
2012-12-16 16:46:28 +00:00
Richard Osborne f12cb9ef27 Set instruction size correctly in XCoreInstrFormats.td
llvm-svn: 170289
2012-12-16 16:46:24 +00:00
Richard Osborne 3c31e21837 Change XCoreAsmPrinter to lower MachineInstrs to MCInsts before emission.
This change adds XCoreMCInstLower to do the lowering to MCInst and
XCoreInstPrinter to print the MCInsts.

llvm-svn: 170288
2012-12-16 16:20:48 +00:00
Richard Osborne b1de9f7e07 Replace ${:comment} with the comment symbol.
llvm-svn: 170286
2012-12-16 15:59:02 +00:00
Dmitri Gribenko 2943ce80f3 Declare class DwarfDebug before use instead of relying on a forward declaration
from some other unrelated header.

Patch by Kai.

llvm-svn: 170284
2012-12-16 12:57:36 +00:00
Dmitri Gribenko 7730cf0b62 Documentation: AutomaticReferenceCounting.rst: use CSS section numbering.
This enables us to use the same document structure as in other files.

llvm-svn: 170283
2012-12-16 11:25:45 +00:00
Craig Topper f3b839b063 Don't use SourceLineCache in getColumnNumber if LastLineNoResult is past the end of the cache. Fixes PR14570.
llvm-svn: 170281
2012-12-16 05:58:32 +00:00
NAKAMURA Takumi c7146e251d MCPureStreamer.cpp: Try to fix build, pruning EmitDebugLabel().
llvm-svn: 170280
2012-12-16 04:23:20 +00:00
Reed Kotler aee4d5d194 This patch is needed to make c++ exceptions work for mips16.
Mips16 is really a processor decoding mode (ala thumb 1) and in the same
program, mips16 and mips32 functions can exist and can call each other.

If a jal type instruction encounters an address with the lower bit set, then
the processor switches to mips16 mode (if it is not already in it). If the
lower bit is not set, then it switches to mips32 mode.

The linker knows which functions are mips16 and which are mips32.
When relocation is performed on code labels, this lower order bit is
set if the code label is a mips16 code label.

In general this works just fine, however when creating exception handling
tables and dwarf, there are cases where you don't want this lower order
bit added in.

This has been traditionally distinguished in gas assembly source by using a
different syntax for the label.

lab1:      ; this will cause the lower order bit to be added
lab2=.     ; this will not cause the lower order bit to be added

In some cases, it does not matter because in dwarf and debug tables
the difference of two labels is used and in that case the lower order
bits subtract each other out.

To fix this, I have added to mcstreamer the notion of a debuglabel.
The default is for label and debug label to be the same. So calling
EmitLabel and EmitDebugLabel produce the same result.

For various reasons, there is only one set of labels that needs to be
modified for the mips exceptions to work. These are the "$eh_func_beginXXX" 
labels.

Mips overrides the debug label suffix from ":" to "=." .

This initial patch fixes exceptions. More changes most likely
will be needed to DwarfCFException to make all of this work
for actual debugging. These changes will be to emit debug labels in some
places where a simple label is emitted now.

Some historical discussion on this from gcc can be found at:
http://gcc.gnu.org/ml/gcc-patches/2008-08/msg00623.html
http://gcc.gnu.org/ml/gcc-patches/2008-11/msg01273.html 

llvm-svn: 170279
2012-12-16 04:00:45 +00:00
Sean Silva 55b7cbe8ed docs: Fix completely broken adornment structure.
The adornment:

===
Foo
===

is for titles, not sections.

llvm-svn: 170278
2012-12-16 00:23:40 +00:00