Commit Graph

161025 Commits

Author SHA1 Message Date
Nicolai Haehnle d4c0a5d08d TableGen: Delay instantiating inline anonymous records
Summary:
Only instantiate anonymous records once all variable references in template
arguments have been resolved. This allows patterns like the new test case,
which in practice can appear in expressions like:

  class IntrinsicTypeProfile<list<LLVMType> ty, int shift> {
    list<LLVMType> types =
      !listconcat(ty, [llvm_any_ty, LLVMMatchType<shift>]);
  }

  class FooIntrinsic<IntrinsicTypeProfile P, ...>
    : Intrinsic<..., P.types, ...>;

Without this change, the anonymous LLVMMatchType instantiation would
never get resolved.

Another consequence of this change is that anonymous inline
instantiations are uniqued via the folding set of the newly introduced
VarDefInit.

Change-Id: I7a7041a20e297cf98c9109b28d85e64e176c932a

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43756

llvm-svn: 326788
2018-03-06 13:49:01 +00:00
Nicolai Haehnle 73355bcd2a TableGen: Move getNewAnonymousName into RecordKeeper
Summary:
So that we will be able to generate new anonymous names more easily
outside the parser as well.

Change-Id: I28f396a7bdbc3ff0c665d466abbd3d31376e21b4

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43755

llvm-svn: 326787
2018-03-06 13:48:54 +00:00
Nicolai Haehnle 0f529885fa TableGen: Explicitly check whether a record has been resolved
Summary:
There are various places where resolving and constant folds can
get stuck, especially around casts. We don't always signal an
error for those, because in many cases they can legitimately
occur without being an error in the "untaken branch" of an !if.

Change-Id: I3befc0e4234c8e6cc61190504702918c9f29ce5c

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43754

llvm-svn: 326786
2018-03-06 13:48:47 +00:00
Nicolai Haehnle dfda9dcc1d TableGen: Allow !cast of records, cleanup conversion machinery
Summary:
Distinguish two relationships between types: is-a and convertible-to.
For example, a bit is not an int or vice versa, but they can be
converted into each other (with range checks that you can think of
as "dynamic": unlike other type checks, those range checks do not
happen during parsing, but only once the final values have been
established).

Actually converting initializers between types is subtle: even
when values of type A can be converted to type B (e.g. int into
string), it may not be possible to do so with a concrete initializer
(e.g., a VarInit that refers to a variable of type int cannot
be immediately converted to a string).

For this reason, distinguish between getCastTo and convertInitializerTo:
the latter implements the actual conversion when appropriate, while
the former will first try to do the actual conversion and fall back
to introducing a !cast operation so that the conversion will be
delayed until variable references have been resolved.

To make the approach of adding !cast operations to work, !cast needs
to fallback to convertInitializerTo when the special string <-> record
logic does not apply.

This enables casting records to a subclass, although that new
functionality is only truly useful together with !isa, which will be
added in a later change.

The test is removed because it uses !srl on a bit sequence,
which cannot really be supported consistently, but luckily
isn't used anywhere either.

Change-Id: I98168bf52649176654ed2ec61a29bdb29970cfe7

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43753

llvm-svn: 326785
2018-03-06 13:48:39 +00:00
Nicolai Haehnle 9a84a50913 TableGen: Simplify BitsInit::resolveReferences
Summary:
No functional change intended. The removed code has a loop for
recursive resolving, which is superseded by the recursive
resolving done by the Resolver implementations.

Add a test case which was broken by an earlier version of this
change.

Change-Id: Ib208d037b77a8bbb725977f1388601fc984723d8

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43655

llvm-svn: 326784
2018-03-06 13:48:30 +00:00
Nicolai Haehnle 13080fd14e TableGen: Generalize record types to fix typeIsConvertibleTo et al.
Summary:
Allow RecordRecTy to represent the type "subclass of N superclasses",
where N may be zero. Furthermore, generate RecordRecTy instances only
with actual classes in the list.

Keeping track of multiple superclasses is required to resolve the type
of a list correctly in some cases. The old code relied on the incorrect
behavior of typeIsConvertibleTo, and an earlier version of this change
relied on a modified ordering of superclasses (it was committed in
r325884 and then reverted because unfortunately some of clang-tblgen's
backends depend on the ordering).

Previously, the DefInit for each Record would have a RecordRecTy of
that Record as its type. Now, all defs with the same superclasses will
share the same type.

This allows us to be more consistent about type checks involving records:

- typeIsConvertibleTo actually requires the LHS to be a subtype of the
  RHS

- resolveTypes will return the least supertype of given record types in
  all cases

- different record types in the two branches of an !if are handled
  correctly

Add a test that used to be accepted without flagging the obvious type
error.

Change-Id: Ib366db1a4e6a079f1a0851e469b402cddae76714

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43680

llvm-svn: 326783
2018-03-06 13:48:20 +00:00
Bjorn Pettersson e0050d7f16 Fixup for rL326769 (RegState::Debug is being truncated to a bool)
I obviously messed up arguments to MachineOperand::CreateReg
in rL326769. This should make it work as intended.

Thanks to RKSimon for spotting this.

llvm-svn: 326780
2018-03-06 13:23:28 +00:00
Florian Hahn f0a25f7253 [CloneFunction] Support BB == PredBB in DuplicateInstructionsInSplit.
In case PredBB == BB and StopAt == BB's terminator, StopAt != &*BI will
fail, because BB's terminator instruction gets replaced.

By using BB.getTerminator() we get the current terminator which we can use
to compare.

Reviewers: sanjoy, anna, reames

Reviewed By: anna

Differential Revision: https://reviews.llvm.org/D43822

llvm-svn: 326779
2018-03-06 13:12:32 +00:00
Dylan McKay 8f46486c65 [AVR] Remove the earlyclobber flag from LDDWRdYQ
Before I started maintaining the AVR backend, this instruction
never originally used to have an earlyclobber flag.

Some time afterwards (years ago), I must've added it back in, not realising that it
was left out for a reason.

This pseudo instrction exists solely to work around a long standing bug
in the register allocator.

Before this commit, the LDDWRdYQ pseudo was not actually working around
any bug. With the earlyclobber flag removed again, the LDDWRdYQ pseudo
now correctly works around PR13375 again.

llvm-svn: 326774
2018-03-06 11:20:25 +00:00
Bjorn Pettersson bdf0c00187 [DebugInfo] Discard invalid DBG_VALUE instructions in LiveDebugVariables
Summary:
This is a workaround for pr36417
https://bugs.llvm.org/show_bug.cgi?id=36417

LiveDebugVariables will now verify that the DBG_VALUE instructions
are sane (prior to register allocation) by asking LIS if a virtual
register used in the DBG_VALUE is live (or dead def) in the slot
index before the DBG_VALUE. If it isn't sane the DBG_VALUE is
discarded.

One pass that was identified as introducing non-sane DBG_VALUE
instructtons, when analysing pr36417, was the DAG->DAG Instruction
Selection. It sometimes inserts DBG_VALUE instructions referring to
a virtual register that is defined later in the same basic block.
So it is a use before def kind of problem. The DBG_VALUE is
typically inserted in the beginning of a basic block when this
happens. The problem can be seen in the test case
test/DebugInfo/X86/dbg-value-inlined-parameter.ll

Reviewers: aprantl, rnk, probinson

Reviewed By: aprantl

Subscribers: vsk, davide, alexcrichton, Ka-Ka, eraman, llvm-commits, JDevlieghere

Differential Revision: https://reviews.llvm.org/D43956

llvm-svn: 326769
2018-03-06 08:47:07 +00:00
Sam Clegg fa5a04fb86 [WebAssebmly] Remove reloc ordering constraint
The MC layer doesn't currently emit relocations in offset
order for the entire code section so this check was causing
failures on the wasm waterfall.

Perhaps we can re-instate this check if we divide the relocations
per-function, or add extra ordering the MC object writer.

Differential Revision: https://reviews.llvm.org/D44136

llvm-svn: 326765
2018-03-06 07:13:10 +00:00
Martin Storsjo a7adc3185b [X86] Handle EAX being live when calling chkstk for x86_64
EAX can turn out to be alive here, when shrink wrapping is done
(which is allowed when using dwarf exceptions, contrary to the
normal case with WinCFI).

This fixes PR36487.

Differential Revision: https://reviews.llvm.org/D43968

llvm-svn: 326764
2018-03-06 06:00:13 +00:00
Serge Pavlov d43c0e1cb2 Updated docs in CrashRecoveryContext.h
Differential Revision: https://reviews.llvm.org/D43200

llvm-svn: 326763
2018-03-06 04:00:30 +00:00
Paul Robinson 732e443bb9 Revert "[DWARFv5] Emit file 0 to the line table."
Caused an asan failure.

This reverts commit d54883f081186cdcce74e6f98cfc0438579ec019.
aka r326758

llvm-svn: 326762
2018-03-06 03:15:21 +00:00
Xin Tong 8fd561f572 [MergeICmp] Simplify how BCECmpBlock instructions are blacklisted
llvm-svn: 326761
2018-03-06 02:24:02 +00:00
Xin Tong 98af9efca5 [MergeICmp] Fix printing. NFC
llvm-svn: 326760
2018-03-06 02:04:57 +00:00
Paul Robinson d5069ba3da [DWARFv5] Emit file 0 to the line table.
DWARF v5 specifies that the root file (also given in the DW_AT_name
attribute of the compilation unit DIE) should be emitted explicitly to
the line table's list of files.  This makes the line table more
independent of the .debug_info section.

Differential Revision: https://reviews.llvm.org/D44054

llvm-svn: 326758
2018-03-06 01:59:56 +00:00
Reid Kleckner 9e0c61b901 Disable llvm-opt-fuzzer/exec-options.ll on Windows, it is too flaky
llvm-svn: 326752
2018-03-05 23:18:13 +00:00
Simon Pilgrim 53ff5ae8a1 [X86] cvttpd2dq lowering has been supported for some time
Tests in vec_fp_to_int.ll 

llvm-svn: 326751
2018-03-05 23:00:39 +00:00
Sanjay Patel 62a4f5c212 [InstSimplify] remove redundant folds
The 'hasOneUse' check is a giveaway that something's not right.
We never need to check that in InstSimplify because we don't
create new instructions here.

These are all handled as icmp simplifies which then trigger
existing select simplifies, so there's no need to duplicate 
a composite fold of the two.

llvm-svn: 326750
2018-03-05 22:46:48 +00:00
Volkan Keles 2bc42e90ed GlobalISel: IRTranslate llvm.fabs.* intrinsic
Summary:
Fabs is a common floating-point operation, especially for some expansions. This patch adds
a new generic opcode for llvm.fabs.* intrinsic in order to avoid building/matching this intrinsic.

Reviewers: qcolombet, aditya_nandakumar, dsanders, rovka

Reviewed By: aditya_nandakumar

Subscribers: kristof.beyls, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D43864

llvm-svn: 326749
2018-03-05 22:31:55 +00:00
Daniel Neilson 82daad31fe [RewriteStatepoints] Fix stale parse points
Summary:
RewriteStatepointsForGC collects parse points for further processing.
During the collection if a callsite is found in an unreachable block
(DominatorTree::isReachableFromEntry()) then all unreachable blocks are
removed by removeUnreachableBlocks(). Some of the removed blocks could
have been reachable according to DominatorTree::isReachableFromEntry().
In this case the collected parse points became stale and resulted in a
crash when accessed.

The fix is to unconditionally canonicalize the IR to
removeUnreachableBlocks and then collect the parse points.

The added test crashes with the old version and passes with this patch.

Patch by Yevgeny Rouban!

Reviewed by: Anna

Differential Revision: https://reviews.llvm.org/D43929

llvm-svn: 326748
2018-03-05 22:27:30 +00:00
Simon Pilgrim 74ff6ff437 [X86] Add silvermont fp arithmetic cost model tests
Add silvermont to existing high coverage tests instead of repeating in slm-arith-costs.ll

llvm-svn: 326747
2018-03-05 22:13:22 +00:00
Tony Tye bf320ee335 [AMDGPU] Remove unused AMDOpenCL triple environment
Differential Revision: https://reviews.llvm.org/D43895

llvm-svn: 326745
2018-03-05 21:39:41 +00:00
Dylan McKay 6119b79a88 [AVR] Fix the test suite after r326500.
r326500 subtly changed the way the instructions are printed.

llvm-svn: 326742
2018-03-05 20:56:25 +00:00
Alexey Bataev 625ce229b1 [SLP] Additional tests for stores vectorization, NFC.
llvm-svn: 326740
2018-03-05 20:20:12 +00:00
Daniel Sanders a09751e779 Re-commit: Make STATISTIC() values available programmatically
Summary:
It can be useful for tools to be able to retrieve the values of variables
declared via STATISTIC() directly without having to emit them and parse
them back. Use cases include:
* Needing to report specific statistics to a test harness
* Wanting to post-process statistics. For example, to produce a percentage of
  functions that were fully selected by GlobalISel

Make this possible by adding llvm::GetStatistics() which returns an
iterator_range that can be used to inspect the statistics that have been
touched during execution. When statistics are disabled (NDEBUG and not
LLVM_ENABLE_STATISTICS) this method will return an empty range.

This patch doesn't address the effect of multiple compilations within the same
process. In such situations, the statistics will be cumulative for all
compilations up to the GetStatistics() call.

Reviewers: qcolombet, rtereshin, aditya_nandakumar, bogner

Reviewed By: rtereshin, bogner

Subscribers: llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D43901

This re-commit fixes a missing include of <vector> which it seems clang didn't
mind but G++ and MSVC objected to. It seems that, clang was ok with std::vector
only being forward declared at the point of use since it was fully defined
eventually but G++/MSVC both rejected it at the point of use.

llvm-svn: 326738
2018-03-05 19:38:16 +00:00
Dmitry Mikulin 430c7ff732 On Windows we need to be able to process response files with Windows-style
path names.

Differential Revision: https://reviews.llvm.org/D43988

llvm-svn: 326737
2018-03-05 19:34:33 +00:00
Nemanja Ivanovic 6cc31ca814 [PowerPC] Do not emit record-form rotates when record-form andi suffices
Up until Power9, the performance profile for rlwinm., rldicl. and andi. looked
more or less equivalent. However with Power9, the rotates are still 2-way
cracked whereas the and-immediate is not.

This patch just ensures that we don't emit record-form rotates when an andi.
is adequate.

As first pointed out by Carrot in https://bugs.llvm.org/show_bug.cgi?id=30833
(this patch is a fix for that PR).

Differential Revision: https://reviews.llvm.org/D43977

llvm-svn: 326736
2018-03-05 19:27:16 +00:00
Sanjay Patel 77ae82b84a [x86] auto-generate full checks for fabs tests
Also, change the x86-64 test to optimized and remove the 
unnecessary platform specification from the RUN lines..

llvm-svn: 326735
2018-03-05 19:11:20 +00:00
Dmitry Mikulin 0faf7c8de2 On Windows expansion of regex file name patterns is the responsibility of each
tool. Fix ar to do that.

Differential Revision: https://reviews.llvm.org/D43987

llvm-svn: 326734
2018-03-05 18:54:56 +00:00
Eric Liu 47f42c2167 Fix an unused variable warning introduced by rr326703. NFC
llvm-svn: 326732
2018-03-05 18:36:39 +00:00
Aaron Smith 5ab08cfd23 [llvm-pdbdump] Dump restrict type qualifier
Reviewers: zturner, llvm-commits, rnk

Reviewed By: zturner

Subscribers: majnemer

Differential Revision: https://reviews.llvm.org/D43639

llvm-svn: 326731
2018-03-05 18:29:43 +00:00
Daniel Neilson bdda115e19 [InstCombine] Don't blow up in foldICmpWithCastAndCast on vector icmp instructions.
Summary:
Presently, InstCombiner::foldICmpWithCastAndCast() implicitly assumes that it is
only invoked with icmp instructions of integer type. If that assumption is broken,
and it is called with an icmp of vector type, then it fails (asserts/crashes).

This patch addresses the deficiency. It allows it to simplify
icmp (ptrtoint x), (ptrtoint/c) of vector type into a compare of the inputs,
much as is done when the type is integer.

Reviewers: apilipenko, fedor.sergeev, mkazantsev, anna

Reviewed By: anna

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D44063

llvm-svn: 326730
2018-03-05 18:05:51 +00:00
Craig Topper 8452faceae [InstCombine] Add constant vector support to getMinimumFPType for visitFPTrunc.
This patch teaches getMinimumFPType to support shrinking a vector of ConstantFPs. This should improve our ability to combine vector fptrunc with fp binops.

Differential Revision: https://reviews.llvm.org/D43774

llvm-svn: 326729
2018-03-05 18:04:12 +00:00
Daniel Sanders 7612f85df5 Revert r326723: Make STATISTIC() values available programmatically
Despite building cleanly on my machine in three separate configs, it's failing on pretty much all bots due to missing includes among other things. Investigating.

llvm-svn: 326726
2018-03-05 17:52:43 +00:00
Evandro Menezes f29e35afff [AArch64] Harden test case
NFC

llvm-svn: 326724
2018-03-05 17:42:18 +00:00
Daniel Sanders edcf110b23 Make STATISTIC() values available programmatically
Summary:
It can be useful for tools to be able to retrieve the values of variables
declared via STATISTIC() directly without having to emit them and parse
them back. Use cases include:
* Needing to report specific statistics to a test harness
* Wanting to post-process statistics. For example, to produce a percentage of
  functions that were fully selected by GlobalISel

Make this possible by adding llvm::GetStatistics() which returns an
iterator_range that can be used to inspect the statistics that have been
touched during execution. When statistics are disabled (NDEBUG and not
LLVM_ENABLE_STATISTICS) this method will return an empty range.

This patch doesn't address the effect of multiple compilations within the same
process. In such situations, the statistics will be cumulative for all
compilations up to the GetStatistics() call.

Reviewers: qcolombet, rtereshin, aditya_nandakumar, bogner

Reviewed By: rtereshin, bogner

Subscribers: llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D43901

llvm-svn: 326723
2018-03-05 17:41:45 +00:00
Sebastian Pop ac0bfb5938 fix PR36582
The error occurs when reading i16 elements (as in the testcase) from a v8i8
with a pattern of <0,2,4,6>. As all the data in the vector is accessed, the
operation is not a VUZP. The patch stops the pattern recognition of VUZP when
EXTRACT_VECTOR_ELT has a different element type than BUILD_VECTOR.

llvm-svn: 326722
2018-03-05 17:35:49 +00:00
Florian Hahn 0b7c6422fb [IPSCCP] Add getCompare which returns either true, false, undef or null.
getCompare returns true, false or undef constants if the comparison can
be evaluated, or nullptr if it cannot. This is in line with what
ConstantExpr::getCompare returns. It also allows us to use
ConstantExpr::getCompare for comparing constants.

Reviewers: davide, mssimpso, dberlin, anna

Reviewed By: davide

Differential Revision: https://reviews.llvm.org/D43761

llvm-svn: 326720
2018-03-05 17:33:50 +00:00
Evandro Menezes cd855f70c5 [AArch64] Improve code generation of constant vectors
Use the whole gammut of constant immediates available to set up a vector.
Instead of using, for example, `mov w0, #0xffff; dup v0.4s, w0`, which
transfers between register files, use the more efficient `movi v0.4s, #-1`
instead.  Not limited to just a few values, but any immediate value that can
be encoded by all the variants of `FMOV`, `MOVI`, `MVNI`, thus eliminating
the need to there be patterns to optimize special cases.

Differential revision: https://reviews.llvm.org/D42133

llvm-svn: 326718
2018-03-05 17:02:47 +00:00
Jonas Paulsson bc32f7db85 [MachineScheduler] Dump SUnits before calling SchedImpl->initialize()
This is a NFC simple patch that changes the DEBUG dumping in the
MachineScheduler so that the dumping of the built SUnits is done before the
SchedImpl->initialize() is called.

This is better on SystemZ, since it has a strategy that does some dumping at
the start of the region, and it is not possible to easily read it if it is
output above a long list of SU.

Review: Javed Absar
https://reviews.llvm.org/D44089

llvm-svn: 326716
2018-03-05 16:31:49 +00:00
Matt Arsenault e31ab94e97 AMDGPU/GlobalISel: Add InstrMapping for G_EXTRACT
llvm-svn: 326715
2018-03-05 16:25:18 +00:00
Matt Arsenault 71272e6d4e AMDGPU/GlobalISel: Make some G_EXTRACTs legal
As far as I can tell legalization of weird sizes for the
output type isn't implemented.

llvm-svn: 326714
2018-03-05 16:25:15 +00:00
Matt Arsenault 4cc0b85276 AMDGPU: Fix build warning about override
llvm-svn: 326713
2018-03-05 16:25:10 +00:00
Sanjay Patel 53ffabdfcb [CVP] fix formatting; NFC
llvm-svn: 326711
2018-03-05 16:08:34 +00:00
Tim Northover 24c296de77 Fuzzer: remove temporary files after we're done with them.
These were just copies of the relevant fuzzer binary with (presumably)
meaningful suffixes, but accounted for more than 10% of my build
directory (> 8GB). Hard drive space is cheap, but not that cheap.

llvm-svn: 326710
2018-03-05 15:49:00 +00:00
Nicolai Haehnle 7d697857cd TableGen: Resolve all template args simultaneously in ResolveMulticlassDefARgs
Summary:
Use the new resolver interface more explicitly, and avoid traversing
all the initializers multiple times.

Change-Id: I679e86988b309d19f25e6cca8b0b14ea150198a6

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43654

llvm-svn: 326708
2018-03-05 15:21:19 +00:00
Nicolai Haehnle 1faf8689d7 TableGen: Resolve all template args simultaneously in AddSubMultiClass
Summary:
Use the new resolver interface more explicitly, and avoid traversing
all the initializers multiple times.

Change-Id: Ia4dcc6d42dd8b65e6079d318c6a202f36f320fee

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43653

llvm-svn: 326707
2018-03-05 15:21:15 +00:00
Nicolai Haehnle b0cf9e93a6 TableGen: Resolve all template args simultaneously in AddSubClass
Summary:
Use the new resolver interface more explicitly, and avoid traversing
all the initializers multiple times.

Add a test case for a pattern that was broken by an earlier version
of this change.

An additional change is that we now remove *all* template arguments
after resolving them.

Change-Id: I86c828c8cc84c18b052dfe0f64c0d5cbf3c4e13c

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43652

llvm-svn: 326706
2018-03-05 15:21:11 +00:00
Nicolai Haehnle 8ebf7e4dfa TableGen: Reimplement !foreach using the resolving mechanism
Summary:
This changes the syntax of !foreach so that the first "parameter" is
a new syntactic variable: !foreach(x, lst, expr) will define the
variable x within the scope of expr, and evaluation of the !foreach
will substitute elements of the given list (or dag) for x in expr.

Aside from leading to a nicer syntax, this allows more complex
expressions where x is deeply nested, or even constant expressions
in which x does not occur at all.

!foreach is currently not actually used anywhere in trunk, but I
plan to use it in the AMDGPU backend. If out-of-tree targets are
using it, they can adjust to the new syntax very easily.

Change-Id: Ib966694d8ab6542279d6bc358b6f4d767945a805

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits, tpr

Differential Revision: https://reviews.llvm.org/D43651

llvm-svn: 326705
2018-03-05 15:21:04 +00:00
Nicolai Haehnle 0b0eaf7ee2 TableGen: Introduce an abstract variable resolver interface
Summary:
The intention is to allow us to more easily restructure how resolving is
done, e.g. resolving multiple variables simultaneously, or using the
resolving mechanism to implement !foreach.

Change-Id: I4b976b54a32e240ad4f562f7eb86a4d663a20ea8

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43564

llvm-svn: 326704
2018-03-05 15:20:51 +00:00
Alexander Timofeev 2e5eeceeb7 Pass Divergence Analysis data to Selection DAG to drive divergence
dependent instruction selection.

Differential revision: https://reviews.llvm.org/D35267

llvm-svn: 326703
2018-03-05 15:12:21 +00:00
Stefan Pintilie d45db612c6 [Power9] Add more missing instructions to the Power 9 scheduler
Adding more instructions using InstRW so that we can move away from ItinRW
and ultimately have a complete Power 9 scheduler.

llvm-svn: 326701
2018-03-05 14:34:59 +00:00
Nicolai Haehnle 3c80e4c514 TableGen: Allow NAME in template arguments in defm in multiclass
Summary:
NAME has already worked for def in a multiclass, since the (protoype)
record including its NAME variable is created before parsing the
superclasses. Since defm's do not have an associated single record,
support for NAME has to be implemented differently here.

Original test cases provided by Artem Belevich (tra)

Change-Id: I933b74f328c0ff202e7dc23a35b78f3505760cc9

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43656

llvm-svn: 326700
2018-03-05 14:01:38 +00:00
Nicolai Haehnle 0409b28af1 TableGen: Use DefInit::getDef() instead of the type's getRecord()
The former simply makes more sense: we want to access the data here in
the backend, not information about the type.

More importantly, removing users of RecordRecTy::getRecord() allows us
more freedom to refactor the frontend.

Change-Id: Iee8905fd22cdb9b11c42ca03246c03d8fe4dd77f
llvm-svn: 326699
2018-03-05 14:01:30 +00:00
Xin Tong 8345c0e3a5 [MergeICmp] We can discard initial blocks that do other work
Summary:
 We can discard initial blocks that do other work
We do not need to limit ourselves to just the first block in the chain.

Reviewers: courbet, davide

Reviewed By: courbet

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D44029

llvm-svn: 326698
2018-03-05 13:54:47 +00:00
Nicholas Wilson b3748f71df [WebAssembly] Add validation to reloc section
We now check relocations offsets are within range, and the relocation
index is valid.

Also updated tests which contained invalid Wasm files that were
previously not checked.

Differential Revision: https://reviews.llvm.org/D43684

llvm-svn: 326697
2018-03-05 13:32:38 +00:00
Oliver Stannard f20222a83c [ARM][Asm] VMOVSRR and VMOVRRS need sequential S registers
These instructions require that the two S registers are adjacent (but not the R
registers), because only the first register is included in the encoding, but we
were not checking this in the assembler.

Differential revision: https://reviews.llvm.org/D44084

llvm-svn: 326696
2018-03-05 13:27:26 +00:00
Nicholas Wilson c22bfb6b4b [WebAssembly] Reorder reloc sections to come between symtab and name
This is required in order to enable relocs to be validated
as they are read in.

Also update tests with new section ordering.

Differential Revision: https://reviews.llvm.org/D43940

llvm-svn: 326694
2018-03-05 12:59:03 +00:00
Nicholas Wilson 6705c00f4d [WebAssembly] Fix tests with invalid yaml (required CODE section missing)
Differential Revision: https://reviews.llvm.org/D44023

llvm-svn: 326692
2018-03-05 12:28:01 +00:00
Nicholas Wilson 959e737118 [WebAssembly] Attach a name to globals similarly to function naming
This allows LLD to print the name for an InputGlobal when encountering
an error.

Differential Revision: https://reviews.llvm.org/D44033

llvm-svn: 326691
2018-03-05 12:16:32 +00:00
Thomas Preud'homme c699eaa311 Fix location of comment in EmitPopInst
Comment about folding return in LDM was not moved along with the
corresponding code in r242714. This commit fixes that.

llvm-svn: 326690
2018-03-05 11:49:00 +00:00
Yuka Takahashi 41789e46a6 [Bash-autocompletion] Pass all flags in shell command-line to Clang
Previously, we passed "#" to --autocomplete to indicate to enable cc1
flags. For example, when -cc1 or -Xclang was passed to bash, bash
executed `clang --autocomplete=#-<flag they want to complete>`.

However, this was not a good implementation because it depends -Xclang
and -cc1 parsing to shell. So I changed this to pass all flags shell
has, so that Clang can handle them internally.

I had to change many testcases because API spec changed quite a lot.

Reviewers: teemperor, v.g.vassilev

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D39342

llvm-svn: 326684
2018-03-05 08:54:20 +00:00
Clement Courbet 34be1b0288 [MergeICmps][NFC] Improve logging.
llvm-svn: 326683
2018-03-05 08:21:47 +00:00
Craig Topper f546b2c06f [X86] Replace usages of X86Subtarget::hasFp256 with hasAVX. Remove hasFP256.
Almost none of these usages were FP specific. And we had no clear guideliness on when to use hasAVX vs hasFP256.

I might also remove hasInt256 too since its an alias for hasAVX2.

llvm-svn: 326682
2018-03-05 00:13:35 +00:00
Craig Topper f2aae62228 [X86] Add a DAG combine to turn stores of vXi1 constants into scalar stores.
llvm-svn: 326679
2018-03-04 19:33:15 +00:00
Craig Topper 1209eb7d66 [X86] Add a 32-bit mode command line to avx512-mask-op.ll. Add tests for storing v2i1 and v4i1 constants.
llvm-svn: 326678
2018-03-04 19:33:13 +00:00
Craig Topper 4196dd12a2 [DAGCombiner] Add a peekThroughBitcast to MergeStoresOfConstantsOrVecElts to fix a crash if we are storing a bitcast of a constant.
Loading a constant into a k-register in AVX512 requires a bitcast from a scalar constant. In the test case here we have a k-register store that gets split into multiple parts of KNL. MergeConsecutiveStores sees each of these pieces as a consecutive store and looks through the bitcast to find the underly scalar constant. But when we went to create the combined store we didn't look through the same bitcast.

llvm-svn: 326677
2018-03-04 18:51:46 +00:00
Simon Pilgrim 8197b04b9b [X86][X87] Add X87 folded integer arithmetic tests
Add tests for FIADD/FISUB/FISUBR/FIMUL/FIDIV/FIDIVR

Shows we have more FILD stack usage than necessary (arg load, spill, reload to x87)

llvm-svn: 326674
2018-03-04 15:00:19 +00:00
Simon Pilgrim 3a76bc29d7 [X86][MMX] Remove completed _mm_cvtsi32_si64 todo
rL322525 - mmx zero constant support
rL322553 - mmx i32 zero extended value
rL326497 - mmx i64 general constant handling

Not all constants are folded, we generate some on the GPRs (similar to SSE build vector) where appropriate

llvm-svn: 326673
2018-03-04 14:57:26 +00:00
Craig Topper 12c35e1940 [X86] Fix unused variable in release builds.
llvm-svn: 326672
2018-03-04 02:14:16 +00:00
Craig Topper a476026f70 [X86] Combine (store (v1i1 (scalar_to_vector (i8 X)))) -> (store (i8 X)).
llvm-svn: 326670
2018-03-04 01:48:02 +00:00
Craig Topper be31585be8 [X86] Lower v1i1/v2i1/v4i1/v8i1 load/stores to i8 load/store during op legalization if AVX512DQ is not supported.
We were previously doing this with isel patterns. Moving it to op legalization gives us chance to see the required bitcast earlier. And it lets us remove some isel patterns.

llvm-svn: 326669
2018-03-04 01:48:00 +00:00
Fedor Indutny 364b9c2adb [CallSiteSplitting] fix use after-free
Iterating through predecessors of `TailBB` while removing their
terminators leads to use after-free, because the predecessor list is
changing on each removal.

llvm-svn: 326668
2018-03-03 22:34:38 +00:00
Fedor Indutny f9e09c1dd0 [CallSiteSplitting] properly split musttail calls
Summary:
`musttail` calls can't be naively splitted. The split blocks must
include not only the call instruction itself, but also (optional)
`bitcast` and `return` instructions that follow it.

Clone `bitcast` and `ret`, place them into the split blocks, and
remove the tail block when done.

Reviewers: junbuml, mcrosier, davidxl, davide, fhahn

Reviewed By: fhahn

Subscribers: JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D43729

llvm-svn: 326666
2018-03-03 21:40:14 +00:00
Sanjay Patel 9119b844a3 [InstCombine] add test for vectors with undef elts; NFC
llvm-svn: 326661
2018-03-03 18:00:15 +00:00
Sanjay Patel 1a8d5c3d1f [InstCombine] (~X) - (~Y) --> Y - X
llvm-svn: 326660
2018-03-03 17:53:25 +00:00
Sanjay Patel 73eb2d2555 [InstCombine] add tests for notnotsub; NFC
As shown in D44043, we may need this fold in the backend,
but it's also missing in the IR optimizer.

llvm-svn: 326659
2018-03-03 17:20:37 +00:00
Simon Pilgrim ad403a483a [X86] This bit-test TODO has been moved in PR36551
llvm-svn: 326658
2018-03-03 16:31:17 +00:00
Craig Topper d4b6601662 [X86] Remove 'else' after return. NFC
llvm-svn: 326642
2018-03-03 05:18:21 +00:00
Chandler Carruth a4619d9944 [ThinLTO] Revert r325320: Import global variables
This caused some links to fail with ThinLTO due to missing symbols as
well as causing some binaries to have failures at runtime. We're working
with the author to get a test case, but want to get the tree green
again.

Further, it appears to introduce a data race. While the test usage of
threads was disabled in r325361 & r325362, that isn't an acceptable fix.
I've reverted both of these as well. This code needs to be thread safe.
Test cases for this are already on the original commit thread.

llvm-svn: 326638
2018-03-02 23:40:08 +00:00
Craig Topper dbf75c9c79 [LegalizeVectorTypes] When scalarizing the operand of a unary op like TRUNC, use a SCALAR_TO_VECTOR rather than a single element BUILD_VECTOR to convert back to a vector type.
X86 considers v1i1 a legal type under AVX512 and as such a truncate from a v1iX type to v1i1 can be turned into a scalar truncate plus a conversion to v1i1. We would much prefer a v1i1 SCALAR_TO_VECTOR over a one element BUILD_VECTOR.

During lowering we were detecting the v1i1 BUILD_VECTOR as a splat BUILD_VECTOR like we try to do for v2i1/v4i1/etc. In this case we create (select i1 splat_elt, v1i1 all-ones, v1i1 all-zeroes). That goes through some more legalization and we end up with a CMOV choosing between 0 and 1 in scalar and a scalar_to_vector.

Arguably we could detect the v1i1 BUILD_VECTOR and do this better in X86 target code. But just using a SCALAR_TO_VECTOR in legalization is much easier.

llvm-svn: 326637
2018-03-02 23:27:50 +00:00
Dmitry Mikulin 702c14fd79 Implementation of MRI "delete" command.
Differential Revision: https://reviews.llvm.org/D43989

llvm-svn: 326636
2018-03-02 23:23:48 +00:00
Vedant Kumar 7fc591f8bb [AggressiveInstCombine] Use use_empty() instead of !getNumUses(), NFC
use_empty() runs in O(1), whereas getNumUses() runs in O(# uses).

llvm-svn: 326635
2018-03-02 23:22:49 +00:00
Sanjay Patel e29375d04c [InstCombine] rearrange visitFMul; NFCI
Put the simplest non-FMF folds first, so it's easier to
see what's left to fix/group/add with the FMF folds.

llvm-svn: 326632
2018-03-02 23:06:45 +00:00
Adrian Prantl dfe15f36d5 Add DBG_VALUE support to the linear DAG scheduler
The fast/linear DAG scheduler doesn't lower DBG_VALUEs except for
function entry nodes.

Patch by Joshua Cranmer!

Differential Revision: https://reviews.llvm.org/D43028

llvm-svn: 326631
2018-03-02 22:59:51 +00:00
Francis Ricci fe6cbceec2 [llvm-symbolizer] Use correct path when resolving .gnu_debuglink in .debug
Summary:
The symbolizer was checking for .debug as a subdirectory of the
binary file itself, not of the directory containing the binary. This led to
a failure to find split debug info when it was contained in a .debug directory.

Reviewers: rnk, glider, zturner

Subscribers: llvm-commits, aprantl

Differential Revision: https://reviews.llvm.org/D44025

llvm-svn: 326630
2018-03-02 22:56:45 +00:00
Vedant Kumar f69baf64eb [Utils] Salvage debug info in block simplification
In stage2 -O3 builds of llc, this results in small but measurable
increases in the number of variables with locations, and in the number
of unique source variables overall.

(According to llvm-dwarfdump --statistics, there are 123 additional
variables with locations, which is just a 0.006% improvement).

The size of the .debug_loc section of the llc dsym increases by 0.004%.

llvm-svn: 326629
2018-03-02 22:46:48 +00:00
Krzysztof Parzyszek e3e963236a [Hexagon] Generate valignb for shifting shuffles (instead of vdelta)
llvm-svn: 326627
2018-03-02 22:22:19 +00:00
Sameer AbuAsal 2646a41e54 [RISCV] Implement MC relaxations for compressed instructions.
Summary:
     This patch implements relaxation for RISCV in the MC layer.
      The following relaxations are currently handled:
      1) Relax C_BEQZ to BEQ and C_BNEZ to BNEZ in RISCV.
      2) Relax and C_J $imm  to JAL x0, $imm  and CJAL to JAL ra, $imm.

Reviewers: asb, llvm-commits, efriedma

Reviewed By: asb

Subscribers: shiva0217

Differential Revision: https://reviews.llvm.org/D43055

llvm-svn: 326626
2018-03-02 22:04:12 +00:00
Rui Ueyama e403c862cc Make llvm::djbHash an inline function.
Differential Revision: https://reviews.llvm.org/D43644

llvm-svn: 326625
2018-03-02 22:00:38 +00:00
Vedant Kumar 334fa57456 [Utils] Salvage debug info in recursive inst deletion
In stage2 -O3 builds of llc, this results in a 0.3% increase in the
number of variables with locations, and a 0.2% increase in the number of
unique source variables overall.

The size of the .debug_loc section of the llc dsym increases by 0.5%.

llvm-svn: 326621
2018-03-02 21:36:35 +00:00
Vedant Kumar 1425e04146 [unittests] Make some parseIR calls more readable, NFC
llvm-svn: 326620
2018-03-02 21:36:33 +00:00
Sam Clegg bd1716aed1 [WebAssembly] Avoid cast ExprType to wasm::ValType
This cast was causing invalid signatures to be written
for libcall functions.

Add an MC test which includes a call to builtin memcpy.

Differential Revision: https://reviews.llvm.org/D44037

llvm-svn: 326618
2018-03-02 21:33:14 +00:00
Craig Topper c7461e1aad [InstCombine] Rewrite the binary op shrinking in visitFPTrunc to avoid creating overly small ConstantFPs that we'll just need to extend again.
Instead of returning the smaller FP constant we now return the minimal Type the constant can fit into. We also return the Type of the input to any fp extends. The legality checks are then done on just the size of these Types. If we find something profitable we then emit FPTruncs in front of the smaller binop and assume those FPTruncs will be constant folded or combined with any ConstantFPs or fpextends.

Differential Revision: https://reviews.llvm.org/D44038

llvm-svn: 326617
2018-03-02 21:25:18 +00:00
Ulrich Weigand 1785e244eb [SystemZ] Fix test cases after r326613
I forgot to check in the updated test cases after the r326613 commit.

llvm-svn: 326616
2018-03-02 21:22:42 +00:00
Heejin Ahn 0c69a3e3d9 Reland "[WebAssembly] More uses of uint8_t for single byte values"
Summary:
Original change was D43991 (rL326541) and was reverted by rL326571 and
rL326572. This adds also the necessary MCCodeEmitter patch.

Reviewers: sbc100

Subscribers: jfb, dschuff, sbc100, jgravelle-google, sunfish, llvm-commits, ncw

Differential Revision: https://reviews.llvm.org/D44034

llvm-svn: 326614
2018-03-02 20:52:59 +00:00
Ulrich Weigand db16beed8a [SystemZ] Allow LRV/STRV with volatile memory accesses
The byte-swapping loads and stores do not actually perform multiple
accesses to their memory operand, so they are OK to use with volatile
memory operands as well.  Remove overly cautious check.

llvm-svn: 326613
2018-03-02 20:51:59 +00:00
Ulrich Weigand 8b19be46c7 [SystemZ] Add support for anyregcc calling convention
This adds back-end support for the anyregcc calling convention
for use with patchpoints.

Since all registers are considered call-saved with anyregcc
(except for 0 and 1 which may still be clobbered by PLT stubs
and the like), this required adding support for saving and
restoring vector registers in prologue/epilogue code for the
first time.  This is not used by any other calling convention.

llvm-svn: 326612
2018-03-02 20:40:11 +00:00