Commit Graph

236657 Commits

Author SHA1 Message Date
Matthias Braun c0d2a617f7 llc: Move pass query/add code into an own function; NFC
llvm-svn: 275663
2016-07-16 02:24:15 +00:00
Matthias Braun c92a5fc9f6 ARM/MIR: Move test from MIR to CodeGen/ARM directory
test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir is an actual test for the ARM
load store optimization pass and not a test of the mir parser/printer.

It belongs to test/CodeGen/ARM; This also updates the test to use the
new -run-pass llc syntax.

llvm-svn: 275662
2016-07-16 02:24:13 +00:00
Matthias Braun 8f456fb18f ARM: Initialize LoadStore passes in TargetMachine
Initializing them in LLVMInitializeARMTarget() makes them visible early
enough for "llc -run-pass usage".

This required the pass to be renamed from "arm-load-store-opt" to
"arm-ldst-opt", because there already exists an arm-load-store-opt
cl::opt switch which would now clash with the passname getting added as
a switch in opt. On the bright side the pass name now matches the
DEBUG_TYPE name. Renamed "arm-prera-load-store-opt" to
"arm-repra-ldst-opt" as well for consistency.

llvm-svn: 275661
2016-07-16 02:24:10 +00:00
Rui Ueyama 0ff953e811 Use SymbolVersion::Id instead of a hard-coded local variable.
llvm-svn: 275660
2016-07-16 02:00:43 +00:00
Eric Christopher 7a0b7dfd05 Reword comment to be more clear.
llvm-svn: 275659
2016-07-16 01:55:45 +00:00
Matthias Braun 5d00b3213e MIParser: reject subregister indexes on physregs
llvm-svn: 275658
2016-07-16 01:36:18 +00:00
Richard Smith 3bfed96632 Fix modules buildbot after r275633.
llvm-svn: 275657
2016-07-16 01:05:39 +00:00
Justin Lebar 8d56f47cfe Don't do uint64_t(1) << 64 in maxUIntN.
Summary:
This shift is undefined behavior (and, as compiled by clang, gives the
wrong answer for maxUIntN(64)).

Reviewers: mkuper

Subscribers: llvm-commits, jroelofs, rsmith

Differential Revision: https://reviews.llvm.org/D22430

llvm-svn: 275656
2016-07-16 00:59:41 +00:00
Eric Christopher 2a7248f06b Remove extra semi-colon. Fixes warning and Werror bots.
llvm-svn: 275655
2016-07-16 00:58:34 +00:00
Erik Pilkington 29099ded0c [ObjC] Implement @available in the Parser and AST
This patch adds a new AST node: ObjCAvailabilityCheckExpr, and teaches the
Parser and Sema to generate it. This node represents an availability check of
the form:

  @available(macos 10.10, *);

Which will eventually compile to a runtime check of the host's OS version. This
is the first patch of the feature I proposed here:
http://lists.llvm.org/pipermail/cfe-dev/2016-July/049851.html

Differential Revision: https://reviews.llvm.org/D22171

llvm-svn: 275654
2016-07-16 00:35:23 +00:00
Richard Smith 21b3a032af Reimplement ExternalSemaSource delegation in terms of
MultiplexExternalSemaSource to remove one of the places that needs updating
every time the ExternalSemaSource interface changes.

llvm-svn: 275653
2016-07-16 00:35:14 +00:00
Sean Callanan 85e632f1fe Fixed the location of the Swift bindings in the Xcode build.
$BUILT_PRODUCTS_DIR is usually the same as $CONFIGURATION_BUILD_DIR, but differs
when LLDB is being built BuildAndIntegration, in which case $BUILT_PRODUCTS_DIR
is more accurate.

llvm-svn: 275652
2016-07-16 00:18:24 +00:00
Samuel Antao 2f7b339731 Use std::string instead of StringRef when generating the auxiliar triple in the frontend tool.
llvm-svn: 275651
2016-07-16 00:15:56 +00:00
Samuel Antao 2fd32138ef Attempt to fix breakage caused by r275645 for Windows bots.
llvm-svn: 275650
2016-07-15 23:51:21 +00:00
Kostya Serebryany c135b55ae0 [libFuzzer] add hooks for strstr, strcasestr, strcasecmp, strncasecmp
llvm-svn: 275648
2016-07-15 23:27:19 +00:00
Vedant Kumar 38202c02f0 [llvm-cov] Attempt to appease an older builder
It's using a version of clang which can't (or won't) deduce an implicit
conversion from a SmallString to a StringRef. Write the conversion out
explicitly:

  http://lab.llvm.org:8011/builders/lldb-x86_64-ubuntu-14.04-buildserver/builds/8574

llvm-svn: 275647
2016-07-15 23:15:35 +00:00
Sebastian Pop 8f7d01992c bugpoint: add flag -verbose-errors
The default behavior of bugpoint is to print "<crash>" when it finds a reduced
test that crashes compilation.  With this flag we now can see the output of the
crashing program.  This is useful to make sure it is the same error being
tracked down and not a different error that happens to crash the compiler as
well.

Differential Revision: https://reviews.llvm.org/D22411

llvm-svn: 275646
2016-07-15 23:15:06 +00:00
Samuel Antao d06239d359 [CUDA][OpenMP] Create generic offload action
Summary:
This patch replaces the CUDA specific action by a generic offload action. The offload action may have multiple dependences classier in “host” and “device”. The way this generic offloading action is used is very similar to what is done today by the CUDA implementation: it is used to set a specific toolchain and architecture to its dependences during the generation of jobs.

This patch also proposes propagating the offloading information through the action graph so that that information can be easily retrieved at any time during the generation of commands. This allows e.g. the "clang tool” to evaluate whether CUDA should be supported for the device or host and ptas to easily retrieve the target architecture.

This is an example of how the action graphs would look like (compilation of a single CUDA file with two GPU architectures)
```
0: input, "cudatests.cu", cuda, (host-cuda)
1: preprocessor, {0}, cuda-cpp-output, (host-cuda)
2: compiler, {1}, ir, (host-cuda)
3: input, "cudatests.cu", cuda, (device-cuda, sm_35)
4: preprocessor, {3}, cuda-cpp-output, (device-cuda, sm_35)
5: compiler, {4}, ir, (device-cuda, sm_35)
6: backend, {5}, assembler, (device-cuda, sm_35)
7: assembler, {6}, object, (device-cuda, sm_35)
8: offload, "device-cuda (nvptx64-nvidia-cuda:sm_35)" {7}, object
9: offload, "device-cuda (nvptx64-nvidia-cuda:sm_35)" {6}, assembler
10: input, "cudatests.cu", cuda, (device-cuda, sm_37)
11: preprocessor, {10}, cuda-cpp-output, (device-cuda, sm_37)
12: compiler, {11}, ir, (device-cuda, sm_37)
13: backend, {12}, assembler, (device-cuda, sm_37)
14: assembler, {13}, object, (device-cuda, sm_37)
15: offload, "device-cuda (nvptx64-nvidia-cuda:sm_37)" {14}, object
16: offload, "device-cuda (nvptx64-nvidia-cuda:sm_37)" {13}, assembler
17: linker, {8, 9, 15, 16}, cuda-fatbin, (device-cuda)
18: offload, "host-cuda (powerpc64le-unknown-linux-gnu)" {2}, "device-cuda (nvptx64-nvidia-cuda)" {17}, ir
19: backend, {18}, assembler
20: assembler, {19}, object
21: input, "cuda", object
22: input, "cudart", object
23: linker, {20, 21, 22}, image
```
The changes in this patch pass the existent regression tests (keeps the existent functionality) and resulting binaries execute correctly in a Power8+K40 machine.

Reviewers: echristo, hfinkel, jlebar, ABataev, tra

Subscribers: guansong, andreybokhanko, tcramer, mkuron, cfe-commits, arpith-jacob, carlo.bertolli, caomhin

Differential Revision: https://reviews.llvm.org/D18171

llvm-svn: 275645
2016-07-15 23:13:27 +00:00
Kostya Serebryany 4953a01461 [asan] trying to fix the windows build
llvm-svn: 275644
2016-07-15 23:13:03 +00:00
Duncan P. N. Exon Smith 670900bb9e Reapply "Mips: Avoid implicit iterator conversions, NFC"
This reverts commit r275562, effectively reapplying r275141.  Doug
Gilmore reported that there was an error when bisecting the Mips
buildbot failure, and that r275141 was not to blame after all.  Here is
the green build:
https://dmz-portal.mips.com/bb/builders/LLVM%20with%20integrated%20assembler%20and%20fPIC%20and%20-O0/builds/803

llvm-svn: 275643
2016-07-15 23:09:47 +00:00
Vedant Kumar 554357b623 [llvm-cov] Attempt to appease Windows bots
They appear to reject r275640 because stdin is held open during an
ExecuteAndWait in which it's redirected:

  http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/8390

llvm-svn: 275642
2016-07-15 23:08:22 +00:00
Eugene Zelenko dab35bd67f Fixes for standalone build:
* include CheckAtomic to set HAVE_CXX_ATOMICS64_WITHOUT_LIB properly (introduced in r274121)
* hint Clang CMake files for LLVM CMake files location (inctroduced in ~ r274176)

Differential revision: https://reviews.llvm.org/D22322

llvm-svn: 275641
2016-07-15 22:46:15 +00:00
Vedant Kumar 424f51bb04 [llvm-cov] Optionally use a symbol demangler when preparing reports
Add an option to specify a symbol demangler (as well as options to the
demangler). This can be used to make reports more human-readable.

This option is especially useful in -output-dir mode, since it isn't as
easy to manually pipe reports into a demangler in this mode.

llvm-svn: 275640
2016-07-15 22:44:57 +00:00
Vedant Kumar 6ab6b36475 [llvm-cov] Document a few private fields of CodeCoverageTool (NFC)
llvm-svn: 275639
2016-07-15 22:44:54 +00:00
Vedant Kumar 7a4bd83c6c [Support] Fix a doxygen comment (NFC)
There was a missing "<" on a line, so its contents wrapped around into
the description of the next argument.

llvm-svn: 275638
2016-07-15 22:44:52 +00:00
Junmo Park 45513a8eca Minor code cleanups. NFC.
llvm-svn: 275637
2016-07-15 22:42:52 +00:00
Jacques Pienaar e2f0699d64 [lanai] Small cleanup: remove/comment out unused args
llvm-svn: 275636
2016-07-15 22:38:32 +00:00
Matt Arsenault 73d2f8954a AMDGPU: Fix verifier error from partially undef copy
In this situation:

%VGPR2<def> = BUFFER_LOAD_DWORD_OFFSET %SGPR8_SGPR9_SGPR10_SGPR11,
%VGPR7<def,tied3> = V_MAC_F32_e32 %VGPR0<undef>, %VGPR1<kill>, %VGPR7<kill,tied0>, %EXEC<imp-use>
%VGPR3_VGPR4_VGPR5_VGPR6<def> = COPY %VGPR0_VGPR1_VGPR2_VGPR3
%VGPR4<def> = COPY %VGPR2

The copy for VGPR1 -> VGPR4 was an error from reading undefined VGPR1,
but VGPR4 is defined immediately after this copy.

llvm-svn: 275635
2016-07-15 22:32:02 +00:00
Michael Kuperstein be2e3f5ce5 ExpandPostRAPseudos should transfer implicit uses, not only implicit defs
Previously, we would expand:
%BL<def> = COPY %DL<kill>, %EBX<imp-use,kill>, %EBX<imp-def>
Into:
%BL<def> = MOV8rr %DL<kill>, %EBX<imp-def>
Dropping the imp-use on the floor.

That confused CriticalAntiDepBreaker, which (correctly) assumes that if an
instruction defs but doesn't use a register, that register is dead immediately
before the instruction - while in this case, the high lanes of EBX can be very
much alive.

This fixes PR28560.

Differential Revision: https://reviews.llvm.org/D22425

llvm-svn: 275634
2016-07-15 22:31:14 +00:00
Alexei Starovoitov cfb51f54ba BPF: Use official ELF e_machine value
The same value for EM_BPF is being propagated to glibc,
elfutils, and binutils.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 275633
2016-07-15 22:27:55 +00:00
George Burgess IV 70a65c28a7 Fix a typeo.
(obligatory s/typeo/typo)

llvm-svn: 275632
2016-07-15 22:24:24 +00:00
Jacques Pienaar e650319772 [lanai] Fix build by updating calls to getLoad & getStore.
rL275592 removed the boolean parameters of SelectionDAG::getLoad and getStore, updating Lanai backend's calls to these functions.

llvm-svn: 275631
2016-07-15 22:18:33 +00:00
Argyrios Kyrtzidis d9849a972b [index] Create different USR if a property is a class property.
Avoids USR conflicts between class & instance properties of the same name.

llvm-svn: 275630
2016-07-15 22:18:19 +00:00
Zachary Turner b927e02e1b [pdb] Teach MsfBuilder and other classes about the Free Page Map.
Block 1 and 2 of an MSF file are bit vectors that represent the
list of blocks allocated and free in the file.  We had been using
these blocks to write stream data and other data, so we mark them
as the free page map now.  We don't yet serialize these pages to
the disk, but at least we make a note of what it is, and avoid
writing random data to them.

Doing this also necessitated cleaning up some of the tests to be
more general and hardcode fewer values, which is nice.

llvm-svn: 275629
2016-07-15 22:17:19 +00:00
Zachary Turner 5e534c7fb3 [pdb] Round trip the NameMap data structure to YAML.
llvm-svn: 275628
2016-07-15 22:17:08 +00:00
Zachary Turner faa554b2fd [pdb] Use MsfBuilder to handle the writing PDBs.
Previously we would read a PDB, then write some of it back out,
but write the directory, super block, and other pertinent metadata
back out unchanged.  This generates incorrect PDBs since the amount
of data written was not always the same as the amount of data read.

This patch changes things to use the newly introduced `MsfBuilder`
class to write out a correct and accurate set of Msf metadata for
the data *actually* written, which opens up the door for adding and
removing type records, symbol records, and other types of data to
an existing PDB.

llvm-svn: 275627
2016-07-15 22:16:56 +00:00
Matt Arsenault 93be6e8c0a StructurizeCFG: Fix inverting constantexpr conditions
llvm-svn: 275626
2016-07-15 22:13:16 +00:00
Krzysztof Parzyszek 408e300933 [Hexagon] Handle instruction latency for 0 or 2 cycles
The Hexagon schedulers need to handle instructions with a latency
of 0 or 2 more accurately. The problem, in v60, is that a dependence
between two instructions with a 2 cycle latency can use a .cur version
of the source to achieve a 0 cycle latency when the use is in the
same packet. Any othe use, must be at least 2 packets later, or a
stall occurs. In other words, the compiler does not want to schedule
the dependent instructions 1 cycle later.

To achieve this, the latency adjustment code allows only a single
dependence to have a zero latency. All other instructions have the
other value, which is typically 2 cycles. We use a heuristic to
determine which instruction gets the 0 latency.

The Hexagon machine scheduler was also changed to increase the cost
associated with 0 latency dependences than can be scheduled in the
same packet.

Patch by Brendon Cahoon.

llvm-svn: 275625
2016-07-15 21:34:02 +00:00
Richard Smith 13fb860c78 Revert r275481, r275490. This broke modules bootstrap.
llvm-svn: 275624
2016-07-15 21:33:46 +00:00
Matt Arsenault c7536a5d60 AMDGPU: Remove legacy ldexp builtin
llvm-svn: 275623
2016-07-15 21:33:06 +00:00
Matt Arsenault c86671da09 AMDGPU: Update for rsq intrinsic changes
llvm-svn: 275622
2016-07-15 21:33:02 +00:00
Kostya Serebryany ad0724692e [sanitizers] add interceptor for memmem; add weak hooks for strncasecmp, strcasecmp, strstr, strcasestr, memmem
llvm-svn: 275621
2016-07-15 21:28:58 +00:00
Matt Arsenault a65e6b8335 AMDGPU: Remove brev intrinsic
llvm-svn: 275620
2016-07-15 21:27:13 +00:00
Matt Arsenault 82e5e1e564 AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
llvm-svn: 275619
2016-07-15 21:27:08 +00:00
Matt Arsenault 11d3e21f2b AMDGPU: Remove AMDGPU.ldexp
llvm-svn: 275618
2016-07-15 21:26:56 +00:00
Matt Arsenault 09b2c4aee8 AMDGPU: Remove legacy rsq.clamped intrinsic
Mesa still has a use of llvm.AMDGPU.rsq.f64 remaining.

Also fix mismatch with non-IEEE rsq selecting to IEEE rsq.

llvm-svn: 275617
2016-07-15 21:26:52 +00:00
Matt Arsenault d7f4414543 AMDGPU/R600: Delete dead code.
Dead or the same as the base implementation.

llvm-svn: 275616
2016-07-15 21:26:46 +00:00
Saleem Abdulrasool ea6a4fe841 DebugInfo: reorder some initializers
Fix a few initialization ordering warnings from gcc from `-Wreorder`.  NFC.

llvm-svn: 275615
2016-07-15 21:10:31 +00:00
Saleem Abdulrasool 467269a40e CodeGen: avoid emitting unnecessary CFI
Remove unnecessary clutter in assembly output.  When using SjLj EH, the CFI is
not actually used for anything.  Do not emit the CFI needlessly.  The minor test
adjustments are interesting.  The prologue test was just overzealous matcching.
The interesting case is the LSDA change.  It was originally added to ensure that
various compilations did not mangle the name (it explicitly checked the name!).
However, subsequent cleanups made it more reliant on the CFI to find the name.
Parse the generated code flow to generically find the label still.

llvm-svn: 275614
2016-07-15 21:10:29 +00:00
Michael Zolotukhin a78937afb2 Make processInstruction from LCSSA.cpp externally available.
Summary:
When a pass tries to keep LCSSA form it's often convenient to be able to update
LCSSA for a set of instructions rather than for the entire loop. This patch makes the
processInstruction from LCSSA externally available under a name
formLCSSAForInstruction.

Reviewers: chandlerc, sanjoy, hfinkel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22378

llvm-svn: 275613
2016-07-15 21:08:41 +00:00