Commit Graph

147871 Commits

Author SHA1 Message Date
David Blaikie c0bb21f38e Remove the unnecessary virtual dtor from the DIEUnit hierarchy (in favor of protected dtor in the base, final derived classes with public non-virtual dtors)
These objects are never polymorphically owned/destroyed, so the virtual
dtor was unnecessary.

llvm-svn: 301068
2017-04-22 02:18:00 +00:00
Matt Arsenault 01d17e7c5f LowerSwitch: Fix producing invalid IR on unreachable code
If a switch was in an unreachable block that branched
to a block with a phi, it would leave phis with missing
predecessors.

llvm-svn: 301064
2017-04-21 23:54:12 +00:00
David Blaikie 96b1ed50e8 Move Split DWARF handling to an MC option/command line argument rather than using metadata
Since Split DWARF needs to name the actual .dwo file that is generated,
it can't be known at the time the llvm::Module is produced as it may be
merged with other Modules before the object is generated and that object
may be generated with any name.

By passing the Split DWARF file name when LLVM is producing object code
the .dwo file name in the object file can match correctly.

The support for Split DWARF for implicit modules remains the same -
using metadata to store the dwo name and dwo id so that potentially
multiple skeleton CUs referring to different dwo files can be generated
from one llvm::Module.

llvm-svn: 301062
2017-04-21 23:35:26 +00:00
Kuba Mracek 5b4293c7d9 Fixup for r301054: Use an explicit constructor.
llvm-svn: 301061
2017-04-21 23:28:01 +00:00
Easwaran Raman e1bd7cceca Remove a repeated comment line. NFC.
llvm-svn: 301059
2017-04-21 23:12:16 +00:00
Kuba Mracek a04026232e Fixup for r301054: Only use __attribute__((no_sanitize("memory"))) when it's available.
llvm-svn: 301058
2017-04-21 22:58:55 +00:00
Matthias Braun d78597ec08 AArch64FrameLowering: Check if the ExtraCSSpill register is actually unused
The code assumed that when saving an additional CSR register
(ExtraCSSpill==true) we would have a free register throughout the
function. This was not true if this CSR register is also used to pass
values as in the swiftself case.

rdar://31451816

llvm-svn: 301057
2017-04-21 22:42:08 +00:00
Kuba Mracek 71c4043ae9 [libFuzzer] Always build libFuzzer
There are two reasons why users might want to build libfuzzer:
- To fuzz LLVM itself
- To get the libFuzzer.a archive file, so that they can attach it to their code
This change always builds libfuzzer, and supports the second use case if the specified flag is set.

The point of this patch is to have something that can potentially be shipped with the compiler, and this also ensures that the version of libFuzzer is correct to use with that compiler.

Patch by George Karpenkov.

Differential Revision: https://reviews.llvm.org/D32096

llvm-svn: 301054
2017-04-21 22:38:24 +00:00
Craig Topper feaa5514db [APSInt] Use APInt::compare and APInt::compareSigned to implement APSInt::compareValue
APInt just got compare methods that return -1, 0, or 1 instead of just having ult/slt and eq.

This patch uses these methods to implement APSInt::compareValues so that we don't have to call do an equal comparison and then possibly a second less than comparison.

Differential Revision: https://reviews.llvm.org/D32381

llvm-svn: 301053
2017-04-21 22:32:27 +00:00
Craig Topper 19ce7adc7f [APSInt] Make use of APInt's recently acquired in place lshr and shl capabilities in APSInt's >>= and <<= operators.
APInt hasn't acquired an in place ashr yet, but hopefully soon.

llvm-svn: 301052
2017-04-21 22:30:06 +00:00
Adrian Prantl ff384546f5 Add test coverage for mem2reg dbg.declare lowering.
llvm-svn: 301050
2017-04-21 22:13:55 +00:00
Eugene Zelenko 9f5094df36 [Object] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 301049
2017-04-21 22:03:05 +00:00
Hans Wennborg 9b9a5358dd Re-commit r301040 "X86: Don't emit zero-byte functions on Windows"
In addition to the original commit, tighten the condition for when to
pad empty functions to COFF Windows.  This avoids running into problems
when targeting e.g. Win32 AMDGPU, which caused test failures when this
was committed initially.

llvm-svn: 301047
2017-04-21 21:48:41 +00:00
Frederich Munch 5b0887025b [Test commit] Remove extra newline.
llvm-svn: 301046
2017-04-21 21:39:50 +00:00
Matt Arsenault c07bda7b87 InferAddressSpaces: Infer for just GEPs
Fixes leaving intermediate flat addressing computations
where a GEP instruction's source is a constant expression.

Still leaves behind a trivial addrspacecast + gep pair that
instcombine is able to handle, which ideally could be folded
here directly.

llvm-svn: 301044
2017-04-21 21:35:04 +00:00
Xinliang David Li 0e9f6df169 [PartialInliner] Partial inliner needs to check use kind before transformation
Differential Revision: https://reviews.llvm.org/D32373

llvm-svn: 301042
2017-04-21 21:20:56 +00:00
Hans Wennborg 04593000d8 Revert r301040 "X86: Don't emit zero-byte functions on Windows"
This broke almost all bots. Reverting while fixing.

llvm-svn: 301041
2017-04-21 21:10:37 +00:00
Hans Wennborg cb3e810714 X86: Don't emit zero-byte functions on Windows
Empty functions can lead to duplicate entries in the Guard CF Function
Table of a binary due to multiple functions sharing the same RVA,
causing the kernel to refuse to load that binary.

We had a terrific bug due to this in Chromium.

It turns out we were already doing this for Mach-O in certain
situations. This patch expands the code for that in
AsmPrinter::EmitFunctionBody() and renames
TargetInstrInfo::getNoopForMachoTarget() to simply getNoop() since it
seems it was used for not just Mach-O anyway.

Differential Revision: https://reviews.llvm.org/D32330

llvm-svn: 301040
2017-04-21 20:58:12 +00:00
Zachary Turner 0fc009b008 Add a dependency from llvm/test to llvm-cvtres.
llvm-svn: 301038
2017-04-21 20:45:11 +00:00
Tim Northover 1efaa3a88f AArch64: add test for "fence singlethread"
Forgot a git add yesterday.

llvm-svn: 301037
2017-04-21 20:36:08 +00:00
Tim Northover e31cf3f824 ARM: make sure we use all entries in a vector before forming a vpaddl.
Otherwise there's some mismatch, and we'll either form an illegal type or an
illegal node.

Thanks to Eli Friedman for pointing out the problem with my original solution.

llvm-svn: 301036
2017-04-21 20:35:52 +00:00
Sanjay Patel 8ce1d4cbe1 [InstCombine] revert r300977 and r301021
This can cause an inf-loop. Investigating...

llvm-svn: 301035
2017-04-21 20:29:17 +00:00
Zachary Turner f9161bd1d5 Fixed a type conversion error in BitVector.
llvm-svn: 301033
2017-04-21 20:18:43 +00:00
Zachary Turner dbd1c5cda3 [BitVector] Make BitVector store an ArrayRef.
This makes certain operations on the underlying storage
easier since we have access to ArrayRef methods such as
drop_front, drop_back, slice, range-based for loops, etc.

Differential Revision: https://reviews.llvm.org/D32367

llvm-svn: 301031
2017-04-21 20:12:08 +00:00
Adrian Prantl 1a18f1ad10 typo
llvm-svn: 301030
2017-04-21 20:06:41 +00:00
Konstantin Zhuravlyov f628406bbd AMDGPU/GFX9: Enable FastFMAF32
Differential Revision: https://reviews.llvm.org/D32363

llvm-svn: 301029
2017-04-21 19:57:53 +00:00
Konstantin Zhuravlyov 3d1cc88c68 AMDGPU: Temporarily disable packed inlinable literals (v2f16, v2i16)
Differential Revision: https://reviews.llvm.org/D32361

llvm-svn: 301028
2017-04-21 19:45:22 +00:00
Konstantin Zhuravlyov 88938d4e67 AMDGPU: Fix S_PACK_HH_B32_B16
- We really ought to zero out lower 16 bits

Differential Revision: https://reviews.llvm.org/D32356

llvm-svn: 301026
2017-04-21 19:35:05 +00:00
Yaxun Liu 15a96b1dc8 [AMDGPU] Handle SI_MASKED_UNREACHABLE in instruction emitter
SI_MASKED_UNREACHABLE does not have machine instruction encoding.
It needs special handling in AMDGPUAsmPrinter::EmitInstruction like some
other pseudo instructions.

This patch fixes compilation failure of RadeonRays.

Differential Revision: https://reviews.llvm.org/D32364

llvm-svn: 301025
2017-04-21 19:32:02 +00:00
Matthias Braun 1a9062408f Revert "X86RegisterInfo: eliminateFrameIndex: Avoid code duplication; NFC"
It seems we have on situation in a sanitizer enable bootstrap build
where the return instruction has a frame index operand that does not
point to a fixed object and fails the assert added here.

This reverts commit r300923.
This reverts commit r300922.

llvm-svn: 301024
2017-04-21 19:26:45 +00:00
Konstantin Zhuravlyov c4b18e7099 AMDGPU: Do not lower fast unsafe div for safe, f32, with fp32 denormals
Differential Revision: https://reviews.llvm.org/D32085

llvm-svn: 301023
2017-04-21 19:25:33 +00:00
Sanjay Patel 0f001a4701 [InstCombine] use isSubsetOf() for efficiency
C | ~D == -1
~(C | ~D) == 0
~C & D == 0
D & ~C == 0
D.isSubsetOf(C)

llvm-svn: 301021
2017-04-21 19:16:52 +00:00
Akira Hatanaka 22e839f4b2 [AArch64] Improve code generation for logical instructions taking
immediate operands.

This commit adds an AArch64 dag-combine that optimizes code generation
for logical instructions taking immediate operands. The optimization
uses demanded bits to change a logical instruction's immediate operand
so that the immediate can be folded into the immediate field of the
instruction.

This recommits r300932 and r300930, which was causing dag-combine to
loop forever. The problem was that optimizeLogicalImm was returning
true even when there was no change to the immediate node (which happened
when the immediate was all zeros or ones), which caused dag-combine to
push and pop the same node to the work list over and over again without
making any progress.

This commit fixes the bug by returning false early in optimizeLogicalImm
if the immediate is all zeros or ones. Also, it changes the code to
compare the immediate with 0 or Mask rather than calling
countPopulation.

rdar://problem/18231627

Differential Revision: https://reviews.llvm.org/D5591

llvm-svn: 301019
2017-04-21 18:53:12 +00:00
Artur Pilipenko 134d94f9a3 [InstCombine] fadd double (sitofp x), y check that the promotion is valid
Doing these transformations check that the result of integer addition is representable in the FP type.

(fadd double (sitofp x), fpcst) --> (sitofp (add int x, intcst))
(fadd double (sitofp x), (sitofp y)) --> (sitofp (add int x, y))

This is a fix for https://bugs.llvm.org//show_bug.cgi?id=27036

Reviewed By: andrew.w.kaylor, scanon, spatel

Differential Revision: https://reviews.llvm.org/D31182

llvm-svn: 301018
2017-04-21 18:45:25 +00:00
Kuba Mracek c3ecc4b314 Fixup for r301007: Restrict the -D hack to Darwin.
llvm-svn: 301017
2017-04-21 18:19:56 +00:00
Zachary Turner 492674ec2a [BitVector] Add find_last() and find_last_unset().
Differential Revision: https://reviews.llvm.org/D32302

llvm-svn: 301014
2017-04-21 18:07:46 +00:00
Kuba Mracek 81acbf3daa Revert r301010: Bot failures on Windows, NetBSD and even some old Darwin.
llvm-svn: 301012
2017-04-21 18:02:22 +00:00
Kuba Mracek a0ab8c2e40 [libFuzzer] Always build libFuzzer
There are two reasons why users might want to build libfuzzer:
- To fuzz LLVM itself
- To get the libFuzzer.a archive file, so that they can attach it to their code
This change always builds libfuzzer, and supports the second use case if the specified flag is set.

The point of this patch is to have something that can potentially be shipped with the compiler, and this also ensures that the version of libFuzzer is correct to use with that compiler.

Patch by George Karpenkov.

Differential Revision: https://reviews.llvm.org/D32096

llvm-svn: 301010
2017-04-21 17:47:44 +00:00
Kuba Mracek 309182a7d3 [libFuzzer] Changing thread_local to __thread in libFuzzer
Old Apple compilers do not support thread_local keyword. This patch adds -Dthread_local=__thread when the compiler doesn't support thread_local.

Differential Revision: https://reviews.llvm.org/D32312

llvm-svn: 301007
2017-04-21 17:39:50 +00:00
Zachary Turner ae68a2e82a Add llvm-cvtres to LLVMBuild.txt
It wasn't getting picked up as an implicit project, so it wasn't
being built.

llvm-svn: 301006
2017-04-21 17:37:31 +00:00
Joel Jones a7c4a52188 [AArch64] Refactor instruction selection lowering for addresses. NFCI
Factor out the common code used for generating addresses into common
templated functions that call overloaded versions of a new function,
getTargetNode.

Tested with make check-llvm with targets AArch64.

Differential Revision: https://reviews.llvm.org/D32169

llvm-svn: 301005
2017-04-21 17:31:03 +00:00
Zachary Turner 087edfa2e8 Add empty shell of llvm-cvtres.
This marks the beginning of an effort to port remaining
MSVC toolchain miscellaneous utilities to all platforms.

Currently clang-cl shells out to certain additional tools
such as the IDL compiler, resource compiler, and a few
other tools, but as these tools are Windows-only it
limits the ability of clang to target Windows on other
platforms.  having a full suite of these tools directly
in LLVM should eliminate this constraint.

The current implementation provides no actual functionality,
it is just an empty skeleton executable for the purposes
of making incremental changes.

Differential Revision: https://reviews.llvm.org/D32095
Patch by Eric Beckmann (ecbeckmann@google.com)

llvm-svn: 301004
2017-04-21 17:30:29 +00:00
Tim Northover 1061ccca8c ARM: don't try to create an i8 -> i32 vpaddl.
DAG combine was mistakenly assuming that the step-up it was looking at was
always a doubling, but it can sometimes be a larger extension in which case
we'd crash.

llvm-svn: 301002
2017-04-21 17:21:59 +00:00
Kuba Mracek 9eb170fede [libFuzzer] Check for target(popcnt) capability before usage
Older compilers (e.g. LLVM 3.4) do not support the attribute target("popcnt").
In order to support those, this diff check the attribute support using the preprocessor.

Patch by George Karpenkov.

Differential Revision: https://reviews.llvm.org/D32311

llvm-svn: 300999
2017-04-21 16:57:37 +00:00
Craig Topper 72f31a8381 [ValueTracking] Use APInt::setAllBits and APInt::intersects to simplify some code. NFC
llvm-svn: 300997
2017-04-21 16:43:32 +00:00
Craig Topper 1dc8fc8bfa [APInt] Add compare/compareSigned methods that return -1, 0, 1. Reimplement slt/ult and friends using them
Currently sle and ule have to call slt/ult and eq to get the proper answer. This results in extra code for both calls and additional scans of multiword APInts.

This patch replaces slt/ult with a compareSigned/compare that can return -1, 0, or 1 so we can cover all the comparison functions with a single call.

While I was there I removed the activeBits calls and other checks at the start of the slow part of ult. Both of the activeBits calls potentially scan through each of the APInts separately. I can't imagine that's any better than just scanning them in parallel and doing the compares. Now we just share the code with tcCompare.

These changes seem to be good for about a 7-8k reduction on the size of the opt binary on my local x86-64 build.

Differential Revision: https://reviews.llvm.org/D32339

llvm-svn: 300995
2017-04-21 16:13:15 +00:00
Juergen Ributzka a66f42caa9 Remove empty and unused header file.
llvm-svn: 300994
2017-04-21 16:05:01 +00:00
Daniel Sanders e7b0d66080 [globalisel][tablegen] Import SelectionDAG's rule predicates and support the equivalent in GIRule.
Summary:
The SelectionDAG importer now imports rules with Predicate's attached via
Requires, PredicateControl, etc. These predicates are implemented as
bitset's to allow multiple predicates to be tested together. However,
unlike the MC layer subtarget features, each target only pays for it's own
predicates (e.g. AArch64 doesn't have 192 feature bits just because X86
needs a lot).

Both AArch64 and X86 derive at least one predicate from the MachineFunction
or Function so they must re-initialize AvailableFeatures before each
function. They also declare locals in <Target>InstructionSelector so that
computeAvailableFeatures() can use the code from SelectionDAG without
modification.

Reviewers: rovka, qcolombet, aditya_nandakumar, t.p.northover, ab

Reviewed By: rovka

Subscribers: aemerson, rengolin, dberris, kristof.beyls, llvm-commits, igorb

Differential Revision: https://reviews.llvm.org/D31418

llvm-svn: 300993
2017-04-21 15:59:56 +00:00
Craig Topper 7af078847c [SimplifyCFG] Fix the determination of PostBB in conditional store merging to handle the targets on the second branch being commuted
Currently we choose PostBB as the single successor of QFB, but its possible that QTB's single successor is QFB which would make QFB the correct choice.

Differential Revision: https://reviews.llvm.org/D32323

llvm-svn: 300992
2017-04-21 15:53:42 +00:00
Wei Mi 337d4d95c2 [ConstHoisting] Add BFI in constanthoisting pass and select the best insertion
places based on it.

Existing constant hoisting pass will merge a group of contants in a small range
and hoist the const materialization code to the common dominator of their uses.
However, if the uses are all in cold pathes, existing implementation may hoist
the materialization code from cold pathes to a hot place. This may hurt performance.
The patch introduces BFI to the pass and selects the best insertion places based
on it.

The change is controlled by an option consthoist-with-block-frequency which is
off by default for now.

Differential Revision: https://reviews.llvm.org/D28962

llvm-svn: 300989
2017-04-21 15:50:16 +00:00