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Commit Graph

Author	SHA1	Message	Date
Alex Bradbury	7539fa2c2d	[RISCV] Implement RV64D codegen This patch: * Adds necessary RV64D codegen patterns * Modifies CC_RISCV so it will properly handle f64 types (with soft float ABI) Note that in general there is no reason to try to select fcvt.w[u].d rather than fcvt.l[u].d for i32 conversions because fptosi/fptoui produce poison if the input won't fit into the target type. Differential Revision: https://reviews.llvm.org/D53237 llvm-svn: 352833	2019-02-01 03:53:30 +00:00
Alex Bradbury	60baa2e015	[RISCV] Codegen support for RV32D floating point conversion operations This also includes support and a test for truncating stores, which are now possible thanks to the fpround pattern. llvm-svn: 329876	2018-04-12 05:47:15 +00:00

Author

SHA1

Message

Date

Alex Bradbury

7539fa2c2d

[RISCV] Implement RV64D codegen

This patch:
* Adds necessary RV64D codegen patterns
* Modifies CC_RISCV so it will properly handle f64 types (with soft float ABI)

Note that in general there is no reason to try to select fcvt.w[u].d rather than fcvt.l[u].d for i32 conversions because fptosi/fptoui produce poison if the input won't fit into the target type.

Differential Revision: https://reviews.llvm.org/D53237

llvm-svn: 352833

2019-02-01 03:53:30 +00:00

Alex Bradbury

60baa2e015

[RISCV] Codegen support for RV32D floating point conversion operations

This also includes support and a test for truncating stores, which are now
possible thanks to the fpround pattern.

llvm-svn: 329876

2018-04-12 05:47:15 +00:00

2 Commits