cca83a7aa4
remove 64-bit or_is_add parallels.
...
llvm-svn: 99360
2010-03-24 00:16:52 +00:00
f5e5004327
remove useless or_is_add parallel's.
...
llvm-svn: 99359
2010-03-24 00:15:23 +00:00
237d38e748
reduce nesting.
...
llvm-svn: 99358
2010-03-24 00:12:57 +00:00
38c99662ff
implement SDTCisVTSmallerThanOp with EnforceSmallerThan
...
instead of reimplementing it wrong and poorly.
llvm-svn: 99357
2010-03-24 00:06:46 +00:00
e0874fa02f
try being more permissive for if-conversion on ARM V7. see what the nightly
...
test run permformance numbers say as to whether it helps.
llvm-svn: 99355
2010-03-24 00:03:13 +00:00
57ebf63da7
bring sanity to EnforceVectorEltType
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llvm-svn: 99354
2010-03-24 00:01:16 +00:00
6070ee2a58
Cleanup getImplicitType
...
llvm-svn: 99353
2010-03-23 23:50:31 +00:00
a86ccbfe88
Revert "Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings."
...
This reverts commit 99345. It was breaking buildbots.
llvm-svn: 99352
2010-03-23 23:48:51 +00:00
5376c2a431
MC: Sprinkle in some more interesting statistics.
...
llvm-svn: 99350
2010-03-23 23:47:14 +00:00
b09b8906cb
llvm-mc: Support -filetype=null, for timing purposes.
...
llvm-svn: 99349
2010-03-23 23:47:12 +00:00
5cfb58719d
llvm-mc: Fast path EvaluateAbsolute of constants.
...
llvm-svn: 99348
2010-03-23 23:47:07 +00:00
b424faa09c
reject void in intrinsic type lists.
...
llvm-svn: 99347
2010-03-23 23:46:27 +00:00
3d9ec39116
[llvm_void_ty] is no longer needed for result types,
...
just use an empty result list.
llvm-svn: 99346
2010-03-23 23:46:07 +00:00
31da45b7af
Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings.
...
This is work in progress. So far, SSE execution domain tables are added to
X86InstrInfo, and a skeleton pass is enabled with -sse-domain-fix.
llvm-svn: 99345
2010-03-23 23:14:44 +00:00
6a64320da8
Renamed NVdImmFrm to N1RegModImmFrm.
...
llvm-svn: 99344
2010-03-23 23:09:14 +00:00
703d0b978a
Remove if DISABLED not if not DISABLED...
...
llvm-svn: 99343
2010-03-23 23:09:03 +00:00
00eeac4179
add some accessors to callsite/callinst/invokeinst to check
...
for the noinline attribute, and make the inliner refuse to
inline a call site when the call site is marked noinline even
if the callee isn't. This fixes PR6682.
llvm-svn: 99341
2010-03-23 22:59:07 +00:00
c53d5d6bb4
Revert 99335. getTypeToExpandTo's iterative behavior is actually
...
needed here.
llvm-svn: 99339
2010-03-23 22:44:42 +00:00
c941619a73
Use "DISABLE_EDIS" to disable building "edis" explicitly. Don't build it for
...
Apple-style builds.
llvm-svn: 99336
2010-03-23 22:15:33 +00:00
42f8ddeb11
Remove getTypeToExpandTo, since it isn't adding much value
...
beyond just calling getTypeToTransformTo.
llvm-svn: 99335
2010-03-23 22:15:31 +00:00
7d32580e5a
make sure to delete the llvm module before calling llvm_shutdown,
...
this fixes crashes in error cases, PR6683
llvm-svn: 99334
2010-03-23 21:59:43 +00:00
dcddd5701c
Don't back past debug info intrinsics; SCEVExpander's strategy
...
for ignoring debug info intrinsics everywhere else is to advance
past them, and it needs to be consistent.
llvm-svn: 99332
2010-03-23 21:53:22 +00:00
ae12e35004
fix an infinite loop in Module::getEndianness, PR6684
...
patch by Alex Mac!
llvm-svn: 99330
2010-03-23 21:48:41 +00:00
8a687233e3
Fix typo in the comment for N3VX class.
...
llvm-svn: 99328
2010-03-23 21:35:03 +00:00
5be6d5a6a9
Add comment.
...
llvm-svn: 99327
2010-03-23 21:30:12 +00:00
5dbf39285d
Add New NEON Format NVdVmVCVTFrm.
...
Converted some of the NEON vcvt instructions to this format.
llvm-svn: 99326
2010-03-23 21:25:38 +00:00
04803e8ef6
Skip debugging intrinsics when sinking unused invariants.
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llvm-svn: 99324
2010-03-23 21:15:59 +00:00
020023a3fa
Add New NEON Format NVdVmImmFrm.
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llvm-svn: 99322
2010-03-23 20:40:44 +00:00
77be42a07f
Ignore dbg_value's.
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llvm-svn: 99321
2010-03-23 20:36:12 +00:00
b6dee6e015
Teach isSafeToClobberEFLAGS to ignore dbg_value's. We need a MachineBasicBlock::iterator that does this automatically?
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llvm-svn: 99320
2010-03-23 20:35:45 +00:00
c7d721aa03
Code clean up.
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llvm-svn: 99319
2010-03-23 20:33:48 +00:00
59f75bba24
Fix VLDMQ and VSTMQ instructions to use the correct encoding and address modes.
...
These instructions are only needed for codegen, so I've removed all the
explicit encoding bits for now; they should be set in the same way as the for
VLDMD and VSTMD whenever we add encodings for VFP. The use of addrmode5
requires that the instructions be custom-selected so that the number of
registers can be set in the AM5Opc value.
llvm-svn: 99309
2010-03-23 18:54:46 +00:00
2b9735138e
Test case for llvm-gcc r99305. Radar 7659636.
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llvm-svn: 99306
2010-03-23 18:39:23 +00:00
3968c6a252
Fix bad indentation, 80-column violations, and trailing whitespace.
...
llvm-svn: 99295
2010-03-23 17:23:59 +00:00
ac5024bbeb
Add New NEON Format NVdImmFrm.
...
Ref: A7.4.6 One register and a modified immediate value.
llvm-svn: 99288
2010-03-23 16:43:47 +00:00
c8d0dd1bd4
Add comment.
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llvm-svn: 99284
2010-03-23 15:50:49 +00:00
5f7b636ee6
Forgot this.
...
llvm-svn: 99283
2010-03-23 15:49:37 +00:00
d9e822345c
Teach simplify libcall to transform __strcpy_chk to __memcpy_chk to enable optimizations down stream.
...
llvm-svn: 99282
2010-03-23 15:48:04 +00:00
161cb044f3
add assert in argpromotion, which cannot trigger
...
if Function::hasAddressTaken works as advertised
also included some cosmetic cleanups
llvm-svn: 99276
2010-03-23 14:40:20 +00:00
668d700fe3
word-o
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llvm-svn: 99275
2010-03-23 13:45:54 +00:00
9b680e21c0
Rename some instructions to match the corresponding NEON opcode.
...
llvm-svn: 99266
2010-03-23 06:26:18 +00:00
cc0a2a75a0
Change VST1 instructions for loading Q register values to operate on pairs
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of D registers. Add a separate VST1q instruction with a Q register
source operand for use by storeRegToStackSlot.
llvm-svn: 99265
2010-03-23 06:20:33 +00:00
3f7842232e
Fix an incorrect logic causing instcombine to miss some _chk -> non-chk transformations.
...
llvm-svn: 99263
2010-03-23 06:06:09 +00:00
340861d29e
Change VLD1 instructions for loading Q register values to operate on pairs
...
of D registers. Add a separate VLD1q instruction with a Q register
destination operand for use by loadRegFromStackSlot.
llvm-svn: 99261
2010-03-23 05:25:43 +00:00
de04b3f62c
MC: Switch to using MCInst fragments to do relaxation.
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Also, both MCMachOStreamer and MCAssembler are now target independent!
llvm-svn: 99256
2010-03-23 05:09:03 +00:00
86face8333
MC: Add TargetAsmBackend::MayNeedRelaxation, for checking whether a particular instruction + fixups might need relaxation.
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llvm-svn: 99249
2010-03-23 03:13:05 +00:00
a9ae3ae698
MC: Add TargetAsmBackend::WriteNopData and use to eliminate some target dependencies in MCMachOStreamer and MCAssembler.
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llvm-svn: 99248
2010-03-23 02:36:58 +00:00
e0c43577c1
MC: Add TargetAsmBackend::RelaxInstruction callback, and custom X86 implementation.
...
llvm-svn: 99245
2010-03-23 01:39:09 +00:00
16cbe95dd6
MC: Tweak MCInstFragment to include the encoded data and fixups, so that we don't need to recompute them during relaxation. I will revisit this once all the other pieces of fast relaxation are in place.
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llvm-svn: 99244
2010-03-23 01:39:05 +00:00
a99d232803
Put MCSectionCOFF::Name into the MCContext instead of leaking it.
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llvm-svn: 99231
2010-03-22 23:26:12 +00:00
b31c49a70d
MC: Add MCInstFragment, not used yet.
...
llvm-svn: 99229
2010-03-22 23:16:48 +00:00
a75f01a905
Add a FIXME.
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llvm-svn: 99228
2010-03-22 23:16:43 +00:00
b1c4f62cac
Fix PR6673: updating the callback should not clear the map.
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llvm-svn: 99227
2010-03-22 23:15:57 +00:00
d22ed622b3
Emit DW_AT_low_pc and DW_AT_high_pc attributes for TAG_compile_unit.
...
llvm-svn: 99225
2010-03-22 23:11:36 +00:00
9a7b270825
Fix 80 col violation.
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llvm-svn: 99224
2010-03-22 22:44:31 +00:00
53e91f0836
DW_AT_stmt_list attribute attached with a compile unit encodes offset of line number information for this compile unit in debug_line section. This offset is always zero when only one compile unit is emitted in a object file.
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llvm-svn: 99223
2010-03-22 22:38:48 +00:00
fdc7ccc4e4
MC: Fix a few more cases we were passing an MCDataFragment when a MCFragment would do, and sprinkle in some const.
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llvm-svn: 99218
2010-03-22 21:49:41 +00:00
20ea02fde2
Simplify.
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llvm-svn: 99217
2010-03-22 21:49:38 +00:00
04047fbe14
MCInst: Add ::dump_pretty.
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llvm-svn: 99216
2010-03-22 21:49:34 +00:00
14694d3666
Reduce indentation.
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llvm-svn: 99214
2010-03-22 21:24:33 +00:00
2109cb461c
Change intrinsic result type for void to store it as an empty list
...
instead of as a single element list with VoidTy. Now with a fix
for the verifier.
llvm-svn: 99206
2010-03-22 20:56:36 +00:00
a0ab4bf989
MC: Change MCObjectWriter::RecordRelocation to take an MCFragment (instead of a MCDataFragment). Object files should only need the generic MCFragment features.
...
llvm-svn: 99205
2010-03-22 20:35:50 +00:00
f1f1827bfa
MC/Mach-O: Factor out getOrCreateDataFragment().
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llvm-svn: 99204
2010-03-22 20:35:46 +00:00
9213355a91
MC: Eliminate MCFragment::getMaxFileSize.
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llvm-svn: 99203
2010-03-22 20:35:43 +00:00
32ffc58ca9
MC: Share the MCAsmLayout object, although its still not used for anything important.
...
llvm-svn: 99202
2010-03-22 20:35:35 +00:00
e60e3ab624
Rename one more NEON instruction that I missed earlier.
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llvm-svn: 99201
2010-03-22 20:31:39 +00:00
54ebc986b1
Fix a memory leak from DIE::addSiblingOffset() by adding the DIEValue
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it allocates to DwarfDebug::DIEValues.
llvm-svn: 99196
2010-03-22 18:47:14 +00:00
760dc65d59
80 col violation.
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llvm-svn: 99195
2010-03-22 18:40:50 +00:00
c286c88db0
Regroup some instructions. No functional change.
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llvm-svn: 99192
2010-03-22 18:22:06 +00:00
c53a1125ff
Rename some VLD1/VST1 instructions to match the implementation, i.e., the
...
corresponding NEON instructions, instead of operation they are currently
used for.
llvm-svn: 99189
2010-03-22 18:13:18 +00:00
98bf5189d7
Remove some redundant instruction classes.
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llvm-svn: 99187
2010-03-22 18:02:38 +00:00
e5732c63c4
llc doesn't need LinkAllVMCore.
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llvm-svn: 99186
2010-03-22 16:59:44 +00:00
debe0bdb13
Refactor instruction encoding arguments for VLDnLN/VSTnLN classes to
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specify encoding bits in arguments instead of "let" expressions.
llvm-svn: 99185
2010-03-22 16:43:10 +00:00
5db5506093
Completely remove Blackfin patterns that thought JustCC was i1.
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Thanks, Chris!
llvm-svn: 99183
2010-03-22 16:30:04 +00:00
7d116ce2e3
Don't leak a MachineInstruction from Thumb1InstrInfo::restoreCalleeSavedRegisters.
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llvm-svn: 99182
2010-03-22 16:13:21 +00:00
38da2b015f
Avoid leaking the FunctionPassManager from opt.
...
llvm-svn: 99180
2010-03-22 15:56:04 +00:00
e1517a084f
backing out r99170 because it still fails on clang-x86_64-darwin10-fnt
...
llvm-svn: 99171
2010-03-22 09:11:00 +00:00
7a743e15e3
Now that hopefully all direct accesses to InvokeInst operands are fixed
...
we can reapply the InvokeInst operand reordering patch. (see r98957).
llvm-svn: 99170
2010-03-22 08:28:00 +00:00
a6eedc3c03
Free all Constants in ~LLVMConstantImpl. We avoid assertion failures
...
by dropping all references from all constants that can use other
constants before trying to destroy any of them.
I also had to free bugpoint's Module in ~BugDriver().
llvm-svn: 99160
2010-03-22 05:23:37 +00:00
77eede5776
Fix the ocaml kaleidoscope tutorial to fix linking external libraries.
...
llvm-svn: 99151
2010-03-21 23:15:13 +00:00
9f2284121a
modernize the do-all-for-me target to run lit
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llvm-svn: 99148
2010-03-21 22:23:02 +00:00
cd3706cd1c
Re-add the Metadata.h include to LLVMContextImpl.h so that MDNode is complete
...
where FoldingSet<MDNode> is instantiated. Clang and MSVC complain; gcc
doesn't.
llvm-svn: 99147
2010-03-21 22:08:41 +00:00
4cfb3a7656
Move the LLVMContextImpl implementation into a .cpp file.
...
llvm-svn: 99146
2010-03-21 21:17:34 +00:00
ade270e225
Memoize InlineAsms into the LLVMContext and delete them on shutdown.
...
Fixes PR803.
llvm-svn: 99143
2010-03-21 20:37:19 +00:00
c91f200c17
XFAIL tests from LLVMC on valgrind or valgrind+leak-checking. We
...
don't care about leaks from tblgen, and I assume we don't care about
valgrind errors in llvm-gcc/g++.
llvm-svn: 99115
2010-03-21 08:12:46 +00:00
2e4b02d6c1
Free SavedLI even if SimpleRegisterCoalescing::JoinCopy() returns early.
...
llvm-svn: 99113
2010-03-21 01:47:49 +00:00
544cfd76e7
When we don't pass --vg-leak to lit, pass --leak-check=no to valgrind.
...
llvm-svn: 99112
2010-03-21 01:47:33 +00:00
d177edf361
Fix suggested parentheses warning.
...
llvm-svn: 99111
2010-03-21 01:38:21 +00:00
2f87b54f1a
Add support for XFAILing valgrind runs with memory leak checking independently
...
of runs without leak checking. We add -vg to the triple for non-checked runs,
or -vg_leak for checked runs. Also use this to XFAIL the TableGen tests, since
tablegen leaks like a sieve. This includes some valgrindArgs refactoring.
llvm-svn: 99103
2010-03-20 23:08:45 +00:00
fbd12cc36c
MC/X86: Fix an MCOperand link, when we parsing shrld $1,%eax and friends; I believe this fixes the last memory leaks under test/MC.
...
llvm-svn: 99102
2010-03-20 22:36:38 +00:00
d9d5b315ab
llvm-mc: Fix MCInstPrinter memory leaks.
...
llvm-svn: 99101
2010-03-20 22:36:35 +00:00
98055cc154
MC/Mach-O: Remove Darwin host specific tests, we don't need them anymore.
...
llvm-svn: 99100
2010-03-20 22:36:32 +00:00
9f4f9f9cf4
MC/Mach-O: Tweak optimal_nop test to be host independent.
...
- This also avoids us running valgrind on /usr/bin/as, which has leaks. :)
llvm-svn: 99099
2010-03-20 22:36:29 +00:00
c5621ed07a
llvm-mc: Fix memory leak of MCAsmInfo.
...
llvm-svn: 99098
2010-03-20 22:36:25 +00:00
fed917e078
TargetRegistry: Fix create{AsmInfo,MCDisassembler} to return non-const objects.
...
llvm-svn: 99097
2010-03-20 22:36:22 +00:00
162242b63b
pr6652: Use LDM to restore PC to the return address on ARMv4.
...
Patch by John Tytgat!
llvm-svn: 99096
2010-03-20 22:20:40 +00:00
ae08a736d6
Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6")
...
with changes to add a separate optional register update argument. Change all
the NEON instructions with address register writeback to use it.
llvm-svn: 99095
2010-03-20 22:13:40 +00:00
59e5141d44
Add instruction variants for VST2, VST3, and VST4 "store-lane" operations with
...
address register writeback.
llvm-svn: 99094
2010-03-20 21:57:36 +00:00
b18adef4ad
Add variants of VST2, VST3 and VST4 with address register writeback, and
...
rewrite the existing VST3 and VST4 instructions to use the same classes as
the others.
llvm-svn: 99093
2010-03-20 21:45:18 +00:00
89ba42c4ce
Add instructions for double-spaced VST3 and VST4 without address register
...
writeback, and refactor the existing double-spaced VST2 instructions.
These are only for the disassembler since codegen doesn't use them, at
least for now.
llvm-svn: 99090
2010-03-20 21:15:48 +00:00
e848de3911
tests: Mangle '-vg' onto the end of the triple when running under valgrind, so
...
we can use the standard XFAIL and XTARGET to conditional tests based on
valgrind.
llvm-svn: 99088
2010-03-20 21:12:48 +00:00
febf6ab718
Add a setCalledFunction member to InvokeInst (like in CallInst)
...
and use this (as well as getCalledValue) to access the callee,
instead of {g|s}etOperand(0).
llvm-svn: 99084
2010-03-20 21:00:25 +00:00
322cbff3d3
Add VST1 instructions with address register writeback.
...
llvm-svn: 99083
2010-03-20 20:54:36 +00:00
9152d96dfb
Add instruction variants for VLD2, VLD3, and VLD4 "load-lane" operations with
...
address register writeback.
llvm-svn: 99082
2010-03-20 20:47:18 +00:00
9b1584245a
Tidy some more comments and whitespace.
...
llvm-svn: 99081
2010-03-20 20:39:53 +00:00
cf324658f6
Add variants of VLD2, VLD3 and VLD4 with address register writeback, and
...
rewrite the existing VLD3 and VLD4 instructions to use the same classes as
the others.
llvm-svn: 99080
2010-03-20 20:10:51 +00:00
7ee900da22
Tidy some comments and whitespace for consistency.
...
llvm-svn: 99078
2010-03-20 19:57:03 +00:00
c0795f8b87
Rename some instructions for consistency and sanity: use "_UPD" suffix for
...
load/stores with address register writeback, and use "odd" suffix to distinguish
instructions to access odd numbered registers (instead of "a" and "b").
No functional changes.
llvm-svn: 99066
2010-03-20 18:35:24 +00:00
d092669b48
Add instructions for double-spaced VLD3 and VLD4 without address register
...
writeback, and refactor the existing double-spaced VLD2 instructions.
These are only for the disassembler since codegen doesn't use them, at
least for now.
llvm-svn: 99065
2010-03-20 18:14:26 +00:00
496766cb56
Add VLD1 instructions with address register writeback.
...
llvm-svn: 99062
2010-03-20 17:59:03 +00:00
73fc06f60f
PIC16: Simplify code by using a std::set<std::string> instead of a sorted & uniqued std::list of leaked char*.
...
llvm-svn: 99061
2010-03-20 17:41:18 +00:00
2497d85c9e
Revert the rest of 98679.
...
--- Reverse-merging r98679 into 'lib/Target/ARM/ARMInstrVFP.td':
U lib/Target/ARM/ARMInstrVFP.td
llvm-svn: 99049
2010-03-20 06:34:02 +00:00
614d1fdfc3
Fix a very bad typo. Since the register number was off by one, the ARM
...
load/store optimizer would incorrectly think that registers D26 and D28
were consecutive and would generate a VLDM instruction to load them.
The assembler was not convinced.
llvm-svn: 99043
2010-03-20 06:05:13 +00:00
1a2abe5580
Clear the SCEVExpander's insertion point after making deletions,
...
so that the SCEVExpander doesn't retain a dangling pointer as its
insert position. The dangling pointer in this case wasn't ever used
to insert new instructions, but it was causing trouble with
SCEVExpander's code for automatically advancing its insert position
past debug intrinsics.
This fixes use-after-free errors that valgrind noticed in
test/Transforms/IndVarSimplify/2007-06-06-DeleteDanglesPtr.ll and
test/Transforms/IndVarSimplify/exit_value_tests.ll.
llvm-svn: 99036
2010-03-20 03:53:53 +00:00
b8d1fd0553
Stupid svn. Add back to the lost sibcall tests.
...
llvm-svn: 99033
2010-03-20 03:17:05 +00:00
3f6f769c4f
If call result is in ST0 and it is not being passed to the caller's
...
caller, then it is not safe to optimize the call into a sibcall since
the call result has to be popped off the x87 stack.
llvm-svn: 99032
2010-03-20 02:58:15 +00:00
5ea5fab22b
Better fix for r98994, MachObjectWriterImpl wasn't intended to be virtual.
...
llvm-svn: 99031
2010-03-20 01:58:40 +00:00
f833fad813
Add NLdStFrm Format.
...
llvm-svn: 99014
2010-03-20 00:17:00 +00:00
053e3510a3
Revert r98679. The disassembler will be updated to depend on the existence of
...
IndexModeUpd and then populates the Inst{21}=1 while populating the instructions
for disassembly.
llvm-svn: 99013
2010-03-19 23:50:27 +00:00
3e2bb702db
Revert r99009 temporarily it seems to be breaking the bots.
...
llvm-svn: 99011
2010-03-19 23:04:23 +00:00
e4191e719b
Revert this change, since it was causing ARM performance regressions.
...
--- Reverse-merging r98889 into '.':
U lib/Target/ARM/ARMInstrNEON.td
U lib/Target/ARM/ARMISelLowering.h
U lib/Target/ARM/ARMInstrInfo.td
U lib/Target/ARM/ARMInstrVFP.td
U lib/Target/ARM/ARMISelLowering.cpp
U lib/Target/ARM/ARMInstrFormats.td
llvm-svn: 99010
2010-03-19 22:51:32 +00:00
933b2cf9a8
Change intrinsic result type for void to store it as an empty list
...
instead of as a single element list with VoidTy.
llvm-svn: 99009
2010-03-19 22:40:56 +00:00
2db7abaa44
make getOperandNum a static function (since it's just used by
...
ApplyTypeConstraint) and make it handle multiple result nodes.
llvm-svn: 99003
2010-03-19 21:56:21 +00:00
89d4e3c3fd
Fix more places to more thoroughly ignore debug intrinsics. This fixes
...
use-before-def errors in SCEVExpander-produced code in sqlite3 when debug
info with optimization is enabled, though the testcases for this are
dependent on use-list order.
llvm-svn: 99001
2010-03-19 21:51:03 +00:00
8352941b34
remove the patterns that I commented out in r98930, Dan verified
...
that they are dead.
llvm-svn: 99000
2010-03-19 21:43:36 +00:00
f144725ebc
major surgery on tblgen: generalize TreePatternNode
...
to maintain a list of types (one for each result of
the node) instead of a single type. There are liberal
hacks added to emulate the old behavior in various
situations, but they can start disolving now.
llvm-svn: 98999
2010-03-19 21:37:09 +00:00
f369e779a8
Force configuration of some projects before others. In particular, some
...
projects rely upon llvm-gcc, the LLVM test suite, and poolalloc. This ensures
that the aforementioned projects have their object trees created first so that
other projects can find their object trees when they themselves are configured.
llvm-svn: 98998
2010-03-19 21:31:39 +00:00
07b4f8cd4b
Fix -Wnon-virtual-dtor warning.
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llvm-svn: 98994
2010-03-19 21:26:46 +00:00
da4a3ed75e
Regenerate configure.
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llvm-svn: 98990
2010-03-19 21:22:13 +00:00
122f07a0c9
Bump version number.
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llvm-svn: 98989
2010-03-19 21:19:10 +00:00
b7d3d99181
Test commit (removed extra blank line)
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llvm-svn: 98988
2010-03-19 21:12:29 +00:00
5002454d2a
call void @llvm.dbg.declare(metadata !{i32* null}, metadata !1 )
...
is valid, but not useful, when variable identified by !1 is optimized away by the optimizer.
llvm-svn: 98986
2010-03-19 21:06:24 +00:00
1734a2a550
Updated copyright year to 2010.
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llvm-svn: 98985
2010-03-19 21:04:16 +00:00
cf0843ed93
Fixed the encoding problems of the crc32 instructions. All had the Operand size
...
override prefix and only the r/m16 forms should have had that. Also for variant
one, the AT&T syntax, added suffixes to all forms. Also added the missing
64-bit form for 'CRC32 r64, r/m8'. Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.
llvm-svn: 98980
2010-03-19 20:04:42 +00:00
bc5af98f42
Stop trying to merge identical jump tables. This had been inadvertently
...
disabled for several months (since svn r88806) and no one noticed. My fix
for pr6543 yesterday reenabled it, but broke the ARM port's code for using
TBB/TBH. Rather than adding a target hook to disable merging for Thumb2 only,
I'm just taking this out. It is not common to have identical jump tables,
the code we used to merge them was O(N^2), and it only helps code size, not
performance.
llvm-svn: 98977
2010-03-19 19:05:41 +00:00
1a81ad3559
MC/Mach-O/x86_64: Add relocation support.
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- This is "extraordinarily" Darwin 'as' compatible. See the litany of FIXMEs littered about for more information.
- There are a few cases which seem to clearly be 'as' bugs which I have left unsupported, and there is one cases where we diverge but should fix if it blocks diffing .o files (Darwin 'as' ends up widening a jump unnecessarily).
- 403.gcc build, runs, and diffs equivalently to the 'as' built version now (using llvm-mc). However, it builds so slowly that I wouldn't recommend trying it quite yet. :)
llvm-svn: 98974
2010-03-19 18:07:55 +00:00
abf6e3657e
llvm-mc: Fix target selection for --disassemble to use GetTarget.
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llvm-svn: 98973
2010-03-19 18:07:50 +00:00
c532697372
MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen only" so they don't get selected by the asm matcher.
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llvm-svn: 98972
2010-03-19 18:07:48 +00:00
c069cc8eaa
FileCheck: Don't print "possibly intended match" line if it would match the
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"scanning from here" one.
llvm-svn: 98971
2010-03-19 18:07:43 +00:00
bc8eed000f
Set numThreads to 1 by default when Python is older than 2.5.2.
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Python 2.4 always hits this bug: http://bugs.python.org/issue1731717
when running check-lit on multi-core systems.
Setting numThreads to 1 makes it slower, but at least the results reported are
correct.
llvm-svn: 98969
2010-03-19 17:54:21 +00:00
6d765ebc0d
make FillWithPossibleTypes take a predicate to filter types so that
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we don't blow the smallvector as often. No functionality change.
llvm-svn: 98968
2010-03-19 17:41:26 +00:00
0dab68f3d0
Renumber LdStExFrm from 28 to 11 and shift the existing format values to make
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room for it. This is in preparation for another patch which is adding NEON
subformats to facilitate disassembly.
llvm-svn: 98967
2010-03-19 17:39:00 +00:00
45a967cd62
Acccess control is lame
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llvm-svn: 98962
2010-03-19 15:36:58 +00:00
c09217c2f1
struct -> class, to silence a Clang warning
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llvm-svn: 98961
2010-03-19 15:31:09 +00:00
6c56ed847e
back out r98957, it broke http://smooshlab.apple.com:8010/builders/clang-x86_64-darwin10-fnt/builds/703 in the nightly test suite
...
llvm-svn: 98958
2010-03-19 13:50:02 +00:00
8335f9c0bf
Recommit r80858 again (which has been backed out in r80871).
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This time I did a self-hosted bootstrap on Linux x86-64,
with no problems. Let's see how darwin 64-bit self-hosting
goes. At the first sign of failure I'll back this out.
Maybe the valgrind bots give me a hint of what may be wrong
(it at all).
llvm-svn: 98957
2010-03-19 11:55:53 +00:00
4d7c8645fd
MC: Add TargetAsmBackend::createObjectWriter.
...
- MCAssembler is now object-file independent, although we will surely need more work to fully support ELF/COFF.
llvm-svn: 98955
2010-03-19 10:43:26 +00:00
eaa367f5ae
MCCodeEmitter: Add target independent fixup flag for is-pc-relative.
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llvm-svn: 98954
2010-03-19 10:43:23 +00:00
1bd7171c95
MC: Sink code emitter into MCAssembler.
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llvm-svn: 98953
2010-03-19 10:43:18 +00:00
79e0e5a631
MC/Mach-O: Move to MachObjectWriter.{h,cpp}.
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llvm-svn: 98952
2010-03-19 10:43:15 +00:00
c5084cccc8
MC: Add TargetAsmBackend::isVirtualSection hook.
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llvm-svn: 98950
2010-03-19 09:29:03 +00:00
f027abf7de
MC: Split MCObjectWriter out of MCAssembler.cpp.
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llvm-svn: 98949
2010-03-19 09:28:59 +00:00
49e5a8ac2a
MCAssembler: Pull out MCObjectWriter class.
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llvm-svn: 98948
2010-03-19 09:28:55 +00:00
f0517efc6c
MCAssembler: Move ApplyFixup to the TargetAsmBackend, this is a target specific not object writer specific task.
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llvm-svn: 98947
2010-03-19 09:28:12 +00:00
3cab275783
MC/Mach-O: Lift the fixup evaluation and application up (to the same place), and eliminate MCAsmFixup::FixedValue.
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llvm-svn: 98944
2010-03-19 07:09:47 +00:00
d84d196a86
MC/Mach-O: Factor out ExecutePostLayoutBinding, to separate the post-layout changes the object writer may need to make to the assembler from the actual .o writing.
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llvm-svn: 98943
2010-03-19 07:09:33 +00:00
563d40eda6
MC/Mach-O: Lift relocation emission logic a bit higher to separate evaluation / relocation handling from the actual .o writing.
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llvm-svn: 98942
2010-03-19 07:09:18 +00:00
22a411ff5b
Remove a memory leak from the CBackend.
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llvm-svn: 98941
2010-03-19 07:06:46 +00:00
90a7859ebc
fix an MCInstPrinter leak that jyasskin pointed out:
...
createAsmStreamer now takes ownership of the instprinter.
llvm-svn: 98939
2010-03-19 05:48:53 +00:00
bb34b4e10f
resolve fixme: we now infer the instruction-level 'isvariadic' bit
...
from the pattern if present, and we use it instead of the bit.
llvm-svn: 98938
2010-03-19 05:34:15 +00:00
0433699ef0
set SDNPVariadic on nodes throughout the rest of the targets that
...
need them.
llvm-svn: 98937
2010-03-19 05:33:51 +00:00
4822dfcc9a
Remove a memory leak from ThumbTargetMachine.
...
llvm-svn: 98936
2010-03-19 05:25:28 +00:00
83aeaab462
add a new SDNPVariadic SDNP node flag, and use it in
...
dag isel gen instead of instruction properties. This
allows the oh-so-useful behavior of matching a variadic
non-root node.
llvm-svn: 98934
2010-03-19 05:07:09 +00:00
be6b17f927
rewrite EnforceSmallerThan to be less bone headed.
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llvm-svn: 98933
2010-03-19 04:54:36 +00:00
e5ac9382ce
remove some damaged sign extend patterns that can never match.
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llvm-svn: 98932
2010-03-19 04:53:47 +00:00
6d984166fc
disable some illegal blackfin patterns. sext from i32 to i32 can never
...
match. Jakob, please take a look when you get a chance.
llvm-svn: 98931
2010-03-19 04:53:21 +00:00
607795f917
comment out a bunch of parallel store patterns that apparently
...
can't match or just have no testcases. Will remove after
confirmation from dan that they really are dead.
llvm-svn: 98930
2010-03-19 04:14:21 +00:00
857955243e
Fix -Asserts warnings.
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llvm-svn: 98928
2010-03-19 03:18:23 +00:00
ec71ba25e5
Fix -Asserts warning.
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llvm-svn: 98927
2010-03-19 03:18:20 +00:00
0f7fbb3d00
MC/Mach-O: Add isScatteredFixupFullyResolved, which implements the correct algorithm (used on x86_64) for determining whether an evaluated fixup is fully resolved (doesn't need relocation).
...
- Test cases will follow, once we have x86_64 relocation support.
llvm-svn: 98926
2010-03-19 03:18:18 +00:00
6e13bb07fb
MC/Mach-O/x86_64: Add getAtom[ForAddress].
...
- These find the defining symbol which identifies the containing atom for a symbol or address. They are currently very slow, but will be eliminated eventually.
llvm-svn: 98925
2010-03-19 03:18:15 +00:00
5ec4bdd1b3
MC/Mach-O: Factor out isScatteredFixupFullyResolvedSimple predicate, and fix some corner cases.
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llvm-svn: 98924
2010-03-19 03:18:12 +00:00
c558ec211f
MC/Mach-O: Factor out isSymbolLinkerVisible method; "linker visible" is a made up term to refer to non-temporary labels + temporary labels in sections-which-require symbols. For Darwin, it corresponds to symbols which effectively define an atom.
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llvm-svn: 98923
2010-03-19 03:18:09 +00:00
fab9b02fc8
Drop KLEE blurb, we don't have anything new.
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llvm-svn: 98922
2010-03-19 03:18:05 +00:00
7ad43f8768
Fixed a widening bug where we were not using the correct size for the load
...
llvm-svn: 98920
2010-03-19 01:19:52 +00:00
c9deca20e8
X86: Fix encoding for TEST64rr.
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llvm-svn: 98919
2010-03-19 01:15:03 +00:00
da5b4ad03e
eliminate the last use of EEVT::isUnknown
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llvm-svn: 98918
2010-03-19 01:14:27 +00:00
fbd0109ca4
Remove `ignore` from LLVMC/TestWarnings.td. This avoids
...
https://bugs.kde.org/show_bug.cgi?id=231257 and seems not to have been
needed in the first place.
llvm-svn: 98917
2010-03-19 01:10:41 +00:00
1802b17b65
Finally change the instruction looking map to be a densemap from
...
record* -> instrinfo instead of std::string -> instrinfo.
This speeds up tblgen on cellcpu from 7.28 -> 5.98s with a debug
build (20%).
llvm-svn: 98916
2010-03-19 01:07:44 +00:00
4763dbeaf6
make inst_begin/inst_end iterate over InstructionsByEnumValue.
...
Use CodeGenTarget::getInstNamespace in one place and fix it.
llvm-svn: 98915
2010-03-19 01:00:55 +00:00
2d822ab185
revert 98912
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llvm-svn: 98914
2010-03-19 00:50:47 +00:00
45e2fc5ac1
make inst_begin/inst_end iterate over InstructionsByEnumValue.
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llvm-svn: 98912
2010-03-19 00:40:22 +00:00
065232fcd1
FP16 constfolding
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llvm-svn: 98911
2010-03-19 00:36:35 +00:00
918be520dc
change Target.getInstructionsByEnumValue to return a reference
...
to a vector that CGT stores instead of synthesizing it on every
call.
llvm-svn: 98910
2010-03-19 00:34:35 +00:00
1734e47d20
Revert r98892. BSD systems may not have bash installed at all.
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llvm-svn: 98909
2010-03-19 00:32:11 +00:00
c9ae94c793
factor copy and paste code.
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llvm-svn: 98908
2010-03-19 00:23:20 +00:00
70eb897d7c
don't go through getInstructions().
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llvm-svn: 98906
2010-03-19 00:18:23 +00:00
71bd0f4eda
Bugpoint's default memory limit (100MB) was too low for valgrind, so
...
this patch raises the default to 800MB when valgrind's active. 800
was chosen semi-arbitrarily.
llvm-svn: 98905
2010-03-19 00:09:28 +00:00
9aec14b560
look up instructions by record, not by name.
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llvm-svn: 98904
2010-03-19 00:07:20 +00:00
83facb0812
Now that tblgen can handle matching implicit defs of instructions
...
to input patterns, we can fix X86ISD::CMP and X86ISD::BT as taking
two inputs (which have to be the same type) and *returning an i32*.
This is how the SDNodes get made in the graph, but we weren't able
to model it this way due to deficiencies in the pattern language.
Now we can change things like this:
def UCOM_FpIr80: FpI_<(outs), (ins RFP80:$lhs, RFP80:$rhs), CompareFP,
- [(X86cmp RFP80:$lhs, RFP80:$rhs),
- (implicit EFLAGS)]>; // CC = ST(0) cmp ST(i)
+ [(set EFLAGS, (X86cmp RFP80:$lhs, RFP80:$rhs))]>;
and fix terrible crimes like this:
-def : Pat<(parallel (X86cmp GR8:$src1, 0), (implicit EFLAGS)),
+def : Pat<(X86cmp GR8:$src1, 0),
(TEST8rr GR8:$src1, GR8:$src1)>;
This relies on matching the result of TEST8rr (which is EFLAGS, which is
an implicit def) to the result of X86cmp, an i32.
llvm-svn: 98903
2010-03-19 00:01:11 +00:00
a4d86b63c7
Update comment to refer to the right filename.
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llvm-svn: 98902
2010-03-18 23:57:57 +00:00
8e9b895c37
tidy up
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llvm-svn: 98901
2010-03-18 23:57:57 +00:00
63a627cd88
expand tblgen's support for instructions with implicit defs.
...
llvm-svn: 98900
2010-03-18 23:57:40 +00:00
fdc20711e8
infer results of a pattern from implicit defs. This allows you to do something
...
like this:
def : Pat<(add ...),
(FOOINST)>;
When fooinst only has a single implicit def (e.g. to R1). This will be handled
as if written as (set R1, (FOOINST ...))
llvm-svn: 98897
2010-03-18 23:15:10 +00:00
3eb346caeb
Work around a valgrind oddity where it doesn't pass the full path of a
...
script to the #! command by using bash instead of /bin/sh. Bash
searches $PATH for its script argument, but dash, which /bin/sh
resolves to on some systems, does not.
https://bugs.kde.org/show_bug.cgi?id=231257 tracks the valgrind
problem.
llvm-svn: 98892
2010-03-18 22:56:02 +00:00
f11aa9e7b4
Get rid of target-specific fp <-> int nodes when still I'm here.
...
llvm-svn: 98889
2010-03-18 22:35:45 +00:00
64578d5599
Get rid of target-specific nodes for fp16 <-> fp32 conversion.
...
llvm-svn: 98888
2010-03-18 22:35:37 +00:00
422dd6608a
Refactor Reg-Reg copy emission routine for ARM. This makes cross-regclass copies weirdness more straightforward. Also, add GPR <-> SPR copy support.
...
llvm-svn: 98887
2010-03-18 22:35:02 +00:00
5e95aee159
Couple of changes that Dan mentioned for llvm.stackprotector fast-isel.
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llvm-svn: 98881
2010-03-18 21:58:33 +00:00
2ca1108254
X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, we
...
were missing it on some movq instructions and were not including the appropriate
PCrel bias.
llvm-svn: 98880
2010-03-18 21:53:54 +00:00
Chris Lattner