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Author SHA1 Message Date
Tim Northover 52d3283026 AArch64/ARM64: more testing from AArch64 to ARM64 
llvm-svn: 206889
 2014-04-22 12:45:47 +00:00
Tim Northover 2a661f3f73 AArch64: fix LowerCONCAT_VECTORS for new CodeGen. 
The function was making too many assumptions about its input:

1. The NEON_VDUP optimisation was far too aggressive, assuming (I
think) that the input would always be BUILD_VECTOR.

2. We were treating most unknown concats as legal (by returning Op
rather than SDValue()). I think only concats of pairs of vectors are
actually legal.

http://llvm.org/PR19094

llvm-svn: 203450
 2014-03-10 09:34:07 +00:00