Commit Graph

161 Commits

Author SHA1 Message Date
Benjamin Kramer 11983a4f85 tblgen: remove duplicated newlines.
llvm-svn: 155038
2012-04-18 19:22:47 +00:00
Jim Grosbach 1752ffbfe5 Tidy up. No need for a Twine here, as it's just constants.
llvm-svn: 155026
2012-04-18 18:39:27 +00:00
Jim Grosbach 7670374c06 Clean up warning text. Remove extraneous prefix.
llvm-svn: 155015
2012-04-18 18:09:50 +00:00
Jim Grosbach 3ae48a6236 TableGen use PrintWarning rather than fprintf(stderr,...) for warnings.
That way we get source line number information from the diagnostics.

llvm-svn: 155014
2012-04-18 17:46:41 +00:00
Benjamin Kramer b0640db80e Include cstdio in a few place that depended on getting it transitively through StringExtras.h
llvm-svn: 153328
2012-03-23 11:35:30 +00:00
Craig Topper c4965bce14 Convert assert(0) to llvm_unreachable
llvm-svn: 149814
2012-02-05 07:21:30 +00:00
David Blaikie a5708dc3a3 Provide better messages in llvm_unreachable.
llvm-svn: 148293
2012-01-17 07:00:13 +00:00
David Blaikie b48ed1a4cb Remove unreachable code. (replace with llvm_unreachable to help GCC where necessary)
llvm-svn: 148284
2012-01-17 04:43:56 +00:00
Jakob Stoklund Olesen dd8fbf572e Delete CodeInit and CodeRecTy from TableGen.
The code type was always identical to a string anyway. Now it is simply
a synonym. The code literal syntax [{...}] is still valid.

llvm-svn: 148092
2012-01-13 03:38:34 +00:00
David Blaikie edbb58c577 Remove unnecessary default cases in switches that cover all enum values.
llvm-svn: 147855
2012-01-10 16:47:17 +00:00
Jakob Stoklund Olesen d9444d455e Ban rematerializable instructions with side effects.
TableGen infers unmodeled side effects on instructions without a
pattern.  Fix some instruction definitions where that was overlooked.

Also raise an error if a rematerializable instruction has unmodeled side
effects. That doen't make any sense.

llvm-svn: 141929
2011-10-14 01:00:49 +00:00
Peter Collingbourne 84c287e33c Move TableGen's parser and entry point into a library
This is the first step towards splitting LLVM and Clang's tblgen executables.

llvm-svn: 140951
2011-10-01 16:41:13 +00:00
David Greene af8ee2cdee Unconstify Inits
Remove const qualifiers from Init references, per Chris' request.

llvm-svn: 136531
2011-07-29 22:43:06 +00:00
David Greene e32ebf220a [AVX] Create Inits Via Factory Method
Replace uses of new *Init with *Init::get.  This hides the allocation
implementation so that we can unique Inits in various ways.

llvm-svn: 136486
2011-07-29 19:07:07 +00:00
David Greene 1aa0e3e118 [AVX] Constify Inits
Make references to Inits const everywhere.  This is the final step
before making them unique.

llvm-svn: 136485
2011-07-29 19:07:05 +00:00
Jakob Stoklund Olesen abcfdcea5c Intern all RecTy subclass instances to avoid duplicates.
Make all of the RecTy constructors private, and use get() factory
methods instead. Return singleton instances when it makes sense.

ListTy instance pointers are stored in the element RecTy instance.

BitsRecTy instance pointers, one per length, are stored in a static vector.

Also unique DefInit instances. A Record has a unique DefInit which
has a unique RecordRecTy instance.

This saves some 200k-300k RecTy allocations when parsing ARM.td. It
reduces TableGen's heap usage by almost 50%.

llvm-svn: 135399
2011-07-18 17:02:57 +00:00
Eric Christopher 71520a867d Revert r134921, 134917, 134908 and 134907. They're causing failures
in multiple buildbots.

llvm-svn: 134936
2011-07-11 23:06:52 +00:00
David Greene cf8a603a1b Use get(0 Instead of Create()
Respond to some feedback asking for a name change.

llvm-svn: 134921
2011-07-11 20:55:22 +00:00
David Greene af973b4f36 [AVX] Make Inits Foldable
Manage Inits in a FoldingSet.  This provides several benefits:

- Memory for Inits is properly managed

- Duplicate Inits are folded into Flyweights, saving memory

- It enforces const-correctness, protecting against certain classes
  of bugs

The above benefits allow Inits to be used in more contexts, which in
turn provides more dynamism to TableGen.  This enhanced capability
will be used by the AVX code generator to a fold common patterns
together.

llvm-svn: 134907
2011-07-11 18:25:51 +00:00
Jim Grosbach fdc02c1b0d Typo.
llvm-svn: 134563
2011-07-06 23:38:13 +00:00
Owen Anderson a84be6c96b Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0.
Patch by Jim Grosbach.

llvm-svn: 133940
2011-06-27 21:06:21 +00:00
Jim Grosbach 797cff0504 Consolidate some TableGen diagnostic helper functions.
TableGen had diagnostic printers sprinkled about in a few places. Pull them
together into a single location in Error.cpp.

llvm-svn: 133568
2011-06-21 22:55:50 +00:00
Chris Lattner 0d7a5a7daa since the VT is fixed for a ImmLeaf, there is no reason to expose it to the matching code.
llvm-svn: 129677
2011-04-17 22:17:27 +00:00
Chris Lattner 2ff8c1a25f now that predicates have a decent abstraction layer on them, introduce a new
kind of predicate: one that is specific to imm nodes.  The predicate function
specified here just checks an int64_t directly instead of messing around with
SDNode's.  The virtue of this is that it means that fastisel and other things
can reason about these predicates.

llvm-svn: 129675
2011-04-17 22:05:17 +00:00
Chris Lattner 514e292b72 Rework our internal representation of node predicates to expose more
structure and fix some fixmes.  We now have a TreePredicateFn class
that handles all of the decoding of these things.  This is an internal
cleanup that has no impact on the code generated by tblgen.

llvm-svn: 129670
2011-04-17 21:38:24 +00:00
Evan Cheng 880e299dcd - Add "Bitcast" target instruction property for instructions which perform
nothing more than a bitcast.
- Teach tablegen to automatically infer "Bitcast" property.

llvm-svn: 127667
2011-03-15 05:09:26 +00:00
David Greene 094442d331 Silence uninitialized value warnings.
llvm-svn: 124869
2011-02-04 17:01:53 +00:00
David Greene 433c6180ab [AVX] Implement EnforceSmallerThan for mixed int/fp type lists. This
makes type checking for extract_subvector and insert_subvector more
robust and will allow stricter typechecking of more patterns in the
future.

This change handles int and fp as disjoint sets so that it will
enforce integer types to be smaller than the largest integer type and
fp types to be smaller than the largest fp type.  There is no attempt
to check type sizes across the int/fp sets.

llvm-svn: 124672
2011-02-01 19:12:32 +00:00
David Greene 127fd1d540 [AVX] Add type checking support for vector/subvector type constraints.
This will be used to check patterns referencing a forthcoming
INSERT_SUBVECTOR SDNode.  INSERT_SUBVECTOR in turn is very useful for
matching to VINSERTF128 instructions and complements the already
existing EXTRACT_SUBVECTOR SDNode.

llvm-svn: 124145
2011-01-24 20:53:18 +00:00
Chris Lattner 2a0a3b43d7 Flag -> Glue, the ongoing saga
llvm-svn: 122513
2010-12-23 18:28:41 +00:00
Jim Grosbach 65586fea71 Tidy up a bit. Trailing whitespace, hard tabs and 80-columns.
llvm-svn: 122337
2010-12-21 16:16:00 +00:00
Chris Lattner 77d369c8eb eliminate the Records global variable, patch by Garrison Venn!
llvm-svn: 121659
2010-12-13 00:23:57 +00:00
Jim Grosbach fb116aed60 Add source Record* reference to PatternToMatch. Allows better diagnostics.
llvm-svn: 121196
2010-12-07 23:05:49 +00:00
Chris Lattner d8adec70f3 factor the operand list (and related fields/operations) out of
CodeGenInstruction into its own helper class.  No functionality change.

llvm-svn: 117893
2010-11-01 04:03:32 +00:00
Jim Grosbach b75d0ca38e A few 80 column cleanups
llvm-svn: 116069
2010-10-08 18:13:57 +00:00
Daniel Dunbar ba66a81017 Fix -Asserts warning.
llvm-svn: 116030
2010-10-08 02:07:22 +00:00
Dan Gohman ddb2d65c50 Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMem
to IntrReadWriteArgMem, as it's for reading as well as writing.

llvm-svn: 110395
2010-08-05 23:36:21 +00:00
Jakob Stoklund Olesen 1c69646e99 Add the SubRegIndex TableGen class.
This is the beginning of purely symbolic subregister indices, but we need a bit
of jiggling before the explicit numeric indices can be completely removed.

llvm-svn: 104492
2010-05-24 14:48:12 +00:00
Chris Lattner 5debc33168 stop computing InstImpInputs, it is dead
llvm-svn: 101881
2010-04-20 06:30:25 +00:00
Chris Lattner 9dc68d31fd DAGInstruction::ImpOperands is dead after my recent tblgen work, zap it.
llvm-svn: 101880
2010-04-20 06:28:43 +00:00
Chris Lattner 05925fe1fe print the complexity of the pattern being matched in the
comment in the generated table.

llvm-svn: 99794
2010-03-29 01:40:38 +00:00
Chris Lattner 135091bd9d improve type checking of SDNode operand count. This rejects all cases
where an incorrect number of operands is provided to an sdnode instead
of just a few cases.

llvm-svn: 99761
2010-03-28 08:48:47 +00:00
Chris Lattner 6642118e83 finally remove the immAllOnesV_bc/immAllZerosV_bc patterns
and those derived from them.  These are obnoxious because
they were written as: PatLeaf<(bitconvert).  Not having an
argument was foiling adding better type checking for operand
count matching up with what was required (in this case,
bitconvert always requires an operand!)

llvm-svn: 99759
2010-03-28 08:43:23 +00:00
Chris Lattner a787c9e23a teach tblgen to allow patterns like (add (i32 (bitconvert (i32 GPR))), 4),
transforming it into (add (i32 GPR), 4).  This allows us to write type
generic multi patterns and have tblgen automatically drop the bitconvert
in the case when the types align.  This allows us to fold an extra load
in the changed testcase.

llvm-svn: 99756
2010-03-28 08:38:32 +00:00
Chris Lattner 2e9eae1fa2 validate that input sdnodes don't exist in an output pattern.
llvm-svn: 99747
2010-03-28 06:57:56 +00:00
Chris Lattner adf7ecf9d3 eliminate a bunch of code duplication in ParseTreePattern
by rotating it.

llvm-svn: 99746
2010-03-28 06:50:34 +00:00
Chris Lattner ffdac7b76a SDTCisVT<0, isVoid> is not valid, reject it.
llvm-svn: 99744
2010-03-28 06:04:39 +00:00
Chris Lattner 4a5f7be077 fix CodeGenTarget::getRegisterVTs to not return the
same vt multiple times for a register.  For example,
ECX is in 5 different i32 reg classes, just return 
1 i32 instead of 5.

llvm-svn: 99727
2010-03-27 20:32:26 +00:00
Chris Lattner 7bc5d9b576 hoist some funky logic into CodeGenInstruction
from two places in CodeGenDAGPatterns.cpp, and
use it in DAGISelMatcherGen.cpp instead of using
an incorrect predicate that happened to get lucky
on our current targets.

llvm-svn: 99726
2010-03-27 20:09:24 +00:00
Chris Lattner d44966f26d continue pushing tblgen's support for nodes with multiple
results forward.  We can now handle an instruction that 
produces one implicit def and one result instead of one or
the other when not at the root of the pattern.

llvm-svn: 99725
2010-03-27 19:15:02 +00:00