7daf897678
Remove 256-bit AVX non-temporal store intrinsics. Similar was previously done for 128-bit.
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llvm-svn: 156375
2012-05-08 06:58:15 +00:00
d0271b27cb
Fix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are integer instructions.
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llvm-svn: 154580
2012-04-12 07:23:00 +00:00
1adc1d53dd
Fixed a bug in printing "cmp" pseudo ops.
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> This IR code
> %res = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 14)
> fails with assertion:
>
> llc: X86ATTInstPrinter.cpp:62: void llvm::X86ATTInstPrinter::printSSECC(const llvm::MCInst*, unsigned int, llvm::raw_ostream&): Assertion `0 && "Invalid ssecc argument!"' failed.
> 0 llc 0x0000000001355803
> 1 llc 0x0000000001355dc9
> 2 libpthread.so.0 0x00007f79a30575d0
> 3 libc.so.6 0x00007f79a23a1945 gsignal + 53
> 4 libc.so.6 0x00007f79a23a2f21 abort + 385
> 5 libc.so.6 0x00007f79a239a810 __assert_fail + 240
> 6 llc 0x00000000011858d5 llvm::X86ATTInstPrinter::printSSECC(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) + 119
I added the full testing for all possible pseudo-ops of cmp.
I extended X86AsmPrinter.cpp and X86IntelInstPrinter.cpp.
You'l also see lines alignments (unrelated to this fix) in X86IselLowering.cpp from my previous check-in.
llvm-svn: 150068
2012-02-08 08:37:26 +00:00
b85e40f738
Remove pcmpgt/pcmpeq intrinsics as clang is not using them.
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llvm-svn: 149367
2012-01-31 06:52:44 +00:00
b910984458
Allow CRC32 instructions to be selected when AVX is enabled.
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llvm-svn: 147411
2012-01-01 19:51:58 +00:00
1c064e0a89
Fix sfence, lfence, mfence, and clflush to be able to be selected when AVX is enabled. Fix monitor and mwait to require SSE3 or AVX, previously they worked even if SSE3 was disabled. Make prefetch instructions not set the execution domain since they don't use XMM registers.
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llvm-svn: 147409
2012-01-01 19:40:22 +00:00
6572e0f203
Fix a bunch of SSE/AVX patterns to use v2i64/v4i64 loads since all other integer vector loads are promoted to those.
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llvm-svn: 145927
2011-12-06 09:04:59 +00:00
12b72def4e
Fix VINSERTF128/VEXTRACTF128 to be marked as FP instructions. Allow execution dependency fix pass to convert them to their integer equivalents when AVX2 is enabled.
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llvm-svn: 145376
2011-11-29 05:37:58 +00:00
6aa6c0c3b7
remove some old autoupgrade logic
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llvm-svn: 145167
2011-11-27 06:10:54 +00:00
05baa85f58
Properly qualify AVX2 specific parts of execution dependency table. Also enable converting between 256-bit PS/PD operations when AVX1 is enabled. Fixes PR11370.
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llvm-svn: 144622
2011-11-15 05:55:35 +00:00
a70e9417fb
Kill and collapse outstanding DomainValues.
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DomainValues that are only used by "don't care" instructions are now
collapsed to the first possible execution domain after all basic blocks
have been processed. This typically means the PS domain on x86.
For example, the vsel_i64 and vsel_double functions in sse2-blend.ll are
completely collapsed to the PS domain instead of containing a mix of
execution domains created by isel.
llvm-svn: 144037
2011-11-07 23:08:21 +00:00
0e7cbbabea
Add new X86 AVX2 VBROADCAST instructions.
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llvm-svn: 143612
2011-11-03 07:35:53 +00:00
fec80c6ad2
Fix operand type for x86 pmadd_ub_sw intrinsic.
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llvm-svn: 143455
2011-11-01 07:25:22 +00:00
9821e75e64
Fix operand type for int_x86_ssse3_phadd_sw_128 intrinsic
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llvm-svn: 143336
2011-10-31 07:16:37 +00:00
9cdb9ffa43
Fix return type for X86 mpsadbw instrinsic. The instruction takes in a vector of 8-bit integers, but produces a vector of 16-bit integers.
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llvm-svn: 143313
2011-10-30 17:22:45 +00:00
410ec4aad1
As Dan pointed out, movzbl, movsbl, and friends are nicer than their alias
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(movzx/movsx) because they give more information. Revert that part of the patch.
llvm-svn: 129498
2011-04-14 01:46:37 +00:00
7e07d6fb69
Have the X86 back-end emit the alias instead of what's being aliased. In most
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cases, it's much nicer and more informative reading the alias.
llvm-svn: 129497
2011-04-14 01:11:51 +00:00
b902f1dd88
Reapply r129401 with patch for clang.
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llvm-svn: 129419
2011-04-13 00:36:11 +00:00
dbfde42468
Revert r129401 for now. Clang is using the old way of doing things.
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llvm-svn: 129403
2011-04-12 22:59:27 +00:00
47c24875a1
Remove the unaligned load intrinsics in favor of using native unaligned loads.
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Now that we have a first-class way to represent unaligned loads, the unaligned
load intrinsics are superfluous.
First part of <rdar://problem/8460511>.
llvm-svn: 129401
2011-04-12 22:46:31 +00:00
9edf3f50bf
improve the setcc -> setcc_carry optimization to happen more
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consistently by moving it out of lowering into dag combine.
Add some missing patterns for matching away extended versions of setcc_c.
llvm-svn: 122201
2010-12-19 22:08:31 +00:00
9c3f6bf2bf
Fix pastos in handling of AVX cvttsd2si, PR8491.
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Bruno, please review, but I'm pretty sure this is right.
Patch by Alex Mac!
llvm-svn: 117514
2010-10-28 00:35:54 +00:00
367afb5a00
Remove the rest of the nonexistent 64-bit AVX instructions.
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Bruno, please review.
llvm-svn: 113014
2010-09-03 21:23:00 +00:00
d6634a5b2e
AVX doesn't support mm operations neither its instrinsics.
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The AVX versions of PALIGN and PABS* should only exist for
128-bit. Remove the unnecessary stuff.
llvm-svn: 112944
2010-09-03 02:08:45 +00:00
1675ee7a02
Add testcases for all AVX 256-bit intrinsics added in the last couple days
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llvm-svn: 110854
2010-08-11 21:12:09 +00:00
29c8818ad9
Reapply r109881 using a more strict command line for llc.
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llvm-svn: 110833
2010-08-11 17:39:23 +00:00
66161f5eb4
Revert new AVX intrinsic tests. They are breaking buildbots and Bruno is
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away from a computer now.
--- Reverse-merging r109881 into '.':
D test/CodeGen/X86/avx-intrinsics-x86.ll
D test/CodeGen/X86/avx-intrinsics-x86_64.ll
llvm-svn: 109959
2010-07-31 22:36:03 +00:00
92941fdb26
A *bunch* of tests for AVX intrinsics
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llvm-svn: 109881
2010-07-30 19:57:56 +00:00
Craig Topper