Commit Graph

94120 Commits

Author SHA1 Message Date
Tom Stellard beed74af48 R600: Expand vector FNEG
llvm-svn: 186913
2013-07-23 01:47:46 +00:00
Craig Topper bf547cea0e Revert r186907 to fix bots.
llvm-svn: 186910
2013-07-23 01:29:37 +00:00
Craig Topper 80c310056c Don't let x86 asm printer use the no operand movsd alias. It should use the normal movsl instead.
llvm-svn: 186907
2013-07-23 01:21:36 +00:00
Craig Topper c15a9e4fa4 Add aliases to map 'imm, mem' form of x86 bts/btr/btc without a size suffix to their 32-bit forms.
This makes them consistent with 'bt' which already had this handling. gas has the same behavior. There have been discussions on the mailing list about determining size based on the immediate, but my goal here was just to remove the inconsistency.

llvm-svn: 186904
2013-07-23 00:56:15 +00:00
Manman Ren 9974c88f76 Debug Info Finder: use processDeclare and processValue to list debug info
MDNodes used by DbgDeclareInst and DbgValueInst.

Another 16 testing cases failed and they are disabled with
-disable-debug-info-verifier.
A total of 34 cases are disabled with -disable-debug-info-verifier and will be
corrected.

llvm-svn: 186902
2013-07-23 00:22:51 +00:00
Craig Topper 001582833a Explicitly don't let the asm printer use the clrb/w/l aliases for xor %reg, %reg.
It only didn't use it before because it seems InstAlias handling in the asm printer fails to count tied operands so it tried to find an xor with 2 operands instead of the 3 it wfails to count tied.

llvm-svn: 186900
2013-07-23 00:15:19 +00:00
Craig Topper c638f0cd4f Suppress argumentless aliases for some x86 FP operations from being used by the asm writer. Prefer to use the explicit %st(1) form.
llvm-svn: 186897
2013-07-23 00:03:33 +00:00
Matt Arsenault 617a1351b4 Fix typo (ponted -> pointed)
llvm-svn: 186896
2013-07-22 23:52:23 +00:00
Nick Lewycky 6ab9d936d5 Remove extraneous null statement. No functionality change!
llvm-svn: 186893
2013-07-22 23:38:27 +00:00
Jakub Staszak d4d94065e3 Use switch instead of if. No functionality change.
llvm-svn: 186892
2013-07-22 23:38:16 +00:00
Jakub Staszak 8e1a6e7d53 Remove trailing spaces.
llvm-svn: 186890
2013-07-22 23:16:36 +00:00
Eli Bendersky f288626c13 Add a simple unit test for MemoryBuffer::getOpenFile
llvm-svn: 186887
2013-07-22 22:46:21 +00:00
Eric Christopher 1ff26ab694 Typo.
llvm-svn: 186886
2013-07-22 22:25:09 +00:00
Eric Christopher 1d62c25aa7 80-column tidying. Formatting choices by clang-format.
llvm-svn: 186885
2013-07-22 22:25:07 +00:00
Nadav Rotem cf0dcdc71c When we vectorize across multiple basic blocks we may vectorize PHINodes that create a cycle. We already break the cycle on phi-nodes, but arithmetic operations are still uplicated. This patch adds code that checks if the operation that we are vectorizing was vectorized during the visit of the operands and uses this value if it can.
llvm-svn: 186883
2013-07-22 22:18:07 +00:00
Jakub Staszak cb132face0 OldPtr is llvm::Instruction. Remove unneeded cast<>.
llvm-svn: 186880
2013-07-22 22:10:43 +00:00
Richard Trieu 46978d41e6 Silence gcc warning.
llvm-svn: 186879
2013-07-22 21:29:28 +00:00
Kevin Enderby 285da02094 Fix the move to/from accumulator register instructions that use a full 64-bit
absolute address encoded in the instruction.

rdar://8612627 and rdar://14299221

llvm-svn: 186878
2013-07-22 21:25:31 +00:00
Jakub Staszak 6b36db08f3 Change tabs to spaces.
llvm-svn: 186877
2013-07-22 21:11:30 +00:00
Jakub Staszak d07dd7f2ef Fix typo in test.
llvm-svn: 186876
2013-07-22 21:10:42 +00:00
Michael Gottesman c0659fad7f [stackprotector] Changed isNoopBitcast/sameNoopInput to take TargetLoweringBase instead of TargetLowering.
Both functions only use functionality from TargetLoweringBase.

rdar://13935163

llvm-svn: 186874
2013-07-22 21:05:47 +00:00
Craig Topper 998bcf9534 Recommit r186813: More Intel syntax alias fixes. With the addition of suppressing some of the aliases from being emitted by the asm printer.
llvm-svn: 186869
2013-07-22 20:46:37 +00:00
Michael Gottesman a6188f9fcd [stackprotector] Refactored ssp prologue creation code into its own helper function.
No functionality change.

rdar://13935163

llvm-svn: 186868
2013-07-22 20:44:11 +00:00
Manman Ren 14dd2a656e Debug Info Finder: add processScope to actually handle the Scope.
Instead of just adding the scope to the list, we actually handle the scope.

llvm-svn: 186867
2013-07-22 20:28:53 +00:00
Bill Wendling c02a0aabb5 Recommit r186217 with testcase fix:
Use the function attributes to pass along the stack protector buffer size.

 Now that we have robust function attributes, don't use a command line option to
 specify the stack protecto buffer size.

llvm-svn: 186863
2013-07-22 20:15:21 +00:00
Akira Hatanaka 4d2ea3c696 [mips] Fix MipsAsmParser::parseCCRRegs.
Enable parsing all 32 floating point control registers $0-31 and stop trying to
parse floating point condition code register $fcc0. Also, return ParseFail if
the operand being parsed is not in the expected format. 

llvm-svn: 186861
2013-07-22 19:30:38 +00:00
Rafael Espindola 0d6b347fa5 Mark ELF's first symbol as format specific so that llvm-nm ignores it.
llvm-svn: 186860
2013-07-22 19:24:34 +00:00
Matt Arsenault fb18323885 Fix spelling and grammar
llvm-svn: 186858
2013-07-22 18:59:58 +00:00
Matt Arsenault d0f3e2a8f2 Fix missing const
llvm-svn: 186857
2013-07-22 18:58:53 +00:00
Akira Hatanaka 44ff81d4e3 [mips] Use ADDu instead of OR to copy general purpose registers. Also, delete
the InstAlias pattern which maps "move" to OR to resolve ambiguity in
MatchTable.

llvm-svn: 186855
2013-07-22 18:52:22 +00:00
Andrew Kaylor a23ea166dd Adding example source to support MCJIT/Kaleidoscope blog posts.
llvm-svn: 186854
2013-07-22 18:47:24 +00:00
Shuxin Yang 1e6d80e2b4 Initialize/Register LTO passes to enable flags like -print-after=<lto-pass>
There already have two "dead" functions, initialize{IPO|IPA}, defined for 
similar purpose. I decide not to call these two functions for two reasons:
  o. they don't cover all LTO passes (which will soon be separated into IPO 
     and post-IPO passes)
  o. We have not yet figured out the right passes and the ordering for IPO 
     and post-IPO stages, meaning this change is only for the time being.

Since LTO passes are registered, we are now able to print IR before and 
after particular point.

For OSX users:
--------------
  "...-Wl,-mllvm -Wl,-print-after=<pass-name>" will print IR after the
  specified pass.

For Other UNIX with GNU gold linker:
------------------------------------
  "-Wl,-plugin-opt=-print-after=<pass-name>" should work.
  (NOTE: no need for "-Wl,-mllvm")

  Strip "-Wl," if flags are fed directly to linker instead of clang/clang++.

llvm-svn: 186853
2013-07-22 18:40:34 +00:00
Eric Christopher 745f8ffa3e Fix typo.
llvm-svn: 186852
2013-07-22 18:26:18 +00:00
Eric Christopher 19d153261f Formatting.
llvm-svn: 186851
2013-07-22 18:26:15 +00:00
Jim Grosbach 3f11faef0d MC: mayAffectControlFlow() handling for variadic instructions.
Variadic MC instructions don't note whether the variable operands
are uses or defs, so mayAffectControlFlow() must conservatively
assume they are defs and return true if the PC is in the operand
list.

rdar://14488628

llvm-svn: 186846
2013-07-22 17:45:55 +00:00
Nadav Rotem 8c45d4b27f Fix an obvious typo in the loop vectorizer where the cost model uses the wrong variable. The variable BlockCost is ignored.
We don't have tests for the effect of if-conversion loops because it requires a big test (that includes if-converted loops) and it is difficult to find and balance a loop to do the right thing.

llvm-svn: 186845
2013-07-22 17:10:48 +00:00
Justin Holewinski 0b76dd85ea [NVPTX] Remove unused prototypes
llvm-svn: 186844
2013-07-22 17:04:40 +00:00
Hans Wennborg 31d6fd84e6 Option parsing: allow aliases in groups
Option aliases in option groups were previously disallowed by an assert.
As far as I can tell, there was no technical reason for this, and I would
like to be able to put cl.exe compatible options in their own group for Clang,
so let's change the assert.

llvm-svn: 186838
2013-07-22 16:18:13 +00:00
Mihai Popa 8a9da5b00c This adds range checking for "ldr Rn, [pc, #imm]" Thumb
instructions. With this patch:

1. ldr.n is recognized as mnemonic for the short encoding
2. ldr.w is recognized as menmonic for the long encoding
3. ldr will map to either short or long encodings depending on the size of the offset

llvm-svn: 186831
2013-07-22 15:49:36 +00:00
Rafael Espindola 623c3d8489 Replace archive members in the old position.
This matches gnu archive behavior and since archive member order can change
which member is used, not changing the order on replacement looks like the
right thing to do.

This patch also refactors the logic for which archive member to keep and
whether to move it to a helper function (computeInsertAction). The
nesting in computeNewArchiveMembers was getting a bit confusing.

llvm-svn: 186829
2013-07-22 15:11:51 +00:00
Rafael Espindola 9cea44a5f2 Don't depend on a llvm-ar specific behavior.
GNU ar when not given the a or b modifiers replaces archive members in the
same location of the old ones. I am about to implement that in llvm-ar. For
now, just don't depend on the current llvm-ar behavior on this test.

llvm-svn: 186823
2013-07-22 12:41:04 +00:00
Justin Holewinski cd069e6dec [NVPTX] Use approximate FP ops when unsafe-fp-math is used, and append
.ftz to instructions if the nvptx-f32ftz attribute is set to "true"

llvm-svn: 186820
2013-07-22 12:18:04 +00:00
Tim Northover 1a9dafcd6f Revert "More Intel syntax alias fixes."
This reverts commit r186813, which broke the bots.

llvm-svn: 186818
2013-07-22 11:02:32 +00:00
Craig Topper b095c09330 Fix typo. Change %cl to CL in Intel pattern.
llvm-svn: 186815
2013-07-22 10:07:26 +00:00
Craig Topper 61da939a17 More Intel syntax alias fixes.
llvm-svn: 186814
2013-07-22 09:58:07 +00:00
Craig Topper 1b9e4e7e9d More Intel syntax alias fixes.
llvm-svn: 186813
2013-07-22 09:42:31 +00:00
Craig Topper 03db790dc6 Change %xmm0 to XMM0 in Intel side of asm strings for PBLENDVB.
llvm-svn: 186812
2013-07-22 09:22:49 +00:00
Craig Topper 8f9402a989 Add Intel variants to aliases for some FP instructions.
llvm-svn: 186811
2013-07-22 09:18:43 +00:00
Tim Northover eb5e4d532c ARM: remove now unneeded custom Asm converters
After Ulrich's r180677 (thanks!) TableGen is intelligent enough to
handle tied constraints involving complex operands properly, so
virtually all of the ARM custom converters are now unnecessary.

llvm-svn: 186810
2013-07-22 09:06:12 +00:00
Craig Topper d0ed3a417e Reverse operands for Intel syntax form of 'bt' alias.
llvm-svn: 186809
2013-07-22 07:47:51 +00:00