Commit Graph

388508 Commits

Author SHA1 Message Date
zoecarver bede7523b1 [libcxx][ranges] Add `contiguous_iterator`.
Differential Revision: https://reviews.llvm.org/D101396
2021-05-14 15:27:40 -07:00
Benjamin Kramer cb846654c6 [compiler-rt] Fix deprection warnings on INSTANTIATE_TEST_CASE_P 2021-05-15 00:24:02 +02:00
Nicolas Vasilache dd65f420cd [mlir][Linalg] NFC - More gracefully degrade lookup into failure during comprehensive bufferization (4/n)
Differential revsion: https://reviews.llvm.org/D102420
2021-05-14 22:12:23 +00:00
Brendon Cahoon 3f7b7e7393 [AMDGPU] Update SCC defs to VCC when uses are changed to VCC
The FixSGPRCopies pass converts instructions to VALU when
removing illegal VGPR to SGPR copies. Instructions that use SCC
are changed to use VCC instead. When that happens, the pass must
also change instructions that define SCC to define VCC.

The pass was not changing the SCC definition when an ADDC is
converted due to a input that is a VGPR to SGPR copy. But, the
initial ADD insruction, which define SCC, is not converted.
This causes a compilation failure due to a use of an undefined
physical register.

This patch adds code that inserts the SCC definition in the
MoveToVALU worklist when a SCC use is converted to a VCC use.

Differential Revision: https://reviews.llvm.org/D102111
2021-05-14 18:05:05 -04:00
Mitch Phillips 597ecf9fb7 [msan] [NFC] Add newline to EOF in test. 2021-05-14 15:00:00 -07:00
Nicolas Vasilache 6f90955f69 [mlir][Linalg] Add support for subtensor_insert comprehensive bufferization (3/n)
Differential revision: https://reviews.llvm.org/D102417
2021-05-14 21:51:00 +00:00
Mitch Phillips 7aa89c4a22 Revert "[X86] Try to pass DebugLoc by const-ref to avoid costly TrackingMDNodeRef copies. NFCI."
This reverts commit 5ed56a821c.

Reason: Broke the MSan buildbots. See Phabricator for more info
(https://reviews.llvm.org/rG5ed56a821c0622869739a3ae752eea97a1ee1f48).
2021-05-14 14:30:57 -07:00
Arthur Eubanks e8448a5985 [NFC] Directly get GV type 2021-05-14 14:27:07 -07:00
Michael Kruse fb01b1461a [Polly] Run polly-update-format. NFC.
Thanks to Leonard Chan for reporting.
2021-05-14 16:23:36 -05:00
wlei e475d4d69f [CSSPGO] Fix return value of getProbeWeight
Currently we didn't support multiple return type, we work around to use error_code to represent:

1)  The dangling probe.
2)  Ignore the weight of non-probe instruction

While merging the instructions' weight for the whole BB, it will filter out the error code. But If all instructions of the BB give error_code, the outside logic will mark it as a BB requiring the inference algorithm to infer its weight. This is different from the zero value which will be treated as a cold block.

Fix one place that if we can't find the FunctionSamples in the profile data which indicates the BB is cold, we choose to return zero.

Also refine the comments.

Reviewed By: hoy, wenlei

Differential Revision: https://reviews.llvm.org/D102007
2021-05-14 14:06:09 -07:00
Nikita Popov c4fb2a1fc2 [MemDep] Use BatchAA in more places (NFCI)
Previously, we already used BatchAA for individual simple pointer
dependency queries. This extends BatchAA usage for the non-local
case, so that only one BatchAA instance is used for all blocks,
instead of one instance per block.

Use of BatchAA is safe as IR cannot be modified during a MemDep
query.
2021-05-14 22:54:40 +02:00
Neumann Hon 8a7e2fb5f2 [SystemZ] [z/OS] Add SystemZCallingConventionRegisters class
This patch adds the abstract class SystemZCallingConventionRegisters
which is a SystemZ-specific class detailing special registers used
by calling conventions on the target. SystemZELFRegisters and
SystemZXPLINK64Registers implement this class for ELF and XPLINK64
respectively.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D102370
2021-05-14 16:51:26 -04:00
Mateusz Mikuła f84a4cb0df [LLD][MinGW] Ignore --no-undefined flag
AFAIK this is the default behaviour when this flag is not passed.

Differential Revision: https://reviews.llvm.org/D102516
2021-05-14 23:47:50 +03:00
Mateusz Mikuła bf95a8cf86 [MinGW] Always enable -mbig-obj for LLVM build unless using Clang
It's easy to hit 2**16 limit with i686 GNU toolchains these days.
Clang does it automagically, so it's not needed there, and the option
causes warnings about being unused when linking.

Differential Revision: https://reviews.llvm.org/D102419
2021-05-14 23:47:50 +03:00
Mitch Phillips 6c913b2f37 [Scudo] Delete unused flag 'rss_limit_mb'.
EOM.

Reviewed By: cryptoad

Differential Revision: https://reviews.llvm.org/D102529
2021-05-14 13:45:43 -07:00
Florian Hahn 68d52f0dbe
[LV] Add another more complex first-order recurrence sinking test. 2021-05-14 21:26:34 +01:00
Florian Hahn 187a14e1f3
[Clang,Driver] Add -fveclib=Darwin_libsystem_m support.
Support for Darwin's libsystem_m's vector functions has been added to
LLVM in 93a9a8a8d9.

This patch adds support for -fveclib=Darwin_libsystem_m to Clang.

Reviewed By: arphaman

Differential Revision: https://reviews.llvm.org/D102489
2021-05-14 21:00:13 +01:00
Nikita Popov 5e289cc597 [AA] Support callCapturesBefore() on BatchAA (NFCI)
This is not expected to have any practical compile-time effect,
as the alias() calls inside callCapturesBefore() are rare. This
should still be supported for API completeness, and might be
useful for reachability caching.
2021-05-14 21:48:08 +02:00
Alexey Bataev 20e2b4f6e0 [SLP][NFC]Add a test for non-consecutive inserts, NFC. 2021-05-14 12:44:35 -07:00
Fangrui Song deb2b20510 [sanitizer] Commit a missing change in BufferedStackTrace::Unwind 2021-05-14 12:41:34 -07:00
Fangrui Song fa27255d16 [sanitizer] Fall back to fast unwinder
`-fno-exceptions -fno-asynchronous-unwind-tables` compiled programs don't
produce .eh_frame on Linux and other ELF platforms, so the slow unwinder cannot
print stack traces. Just fall back to the fast unwinder: this allows
-fno-asynchronous-unwind-tables without requiring the sanitizer option
`fast_unwind_on_fatal=1`

Reviewed By: #sanitizers, vitalybuka

Differential Revision: https://reviews.llvm.org/D102046
2021-05-14 12:27:33 -07:00
Benjamin Kramer 4901199f5b GTEST_HAS_TR1_TUPLE is gone, stop defining it. 2021-05-14 21:14:32 +02:00
Benjamin Kramer 9c88fb4e27 [ProfData] Address a unit test FIXME 2021-05-14 21:14:32 +02:00
Kevin Athey 1b9972d01c Remove (unneeded) '-asan-use-after-return' from hoist-argument-init-insts.ll.
Remove (unneeded) '-asan-use-after-return' from hoist-argument-init-insts.ll.

Reviewed By: vsk

Differential Revision: https://reviews.llvm.org/D102448
2021-05-14 11:55:23 -07:00
Benjamin Kramer 17ef1017f0 [flang] s/TYPED_TEST_CASE/TYPED_TEST_SUITE/ as the former is deprecated 2021-05-14 20:39:48 +02:00
Benjamin Kramer 09499efb7a Add another -Wdeprecated-copy hack for gtest 2021-05-14 20:37:03 +02:00
Tim Northover 709f2c7e14 SwiftAsync: remove duplicate instance in array. NFC. 2021-05-14 19:21:54 +01:00
Philip Reames 23c93c2555 Discount invariant instructions in full unrolling
This patch updates the cost model for full unrolling to discount the cost of a loop invariant expression on all but one iteration. The reasoning here is that such an expression (as determined by SCEV) will be CSEd or DSEd once the loop is unrolled. Note that SCEVs reasoning will find things which could be invariant, not simply those outside the loop.

Differential Revision: https://reviews.llvm.org/D102506
2021-05-14 11:07:19 -07:00
River Riddle dfacb8c8d4 [mlir] Add missing dependence to TestDialect from TestTransforms
This was accidentally dropped in D102456
2021-05-14 11:00:31 -07:00
Michael Kruse 5aafcb2b44 [Polly] Add support for -polly-position=early with the NPM.
This required support for the canonicalization passes, inlcuding
porting RewriteByReferenceParams to the NPM.

For some reason, the legacy pass pipeline with -polly-position=early did
not run the CodePreparation pass. This was fixed as well.
2021-05-14 12:55:03 -05:00
Sanjay Patel e82db87fb1 [InstCombine] drop poison flags when simplifying 'shl' based on demanded bits
As with other transforms in demanded bits, we must be careful not to
wrongly propagate nsw/nuw if we are reducing values leading up to the shift.

This bug was introduced with 1b24f35f84 and leads to the miscompile
shown in:
https://llvm.org/PR50341
2021-05-14 13:54:13 -04:00
Sanjay Patel 339d0c1d26 [InstCombine] add test for shl demanded bits miscompile; NFC
PR50341
2021-05-14 13:54:13 -04:00
Stanislav Mekhanoshin 6fb02596a2 [AMDGPU] Add support for architected flat scratch
Add support for the readonly flat Scratch register initialized
by the SPI.

Differential Revision: https://reviews.llvm.org/D102432
2021-05-14 10:53:48 -07:00
Nico Weber 0ca6e93a9e [gn build] (manually) merge b7d1ab75cf
No check-hwasan-lam target yet, though.
2021-05-14 13:51:10 -04:00
Tomasz Miąsko cd74dd178b [Demangle][Rust] Parse integer constants
Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D102179
2021-05-14 19:47:19 +02:00
Philip Reames 653fa0b46a Do actual DCE in LoopUnroll (try 2)
Recommitting after addressing a missed review comment, and updating an aarch64 test I'd missed.

LoopUnroll does a limited DCE pass after unrolling, but if you have a chain of dead instructions, it only deletes the last one. Improve the code to recursively delete all trivially dead instructions.

Differential Revision: https://reviews.llvm.org/D102511
2021-05-14 10:42:36 -07:00
Mitch Phillips c17ac8432e [GWP-ASan] Migrate lit tests from old Scudo -> Standalone.
This removes one of the last dependencies on old Scudo, and should allow
us to delete the old Scudo soon.

Reviewed By: vitalybuka, cryptoad

Differential Revision: https://reviews.llvm.org/D102349
2021-05-14 10:41:48 -07:00
Ian Bearman 0816b96a10 Allow same memory space for SRC and DST of dma_start operations
This change allows the SRC and DST of dma_start operations to be located in the
    same memory space. This applies to both the Affine dialect and Memref dialect
    versions of these Ops. The documention has been updated to reflect this by
    explicitly stating overlapping memory locations are not supported (undefined
    behavior).

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D102274
2021-05-14 10:40:15 -07:00
Fangrui Song 5741dc87a5 [test] Improve x86-64-plt.s 2021-05-14 10:38:40 -07:00
Benjamin Kramer fde5b24963 [clangd] Make unit test compatible with gtest 1.10.0 2021-05-14 19:37:46 +02:00
River Riddle 3fef2d26a3 [mlir][NFC] Move passes in test/lib/Transforms/ to a directory that mirrors what they test
test/lib/Transforms/ has bitrot and become somewhat of a dumping grounds for testing pretty much any part of the project. This revision cleans this up, and moves the files within to a directory that reflects what is actually being tested.

Differential Revision: https://reviews.llvm.org/D102456
2021-05-14 10:28:11 -07:00
Benjamin Kramer 1dbfeb463b Document updated googletest + modifications 2021-05-14 19:26:12 +02:00
Matt Arsenault c7cff08f79 AMDGPU: Fix assert when rewriting saddr d16 loads
moveOperands does not handle moving tied operands since it would
generally have to fixup the tied operand references. Avoid the assert
by untying and retying after the modification. These in place
modifications really aren't managable.
2021-05-14 13:24:19 -04:00
Roman Lebedev 990e806b36
[NFC][X86][MCA] Add sudo-zero-idiom vperm2f128/vperm2i128 tests - don't break deps
While btver2 model states that this pattern is a zero-cycle zero-idiom
on Jaguar, it does not appear to be the case on Znver3,
here it measures as not being recognized as dep-breaking zero-idiom,
let alone a zero-cycle one.
2021-05-14 20:23:05 +03:00
Roman Lebedev 1fc1c88704
[X86] AMD Zen 3: same-reg AVX YMM VPCMPGT{B,W,D,Q} is a zero-cycle(!) dep-breaking zero-idiom
As measured by exegesis, and confirmed by ref docs.
2021-05-14 20:23:05 +03:00
Roman Lebedev 2f8572d8e2
[X86] AMD Zen 3: same-reg AVX XMM VPCMPGT{B,W,D,Q} is a zero-cycle(!) dep-breaking zero-idiom
As measured by exegesis, and confirmed by ref docs.
2021-05-14 20:23:04 +03:00
Roman Lebedev f8f7c765a0
[X86] AMD Zen 3: same-reg SSE XMM PCMPGT{B,W,D,Q} is a 1-cycle(!) dep-breaking zero-idiom
As measured by exegesis, and confirmed by ref docs.
2021-05-14 20:23:04 +03:00
Roman Lebedev d2fb4bfba8
[NFC][X86][MCA] AMD Zen 3: add same-reg AVX YMM VPCMPGT{B,W,D,Q} tests 2021-05-14 20:23:04 +03:00
Roman Lebedev 094b493a3a
[NFC][X86][MCA] AMD Zen 3: add same-reg AVX XMM VPCMPGT{B,W,D,Q} tests 2021-05-14 20:23:04 +03:00
Roman Lebedev 1c0ac0b0f2
[NFC][X86][MCA] AMD Zen 3: add same-reg SSE XMM PCMPGT{B,W,D,Q} tests 2021-05-14 20:23:03 +03:00