Commit Graph

333 Commits

Author SHA1 Message Date
Benjamin Kramer b6d0bd48bd [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.
Remove the old functions.

llvm-svn: 202636
2014-03-02 12:27:27 +00:00
Vincent Lejeune 92b0a64906 Add a RequireStructuredCFG Field to TargetMachine.
llvm-svn: 196634
2013-12-07 01:49:19 +00:00
Andrew Trick 97a1d7c475 Fix tail merging to assign the (more) correct BasicBlock when splitting.
This makes it possible to write unit tests that are less susceptible
to minor code motion, particularly copy placement. block-placement.ll
covers this case with -pre-RA-sched=source which will soon be
default. One incorrectly named block is already fixed, but without
this fix, enabling new coalescing and scheduling would cause more
failures.

llvm-svn: 184680
2013-06-24 01:55:01 +00:00
Chad Rosier abdb1d69ab Simplify logic now that r182490 is in place. No functional change intended.
llvm-svn: 182531
2013-05-22 23:17:36 +00:00
Chandler Carruth 9fb823bbd4 Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

llvm-svn: 171366
2013-01-02 11:36:10 +00:00
Bill Wendling 698e84fc4f Remove the Function::getFnAttributes method in favor of using the AttributeSet
directly.

This is in preparation for removing the use of the 'Attribute' class as a
collection of attributes. That will shift to the AttributeSet class instead.

llvm-svn: 171253
2012-12-30 10:32:01 +00:00
Bill Wendling 3d7b0b8ac7 Rename the 'Attributes' class to 'Attribute'. It's going to represent a single attribute in the future.
llvm-svn: 170502
2012-12-19 07:18:57 +00:00
Chandler Carruth ed0881b2a6 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

llvm-svn: 169131
2012-12-03 16:50:05 +00:00
Jakub Staszak 8262b885da Remove unneeded #include.
llvm-svn: 168670
2012-11-27 02:00:27 +00:00
Bill Wendling c9b22d735a Create enums for the different attributes.
We use the enums to query whether an Attributes object has that attribute. The
opaque layer is responsible for knowing where that specific attribute is stored.

llvm-svn: 165488
2012-10-09 07:45:08 +00:00
Craig Topper 2f6031c643 Fix indentation. Remove 'else' after return. No functional change.
llvm-svn: 165381
2012-10-07 20:31:05 +00:00
Bill Wendling 863bab689a Remove the `hasFnAttr' method from Function.
The hasFnAttr method has been replaced by querying the Attributes explicitly. No
intended functionality change.

llvm-svn: 164725
2012-09-26 21:48:26 +00:00
Benjamin Kramer f29db275b2 Reduce duplicated hash map lookups.
llvm-svn: 162362
2012-08-22 15:37:57 +00:00
Benjamin Kramer bde9176663 Fix typos found by http://github.com/lyda/misspell-check
llvm-svn: 157885
2012-06-02 10:20:22 +00:00
Jakob Stoklund Olesen 54038d796c Switch all register list clients to the new MC*Iterator interface.
No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

llvm-svn: 157854
2012-06-01 23:28:30 +00:00
Jakob Stoklund Olesen 92a0083944 Switch some getAliasSet clients to MCRegAliasIterator.
MCRegAliasIterator can optionally visit the register itself, allowing
for simpler code.

llvm-svn: 157837
2012-06-01 20:36:54 +00:00
Bill Wendling e351e8c52d Forgot to reverse conditional.
llvm-svn: 157349
2012-05-23 22:12:50 +00:00
Bill Wendling 041793c452 Reduce indentation by early detection of 'continue'. No functionality change.
llvm-svn: 157348
2012-05-23 22:09:50 +00:00
Preston Gurd 9a0914753a This patch fixes a problem which arose when using the Post-RA scheduler
on X86 Atom. Some of our tests failed because the tail merging part of
the BranchFolding pass was creating new basic blocks which did not
contain live-in information. When the anti-dependency code in the Post-RA
scheduler ran, it would sometimes rename the register containing
the function return value because the fact that the return value was
live-in to the subsequent block had been lost. To fix this, it is necessary
to run the RegisterScavenging code in the BranchFolding pass.

This patch makes sure that the register scavenging code is invoked
in the X86 subtarget only when post-RA scheduling is being done.
Post RA scheduling in the X86 subtarget is only done for Atom.

This patch adds a new function to the TargetRegisterClass to control
whether or not live-ins should be preserved during branch folding.
This is necessary in order for the anti-dependency optimizations done
during the PostRASchedulerList pass to work properly when doing
Post-RA scheduling for the X86 in general and for the Intel Atom in particular.

The patch adds and invokes the new function trackLivenessAfterRegAlloc()
instead of using the existing requiresRegisterScavenging().
It changes BranchFolding.cpp to call trackLivenessAfterRegAlloc() instead of
requiresRegisterScavenging(). It changes the all the targets that
implemented requiresRegisterScavenging() to also implement
trackLivenessAfterRegAlloc().  

It adds an assertion in the Post RA scheduler to make sure that post RA
liveness information is available when it is needed.

It changes the X86 break-anti-dependencies test to use –mcpu=atom, in order
to avoid running into the added assertion.

Finally, this patch restores the use of anti-dependency checking
(which was turned off temporarily for the 3.1 release) for
Intel Atom in the Post RA scheduler.

Patch by Andy Zhang!

Thanks to Jakob and Anton for their reviews.

llvm-svn: 155395
2012-04-23 21:39:35 +00:00
Jakob Stoklund Olesen d1664a1571 Branch folding may invalidate liveness.
Branch folding can use a register scavenger to update liveness
information when required. Don't do that if liveness information is
already invalid.

llvm-svn: 153517
2012-03-27 17:06:09 +00:00
Bill Wendling 7c5dcb6ccf Where the BranchFolding pass removes a branch then adds another better branch,
the DebugLoc information can be maintained throughout by grabbing the DebugLoc
before the RemoveBranch and then passing the result to the InsertBranch.
Patch by Andrew Stanford-Jason!

llvm-svn: 152212
2012-03-07 08:49:42 +00:00
Craig Topper 4b02a29eba Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.
llvm-svn: 152016
2012-03-05 05:37:41 +00:00
Craig Topper 1d32658877 Use uint16_t to store register overlaps to reduce static data.
llvm-svn: 152001
2012-03-04 10:43:23 +00:00
Chad Rosier 5dfe6dab25 Remove extra semi-colons.
llvm-svn: 151169
2012-02-22 17:25:00 +00:00
Jakob Stoklund Olesen e9e30d083c Handle register masks in branch folding.
Don't attempt to move instructions with regmask operands. They are most
likely calls anyway.

llvm-svn: 150634
2012-02-15 23:42:54 +00:00
Andrew Trick 58648e4e98 Move pass configuration out of pass constructors: BranchFolderPass
llvm-svn: 150095
2012-02-08 21:22:48 +00:00
Andrew Trick 9e761997d8 whitespace
llvm-svn: 150094
2012-02-08 21:22:43 +00:00
David Blaikie 46a9f016c5 More dead code removal (using -Wunreachable-code)
llvm-svn: 148578
2012-01-20 21:51:11 +00:00
Evan Cheng 5c03a6b8f5 When hoisting common code, watch out for uses which are marked "kill". If the
killed registers are needed below the insertion point, then unset the kill
marker.

Sorry I'm not able to find a reduced test case.

rdar://10660944

llvm-svn: 148043
2012-01-12 20:31:24 +00:00
Evan Cheng 6cc8d49885 Revert part of r147716. Looks like x87 instructions kill markers are all messed
up so branch folding pass can't use the scavenger. :-(  This doesn't breaks
anything currently. It just means targets which do not carefully update kill
markers cannot run post-ra scheduler (not new, it has always been the case).

We should fix this at some point since it's really hacky.

llvm-svn: 147719
2012-01-07 03:35:48 +00:00
Evan Cheng 00b1a3cd7e Added a late machine instruction copy propagation pass. This catches
opportunities that only present themselves after late optimizations
such as tail duplication .e.g.
## BB#1:
        movl    %eax, %ecx
        movl    %ecx, %eax
        ret

The register allocator also leaves some of them around (due to false
dep between copies from phi-elimination, etc.)

This required some changes in codegen passes. Post-ra scheduler and the
pseudo-instruction expansion passes have been moved after branch folding
and tail merging. They were before branch folding before because it did
not always update block livein's. That's fixed now. The pass change makes
independently since we want to properly schedule instructions after
branch folding / tail duplication.

rdar://10428165
rdar://10640363

llvm-svn: 147716
2012-01-07 03:02:36 +00:00
Evan Cheng 7fae11b231 - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
to finalize MI bundles (i.e. add BUNDLE instruction and computing register def
  and use lists of the BUNDLE instruction) and a pass to unpack bundles.
- Teach more of MachineBasic and MachineInstr methods to be bundle aware.
- Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to
  prevent IT blocks from being broken apart.

llvm-svn: 146542
2011-12-14 02:11:42 +00:00
Evan Cheng 7f8e563a69 Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.

llvm-svn: 146026
2011-12-07 07:15:52 +00:00
Bill Wendling 9b9932229d Reapply r142920 with fix:
An MBB which branches to an EH landing pad shouldn't be considered for tail merging.

In SjLj EH, the jump to the landing pad is not done explicitly through a branch
statement. The EH landing pad is added as a successor to the throwing
BB. Because of that however, the branch folding pass could mistakenly think that
it could merge the throwing BB with another BB. This isn't safe to do.
<rdar://problem/10334833>

llvm-svn: 143001
2011-10-26 01:10:25 +00:00
Duncan Sands 6ca458e49a Revert commit 142891. Takumi bisected the tablegen miscompiles
down to this commit.  Original commit message:

An MBB which branches to an EH landing pad shouldn't be considered for tail merging.

In SjLj EH, the jump to the landing pad is not done explicitly through a branch
statement. The EH landing pad is added as a successor to the throwing
BB. Because of that however, the branch folding pass could mistakenly think that
it could merge the throwing BB with another BB. This isn't safe to do.
<rdar://problem/10334833>

llvm-svn: 142920
2011-10-25 12:30:22 +00:00
Bill Wendling 38ced995f6 An MBB which branches to an EH landing pad shouldn't be considered for tail merging.
In SjLj EH, the jump to the landing pad is not done explicitly through a branch
statement. The EH landing pad is added as a successor to the throwing
BB. Because of that however, the branch folding pass could mistakenly think that
it could merge the throwing BB with another BB. This isn't safe to do.
<rdar://problem/10334833>

llvm-svn: 142891
2011-10-25 00:54:05 +00:00
Jakob Stoklund Olesen d633abebf6 Fix liveness computations in BranchFolding.
The old code would look at kills and defs in one pass over the
instruction operands, causing problems with this code:

  %R0<def>, %CPSR<def,dead> = tLSLri %R5<kill>, 2, pred:14, pred:%noreg
  %R0<def>, %CPSR<def,dead> = tADDrr %R4<kill>, %R0<kill>, pred:14, %pred:%noreg

The last instruction kills and redefines %R0, so it is still live after
the instruction.

This caused a register scavenger crash when compiling 483.xalancbmk for
armv6. I am not including a test case because it requires too much bad
luck to expose this old bug.

First you need to convince the register allocator to use %R0 twice on
the tADDrr instruction, then you have to convince BranchFolding to do
something that causes it to run the register scavenger on he bad block.

<rdar://problem/9898200>

llvm-svn: 136973
2011-08-05 18:47:07 +00:00
Eli Friedman bf007364bf When tail-merging multiple blocks, make sure to correctly update the live-in list on the merged block to correctly account for the live-outs of all the predecessors. They might not be the same in all cases (the testcase I have involves a PHI node where one of the operands is an IMPLICIT_DEF).
Unfortunately, the testcase I have is large and confidential, so I don't have a test to commit at the moment; I'll see if I can come up with something smaller where this issue reproduces.

<rdar://problem/9716278>

llvm-svn: 134565
2011-07-06 23:41:48 +00:00
Evan Cheng 6cc775f905 - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021
2011-06-28 19:10:37 +00:00
Rafael Espindola 3aeaf9e4c1 Add 132986 back, but avoid non-determinism if a bb address gets reused.
llvm-svn: 132995
2011-06-14 15:31:54 +00:00
Rafael Espindola 06ba7a68de revert 132986 to see if the bots go green.
llvm-svn: 132988
2011-06-14 12:48:26 +00:00
Rafael Espindola da24f2f8e1 Make the threshold used by branch folding softer. Before we would get a
sharp all or nothing transition when one extra predecessor was added. Now
we still test first ones for merging.

llvm-svn: 132974
2011-06-14 04:41:17 +00:00
Devang Patel cdec11413b Add comment.
llvm-svn: 132149
2011-05-26 21:49:28 +00:00
Devang Patel 42ddaa10d3 During branch folding avoid inserting redundant DBG_VALUE machine instructions.
llvm-svn: 132148
2011-05-26 21:47:59 +00:00
Evan Cheng 8a88026ae3 Update comment.
llvm-svn: 131258
2011-05-12 22:35:48 +00:00
Evan Cheng 43054e6159 Re-enable branchfolding common code hoisting optimization. Fixed a liveness test bug and also taught it to update liveins.
llvm-svn: 131241
2011-05-12 20:30:01 +00:00
Evan Cheng 33469b2cae Temporarily disable the transformation. It's breaking 186.crafty in some configuration.
llvm-svn: 131235
2011-05-12 18:44:58 +00:00
Evan Cheng cfdf33904b Re-commit 131172 with fix. MachineInstr identity checks should check dead
markers. In some cases a register def is dead on one path, but not on
another.

This is passing Clang self-hosting.

llvm-svn: 131214
2011-05-12 00:56:58 +00:00
Rafael Espindola 2a09d65979 Revert 131172 as it is causing clang to miscompile itself. I will try
to provide a reduced testcase.

llvm-svn: 131176
2011-05-11 03:27:17 +00:00
Evan Cheng 05fc35e275 Add a late optimization to BranchFolding that hoist common instruction sequences
at the start of basic blocks to their common predecessor. It's actually quite
common (e.g. about 50 times in JM/lencod) and has shown to be a nice code size
benefit. e.g.

        pushq   %rax
        testl   %edi, %edi
        jne     LBB0_2
## BB#1:
        xorb    %al, %al
        popq    %rdx
        ret
LBB0_2:
        xorb    %al, %al
        callq   _foo
        popq    %rdx
        ret

=>

        pushq   %rax
        xorb    %al, %al
        testl   %edi, %edi
        je      LBB0_2
## BB#1:
        callq   _foo
LBB0_2:
        popq    %rdx
        ret

rdar://9145558

llvm-svn: 131172
2011-05-11 01:03:01 +00:00
Bill Wendling c14d7322ee Branch folding is folding a landing pad into a regular BB.
An exception is thrown via a call to _cxa_throw, which we don't expect to
return. Therefore, the "true" part of the invoke goes to a BB that has
'unreachable' as its only instruction. This is lowered into an empty MachineBB.
The landing pad for this invoke, however, is directly after the "true" MBB.
When the empty MBB is removed, the landing pad is directly below the BB with the
invoke call. The unconditional branch is removed and then the two blocks are
merged together.

The testcase is too big for a regression test.
<rdar://problem/9305728>

llvm-svn: 129965
2011-04-22 01:07:09 +00:00
Evan Cheng b8ed462ca2 Add more debugging output.
llvm-svn: 126158
2011-02-21 23:39:48 +00:00
Owen Anderson a7aed18624 Reapply r110396, with fixes to appease the Linux buildbot gods.
llvm-svn: 110460
2010-08-06 18:33:48 +00:00
Owen Anderson bda59bd247 Revert r110396 to fix buildbots.
llvm-svn: 110410
2010-08-06 00:23:35 +00:00
Owen Anderson 755aceb5d0 Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier.  Clean up APIs related to this change.

llvm-svn: 110396
2010-08-05 23:42:04 +00:00
Evan Cheng 37bb617f8a Tail merging pass shall not break up IT blocks. rdar://8115404
llvm-svn: 106517
2010-06-22 01:18:16 +00:00
Evan Cheng 2d51c7c592 Allow ARM if-converter to be run after post allocation scheduling.
- This fixed a number of bugs in if-converter, tail merging, and post-allocation
  scheduler. If-converter now runs branch folding / tail merging first to
  maximize if-conversion opportunities.
- Also changed the t2IT instruction slightly. It now defines the ITSTATE
  register which is read by instructions in the IT block.
- Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't
  change the instruction ordering in the IT block (since IT mask has been
  finalized). It also ensures no other instructions can be scheduled between
  instructions in the IT block.

This is not yet enabled.

llvm-svn: 106344
2010-06-18 23:09:54 +00:00
Stuart Hastings 0125b6410a Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.

This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.

llvm-svn: 106243
2010-06-17 22:43:56 +00:00
Dan Gohman 2ad68de4aa Fix a bug which prevented tail merging of return instructions in
beneficial cases. See the changes in test/CodeGen/X86/tail-opts.ll and
test/CodeGen/ARM/ifcvt2.ll for details.

The fix is to change HashEndOfMBB to hash at most one instruction,
instead of trying to apply heuristics about when it will be profitable to
consider more than one instruction. The regular tail-merging heuristics
are already prepared to handle the same cases, and they're more precise.

Also, make test/CodeGen/ARM/ifcvt5.ll and
test/CodeGen/Thumb2/thumb2-branch.ll slightly more complex so that they
continue to test what they're intended to test.

And, this eliminates the problem in
test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll, the testcase from
PR5204. Update it accordingly.

llvm-svn: 102907
2010-05-03 14:35:47 +00:00
Dale Johannesen 4244d12769 Teach AnalyzeBranch, RemoveBranch and the branch
folder to be tolerant of debug info following the
branch(es) at the end of a block.

llvm-svn: 100168
2010-04-02 01:38:09 +00:00
Bob Wilson bc5af98f42 Stop trying to merge identical jump tables. This had been inadvertently
disabled for several months (since svn r88806) and no one noticed.  My fix
for pr6543 yesterday reenabled it, but broke the ARM port's code for using
TBB/TBH.  Rather than adding a target hook to disable merging for Thumb2 only,
I'm just taking this out.  It is not common to have identical jump tables,
the code we used to merge them was O(N^2), and it only helps code size, not
performance.

llvm-svn: 98977
2010-03-19 19:05:41 +00:00
Bob Wilson 572a194c35 Remove a check that can no longer be true, after r84803.
llvm-svn: 98694
2010-03-16 23:40:32 +00:00
Chris Lattner 07293da97e eliminate InvalidateLabel and LabelIDList from MMI and replace
them with a counter.

llvm-svn: 98462
2010-03-14 02:24:55 +00:00
Dale Johannesen e9b361b2e6 Fix another place where DEBUG_VALUE affected codegen.
llvm-svn: 98181
2010-03-10 19:57:56 +00:00
Dale Johannesen 5ebe0c1e13 This survived a bootstrap, so let's try 98104 again.
llvm-svn: 98137
2010-03-10 05:45:47 +00:00
Dale Johannesen bf9a4ad1ce Speculatively revert 98104; could be what's causing crashes
llvm-svn: 98108
2010-03-10 00:11:34 +00:00
Dale Johannesen d32ab20b71 Ever more complicated DEBUG_VALUE fixes for branch folding.
llvm-svn: 98104
2010-03-09 23:52:37 +00:00
Dale Johannesen 0eebdbb325 Fix dbg value handling in tail merging.
llvm-svn: 97938
2010-03-08 05:38:13 +00:00
Dale Johannesen 2061c84109 Fix some more places where dbg_value affected codegen.
llvm-svn: 97765
2010-03-05 00:02:59 +00:00
Chris Lattner b06015aa69 move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687
2010-02-09 19:54:29 +00:00
Chris Lattner b6db2c6b31 Rearrange handling of jump tables. Highlights:
1. MachineJumpTableInfo is now created lazily for a function the first time
   it actually makes a jump table instead of for every function.
2. The encoding of jump table entries is now described by the
   MachineJumpTableInfo::JTEntryKind enum.  This enum is determined by the
   TLI::getJumpTableEncoding() hook, instead of by lots of code scattered
   throughout the compiler that "knows" that jump table entries are always
   32-bits in pic mode (for example).
3. The size and alignment of jump table entries is now calculated based on
   their kind, instead of at machinefunction creation time.

Future work includes using the EntryKind in more places in the compiler,
eliminating other logic that "knows" the layout of jump tables in various
situations.

llvm-svn: 94470
2010-01-25 23:26:13 +00:00
David Greene d60abbf7f2 Change errs() to dbgs().
llvm-svn: 92097
2009-12-24 00:34:21 +00:00
Bill Wendling 3766491eee Initialize uninitialized variables.
llvm-svn: 91477
2009-12-16 00:01:27 +00:00
Bill Wendling 776ef4dd32 Initialize uninitialized variables.
llvm-svn: 91475
2009-12-16 00:00:18 +00:00
Bill Wendling e8a525a196 Revert these. They may have been causing 483_xalancbmk to fail:
$ svn merge -c -91161 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r91161 into '.':
U    lib/CodeGen/BranchFolding.cpp
U    lib/CodeGen/MachineBasicBlock.cpp
$ svn merge -c -91113 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r91113 into '.':
G    lib/CodeGen/MachineBasicBlock.cpp
$ svn merge -c -91101 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r91101 into '.':
U    include/llvm/CodeGen/MachineBasicBlock.h
G    lib/CodeGen/MachineBasicBlock.cpp
$ svn merge -c -91092 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r91092 into '.':
G    include/llvm/CodeGen/MachineBasicBlock.h
G    lib/CodeGen/MachineBasicBlock.cpp

llvm-svn: 91376
2009-12-15 00:39:24 +00:00
Bill Wendling b87b9925be Don't try to move a MBB into the fall-through position if it's a landing pad or
branches only to a landing pad. Without this check, the compiler would go into
an infinite loop because the branch to a landing pad is an "abnormal" edge which
wasn't being taken into account.

This is the meat of that fix:

  if (!PrevBB.canFallThrough() && !MBB->BranchesToLandingPad(MBB)) {

The other stuff is simplification of the "branches to a landing pad" code.

llvm-svn: 91161
2009-12-11 21:47:36 +00:00
Dan Gohman 047a767d74 Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.

llvm-svn: 90634
2009-12-05 00:44:40 +00:00
Chris Lattner a48f44d9ee improve portability to avoid conflicting with std::next in c++'0x.
Patch by Howard Hinnant!

llvm-svn: 90365
2009-12-03 00:50:42 +00:00
Bob Wilson 2d4ff12da9 Split tail duplication into a separate pass. This is needed to avoid
running tail duplication when doing branch folding for if-conversion, and
we also want to be able to run tail duplication earlier to fix some
reg alloc problems.  Move the CanFallThrough function from BranchFolding
to MachineBasicBlock so that it can be shared by TailDuplication.

llvm-svn: 89904
2009-11-26 00:32:21 +00:00
Bob Wilson d4d40670e8 Refactor target hook for tail duplication as requested by Chris.
Make tail duplication of indirect branches much more aggressive (for targets
that indicate that it is profitable), based on further experience with
this transformation.  I compiled 3 large applications with and without
this more aggressive tail duplication and measured minimal changes in code
size.  ("size" on Darwin seems to round the text size up to the nearest
page boundary, so I can only say that any code size increase was less than
one 4k page.) Radar 7421267.

llvm-svn: 89814
2009-11-24 23:35:49 +00:00
Bob Wilson b3c5aa20ea There should be no need to keep renumbering blocks during tail duplication.
llvm-svn: 89275
2009-11-18 23:48:57 +00:00
Bob Wilson 108aadf972 Tail duplication still needs to iterate. Duplicating new instructions onto
the tail of a block may make that block a new candidate for duplication.

llvm-svn: 89264
2009-11-18 22:52:37 +00:00
Bob Wilson 5d87f7d5f8 Add another statistic to measure code size due to tail duplication.
llvm-svn: 89254
2009-11-18 22:12:31 +00:00
Bob Wilson 8984e6ec8c Add statistics for tail duplication.
llvm-svn: 89225
2009-11-18 19:29:37 +00:00
Bob Wilson 290e9a47a9 Add a target hook to allow changing the tail duplication limit based on the
contents of the block to be duplicated.  Use this for ARM Cortex A8/9 to
be more aggressive tail duplicating indirect branches, since it makes it
much more likely that they will be predicted in the branch target buffer.
Testcase coming soon.

llvm-svn: 89187
2009-11-18 03:34:27 +00:00
Bob Wilson eeac7ce769 Remove a special case for tail merging that seems to be both broken and
unnecessary.  It is broken because the "isIdenticalTo" check should be
negated.  If that is fixed, this code causes the CodeGen/X86/tail-opts.ll
test to fail, in the dont_merge_oddly function.  And, I confirmed that the
regression is real -- the generated code is worse.  As far as I can tell,
that tail-opts.ll test is checking for what this code is supposed to handle
and we're doing the right thing anyway.

llvm-svn: 89121
2009-11-17 18:30:09 +00:00
Dan Gohman 2650723d81 Set MadeChange instead of MadeChangeThisIteration.
llvm-svn: 89114
2009-11-17 18:04:15 +00:00
Bob Wilson 724d8a45c1 Update a comment, now that tail duplication happens after other branch
folding optimizations.

llvm-svn: 89109
2009-11-17 17:40:31 +00:00
Bob Wilson bd22f1965d Perform tail duplication only once, after tail merging is complete.
It was too difficult to keep the heuristics for merging and duplication
consistent.

llvm-svn: 89105
2009-11-17 17:06:18 +00:00
Bob Wilson 44724c4122 Fix a comment.
llvm-svn: 88940
2009-11-16 19:33:27 +00:00
Bob Wilson 1a8ea98b76 Fix some comments.
llvm-svn: 88932
2009-11-16 18:54:08 +00:00
Bob Wilson 3794ec2519 Whitespace: be consistent with pointer syntax.
llvm-svn: 88929
2009-11-16 18:08:46 +00:00
Bob Wilson 699f5b9a0a Clean up whitespace.
llvm-svn: 88927
2009-11-16 17:56:13 +00:00
Dan Gohman 225fa59cac When optimizing for size, don't tail-merge unless it's likely to be a
code-size win, and not when it's only likely to be code-size neutral,
such as when only a single instruction would be eliminated and a new
branch would be required.

This fixes rdar://7392894.

llvm-svn: 88692
2009-11-13 21:02:15 +00:00
Dan Gohman a9b40a6eb4 Make the BranchFolderPass class local to BranchFolding.cpp.
llvm-svn: 86928
2009-11-12 01:59:26 +00:00
Dan Gohman b3bf49f67e Minor code cleanups.
llvm-svn: 86926
2009-11-12 01:51:28 +00:00
Dan Gohman 09478e975d Tail merge at any size when there are two potentials blocks and one
can be made to fall through into the other.

llvm-svn: 86909
2009-11-12 00:39:10 +00:00
Dan Gohman 02b155427e Promote MergePotentialsElt and SameTailElt to be regular classes
instead of typedefs for std::pair. This simplifies the type of
SameTails, which previously was std::vector<std::pair<std::vector<std::pair<unsigned, MachineBasicBlock *> >::iterator, MachineBasicBlock::iterator>

llvm-svn: 86885
2009-11-11 21:57:02 +00:00
Dan Gohman 71782d59c7 Revert this line of 86871.
llvm-svn: 86875
2009-11-11 19:56:05 +00:00
Dan Gohman 64b5d0f468 Add support for tail duplication to BranchFolding, and extend
tail merging support to handle more cases.
 - Recognize several cases where tail merging is beneficial even when
   the tail size is smaller than the generic threshold.
 - Make use of MachineInstrDesc::isBarrier to help detect
   non-fallthrough blocks.
 - Check for and avoid disrupting fall-through edges in more cases.

llvm-svn: 86871
2009-11-11 19:48:59 +00:00
Dan Gohman 16cfb9106e Fix indentation level.
llvm-svn: 86856
2009-11-11 18:42:28 +00:00
Dan Gohman c86b5a15f5 Whitespace cleanups.
llvm-svn: 86855
2009-11-11 18:38:14 +00:00
Dan Gohman 84bb28fc84 Prefix MBB numbers with "BB#" in debug output to make it clear what
the numbers mean.

llvm-svn: 86854
2009-11-11 18:23:17 +00:00
Dan Gohman f4141f1dda Minor code simplification.
llvm-svn: 86853
2009-11-11 18:18:34 +00:00
Dan Gohman 42cc1806d8 Remove an unused variable.
llvm-svn: 86642
2009-11-10 01:37:57 +00:00
Dan Gohman 48079d4bf5 Minor code simplification.
llvm-svn: 86641
2009-11-10 01:36:20 +00:00
Bob Wilson 53a31ad3c1 Fix branch folding bug for indirect branches: for a block containing only
an unconditional branch (possibly from tail merging), this code is
trying to redirect all of its predecessors to go directly to the branch
target, but that isn't feasible for indirect branches.  The other
predecessors (that don't end with indirect branches) could theoretically
still be handled, but that is not easily done right now.

The AnalyzeBranch interface doesn't currently let us distinguish jump table
branches from indirect branches, and this code is currently handling
jump tables.  To avoid punting on address-taken blocks, we would have to give
up handling jump tables.  That seems like a bad tradeoff.

llvm-svn: 85975
2009-11-03 23:44:31 +00:00
Dan Gohman 64997909a6 Don't delete blocks which have their address taken.
llvm-svn: 85572
2009-10-30 02:13:27 +00:00
Bob Wilson 94f8f87890 Refactor complicated predicate into a separate function.
llvm-svn: 85519
2009-10-29 18:40:06 +00:00
Bob Wilson 3ab552ec74 Reimplement BranchFolding change to avoid tail merging for a 1 instruction
common tail, except when the OptimizeForSize function attribute is present.
Radar 7338114.

llvm-svn: 85441
2009-10-28 22:10:20 +00:00
Bob Wilson 97b9312663 Revert r85346 change to control tail merging by CodeGenOpt::Level.
I'm going to redo this using the OptimizeForSize function attribute.

llvm-svn: 85426
2009-10-28 20:46:46 +00:00
Bob Wilson 9693f9d465 Record CodeGen optimization level in the BranchFolding pass so that we can
use it to control tail merging when there is a tradeoff between performance
and code size.  When there is only 1 instruction in the common tail, we have
been merging.  That can be good for code size but is a definite loss for
performance.  Now we will avoid tail merging in that case when the
optimization level is "Aggressive", i.e., "-O3".  Radar 7338114.

Since the IfConversion pass invokes BranchFolding, it too needs to know
the optimization level.  Note that I removed the RegisterPass instantiation
for IfConversion because it required a default constructor.  If someone
wants to keep that for some reason, we can add a default constructor with
a hard-wired optimization level.

llvm-svn: 85346
2009-10-27 23:49:38 +00:00
Dan Gohman ff97acd8f1 Revert the main portion of r31856. It was causing BranchFolding
to break up CFG diamonds by banishing one of the blocks to the end of
the function, which is bad for code density and branch size.

This does pessimize MultiSource/Benchmarks/Ptrdist/yacr2, the
benchmark cited as the reason for the change, however I've examined
the code and it looks more like a case of gaming a particular
branch than of being generally applicable.

llvm-svn: 84803
2009-10-22 00:03:58 +00:00
Evan Cheng 3d2fce01aa Run branch folding if if-converter make some transformations.
llvm-svn: 80994
2009-09-04 07:47:40 +00:00
Evan Cheng 1f6e5eb07b Funky indentation.
llvm-svn: 80971
2009-09-03 23:54:22 +00:00
Bill Wendling c3f05e854a Convert DOUT to DEBUG(errs()...).
llvm-svn: 79747
2009-08-22 20:03:00 +00:00
Dan Gohman a41fa35992 Make tail merging handle blocks with repeated predecessors correctly, and
remove RemoveDuplicateSuccessor, as it is no longer necessary, and because
it breaks assumptions made in
MachineBasicBlock::isOnlyReachableByFallthrough.

Convert test/CodeGen/X86/omit-label.ll to FileCheck and add a testcase
for PR4732.

test/CodeGen/Thumb2/thumb2-ifcvt2.ll sees a diff with this commit due to
it being bugpoint-reduced to the point where it doesn't matter what the
condition for the branch is.

Add some more interesting code to
test/CodeGen/X86/2009-08-06-branchfolder-crash.ll, which is the testcase
that originally motivated the RemoveDuplicateSuccessor code, to help
verify that the original problem isn't being re-broken.

llvm-svn: 79338
2009-08-18 15:18:18 +00:00
Dale Johannesen fe95ac0d35 Rewrite previous patch to follow Chris' stylistic
preference; no functional change.

llvm-svn: 78391
2009-08-07 17:41:29 +00:00
Dale Johannesen 15a5fad94b Fix PR 4626, a crash in branch folding after OptimizeBlock
produced a CFG it wasn't prepared for.

llvm-svn: 78351
2009-08-06 22:56:40 +00:00
Torok Edwin fbcc663cbf llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").

llvm-svn: 75640
2009-07-14 16:55:14 +00:00
Torok Edwin 56d0659726 assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.

llvm-svn: 75379
2009-07-11 20:10:48 +00:00
Dale Johannesen b571463363 Fix PR4188. TailMerging can't tolerate inexact
sucessor info.

llvm-svn: 71478
2009-05-11 21:54:13 +00:00
Evan Cheng 64dfcacd5f Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.

llvm-svn: 64124
2009-02-09 07:14:22 +00:00
Duncan Sands 5a913d61e3 Rename getAnalysisToUpdate to getAnalysisIfAvailable.
llvm-svn: 63198
2009-01-28 13:14:17 +00:00
Dan Gohman f87dc9264a Delete unnecessary parens around return values.
llvm-svn: 61950
2009-01-08 22:19:34 +00:00
Bill Wendling d8681df4e7 Add a newline after this debug output.
llvm-svn: 60861
2008-12-10 23:24:43 +00:00
Dan Gohman ae3ba45eb2 Add a sanity-check to tablegen to catch the case where isSimpleLoad
is set but mayLoad is not set. Fix all the problems this turned up.

Change code to not use isSimpleLoad instead of mayLoad unless it
really wants isSimpleLoad.

llvm-svn: 60459
2008-12-03 02:30:17 +00:00
Dale Johannesen 1d7e42c8fe Increase default setting of tail-merge-threshold to
150, based on llvm-test measurements.

llvm-svn: 58225
2008-10-27 02:10:21 +00:00
Dan Gohman 0d1e9a8e04 Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006
2008-10-03 15:45:36 +00:00
Evan Cheng 168f8f3916 Mark several codegen passes as preserving all analysis.
llvm-svn: 56469
2008-09-22 20:58:04 +00:00
Dan Gohman 38453eebdc Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189
2008-09-13 17:58:21 +00:00
Dan Gohman a79db30d28 Tidy up several unbeseeming casts from pointer to intptr_t.
llvm-svn: 55779
2008-09-04 17:05:41 +00:00
Dan Gohman 14714cb4fa Fix SmallVector's size calculation so that a size of 0 is
handled correctly, and change a few SmallVector uses to use
size 0 to more clearly reflect their intent.

llvm-svn: 55181
2008-08-22 16:07:55 +00:00
Owen Anderson 4f6bf04616 Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API.
llvm-svn: 54802
2008-08-14 22:49:33 +00:00
Duncan Sands fa4120530e Fix PR2609. If a label is deleted, then it needs
to be marked invalid regardless of whether it is
a debug, an exception handling or (hopefully) a
GC label.

llvm-svn: 54172
2008-07-29 20:56:02 +00:00
Dan Gohman 3b46030375 Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212
2008-07-07 23:14:23 +00:00
Dale Johannesen ad6b3a6ed2 Fix longstanding thinko: don't exclude
predessors of exit blocks from tail merging
consideration.

llvm-svn: 52985
2008-07-01 21:50:14 +00:00
Dan Gohman fb19f9402b Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.

llvm-svn: 52943
2008-07-01 00:05:16 +00:00
Dan Gohman 6f880690b8 Use the transferSuccessors helper function.
llvm-svn: 52495
2008-06-19 17:22:29 +00:00
Dale Johannesen b28a17c346 Rewrite a loop to avoid using iterators pointing to
elements that have been erased.  Based on a patch
by Nicolas Capens.

llvm-svn: 51485
2008-05-23 17:19:02 +00:00
Dan Gohman d78c400b5b Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017
2008-05-13 00:00:25 +00:00
Dale Johannesen 9d29283fc7 Be more aggressive about tail-merging small blocks
if those blocks consist entirely of common instructions;
merging will not add an extra branch in this case.

llvm-svn: 51006
2008-05-12 22:53:12 +00:00
Dale Johannesen c4c4d8e1f7 Further rework of tail merge algorithm. Not quite
semantically identical, but little difference in
either results or execution speed; but it's much
easier to read, at least IMO.

llvm-svn: 50999
2008-05-12 20:33:57 +00:00
Dale Johannesen 66da8b5334 Remove an evil vector bool. Cosmetic refactoring,
no functional change.

llvm-svn: 50921
2008-05-09 23:28:24 +00:00
Dale Johannesen cff7df201c Rewrite tail merging algorithm to handle the
case where there are multiple blocks with a large
number of common tail instructions more efficiently
(compile time optimization).

llvm-svn: 50916
2008-05-09 21:24:35 +00:00
Dan Gohman 6a2da37c0e Make several variable declarations static.
llvm-svn: 50696
2008-05-06 01:53:16 +00:00
Evan Cheng 9d339849ee Teach branch folding pass about implicit_def instructions. Unfortunately we can't just eliminate them since register scavenger expects every register use to be defined. However, we can delete them when there are no intra-block uses. Carefully removing some implicit def's which enable more blocks to be optimized away.
llvm-svn: 49461
2008-04-10 02:32:10 +00:00
Evan Cheng c799065cc3 Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
llvm-svn: 47703
2008-02-28 00:43:03 +00:00
Evan Cheng 3266ff9a6f PR1909: Tail merging pass ran wild. It makes no sense to merge blocks in order to save a single instruction since a branch will be inserted for each BB.
llvm-svn: 47301
2008-02-19 02:09:37 +00:00
Dan Gohman 3a4be0fdef Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
2008-02-10 18:45:23 +00:00