Commit Graph

186 Commits

Author SHA1 Message Date
Dan Gohman d7b5ce3312 Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
 - Eschew ST0 and ST1 for return values.
 - Fix the PIC base register initialization so that it doesn't ever
   fail to end up the top of the entry block.

llvm-svn: 108039
2010-07-10 09:00:22 +00:00
Bob Wilson 6586e9b203 --- Reverse-merging r107947 into '.':
U    utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U    test/CodeGen/X86/fast-isel.ll
U    test/CodeGen/X86/fast-isel-loads.ll
U    include/llvm/Target/TargetLowering.h
U    include/llvm/Support/PassNameParser.h
U    include/llvm/CodeGen/FunctionLoweringInfo.h
U    include/llvm/CodeGen/CallingConvLower.h
U    include/llvm/CodeGen/FastISel.h
U    include/llvm/CodeGen/SelectionDAGISel.h
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/CallingConvLower.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U    lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U    lib/CodeGen/SelectionDAG/FastISel.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U    lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U    lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U    lib/CodeGen/SelectionDAG/TargetLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.h
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86FastISel.cpp
U    lib/Target/X86/X86ISelLowering.h

llvm-svn: 107987
2010-07-09 16:37:18 +00:00
Dan Gohman 0b5aa1cdd3 Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting
a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL.

llvm-svn: 107943
2010-07-09 00:39:23 +00:00
Dan Gohman e75704369d Revert 107840 107839 107813 107804 107800 107797 107791.
Debug info intrinsics win for now.

llvm-svn: 107850
2010-07-08 01:00:56 +00:00
Dan Gohman e7ccc51cc1 Implement bottom-up fast-isel. This has the advantage of not requiring
a separate DCE pass over MachineInstrs.

llvm-svn: 107804
2010-07-07 19:20:32 +00:00
Dan Gohman d2965c10a1 Temporarily disable on-demand fast-isel.
llvm-svn: 107393
2010-07-01 12:15:30 +00:00
Dan Gohman 4d29fd85f9 Fast isel no longer needs DeadMachineInstrElim to clean up after it.
llvm-svn: 107381
2010-07-01 03:49:59 +00:00
Dan Gohman 5f0bf64c0c Add some comments.
llvm-svn: 106809
2010-06-24 23:41:59 +00:00
Jakob Stoklund Olesen b613ae2c89 Add a -regalloc=default option that chooses a register allocator based on the -O
optimization level.

This only really affects llc for now because both the llvm-gcc and clang front
ends override the default register allocator. I intend to remove that code later.

llvm-svn: 104904
2010-05-27 23:57:25 +00:00
Daniel Dunbar b33dfbcba4 MC: Add TargetMachine support for setting the value of MCRelaxAll with
-filetype=obj.

llvm-svn: 104747
2010-05-26 21:48:55 +00:00
Daniel Dunbar 3ff1a06de6 MC: Add an MCLoggingStreamer, for use in debugging integrated-as mismatches.
llvm-svn: 104463
2010-05-23 17:44:06 +00:00
Daniel Dunbar 62bc96a1a5 llc (et al): Add support for --show-encoding and --show-inst.
llvm-svn: 104029
2010-05-18 17:22:19 +00:00
Daniel Dunbar 148e876ac2 XFAIL the test I added with vg_leak, apparently it is the first and only llc
-filetype=obj test, and -filetype=obj leaks a few objects. Added a FIXME, we
need to sort out the ownership model for the various MC objects.

llvm-svn: 103769
2010-05-14 07:47:51 +00:00
Dan Gohman c334960f16 Code that needs a TargetMachine should have access to one directly, rather
than just getting one through a TargetLowering.

llvm-svn: 101802
2010-04-19 19:05:59 +00:00
Evan Cheng 4f3aba431e Fix codegen passes. -disable-ssc shouldn't disable postra machine licm.
llvm-svn: 101622
2010-04-17 06:47:47 +00:00
Evan Cheng 250283916d Enable post regalloc machine licm by default.
llvm-svn: 101023
2010-04-12 06:25:28 +00:00
Anton Korobeynikov 6e01726eae Remove late ARM codegen optimization pass committed by accident.
It is not ready for public yet.

llvm-svn: 100673
2010-04-07 18:23:27 +00:00
Anton Korobeynikov fed8ee7dfc Add hook to insert late LLVM=>LLVM passes just before isel
llvm-svn: 100640
2010-04-07 18:18:42 +00:00
Evan Cheng 6ea5949a93 Post regalloc LICM. Work in progress.
llvm-svn: 100592
2010-04-07 00:41:17 +00:00
Chris Lattner d20699bc87 Momentous day: remove the "O" member from AsmPrinter. Now all
"asm printering" happens through MCStreamer.  This also 
Streamerizes PIC16 debug info, which escaped my attention.

This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.

llvm-svn: 100327
2010-04-04 08:18:47 +00:00
Chris Lattner 7012916275 fix an ugly wart in the MCInstPrinter api where the
raw_ostream to print an instruction to had to be specified
at MCInstPrinter construction time instead of being able
to pick at each call to printInstruction.

llvm-svn: 100307
2010-04-04 05:04:31 +00:00
Chris Lattner e468f88b26 rearrange MCContext ownership. Before LLVMTargetMachine created it
and passing off ownership to AsmPrinter.  Now MachineModuleInfo
creates it and owns it by value.  This allows us to use MCSymbols
more consistently throughout the rest of the code generator, and
simplifies a bit of code.  This also allows MachineFunction to 
keep an MCContext reference handy, and cleans up the TargetRegistry
interfaces for AsmPrinters.

llvm-svn: 98450
2010-03-13 20:55:24 +00:00
Chris Lattner 2eff505fba make the mangler take an MCContext instead of an MAI.
No functionality change.

llvm-svn: 98363
2010-03-12 18:44:54 +00:00
Chris Lattner ac77bf5d1e remove MAI argument from createAsmStreamer since it
can get it from the context now.

llvm-svn: 98361
2010-03-12 18:28:53 +00:00
Chris Lattner 768ea2add2 change MCContext to always have an MCAsmInfo.
llvm-svn: 98293
2010-03-11 22:53:35 +00:00
Daniel Dunbar c5ddbad237 MC: Provide MCAssembler with a TargetAsmBackend.
llvm-svn: 98222
2010-03-11 01:34:27 +00:00
Evan Cheng 80ad113731 Enable machine cse pass.
llvm-svn: 98132
2010-03-10 03:07:41 +00:00
Evan Cheng 251787686b Revert accidental commit.
llvm-svn: 98045
2010-03-09 04:04:38 +00:00
Evan Cheng 19e44b4510 - Make the machine cse dumb coalescer (as opposed to the more awesome simple
coalescer) handle sub-register classes.
- Add heuristics to avoid non-profitable cse. Given the current lack of live
  range splitting, avoid cse when an expression has PHI use and the would be
  new use is in a BB where the expression wasn't already being used.

llvm-svn: 98043
2010-03-09 03:21:12 +00:00
Jakob Stoklund Olesen 8c5b8db5cd We don't really care about correct register liveness information after the
post-ra scheduler has run. Disable the verifier checks that late in the game.

llvm-svn: 97837
2010-03-05 21:49:13 +00:00
Evan Cheng a325e562ee Run machine licm before machine cse to avoid messing up licm opportunities.
llvm-svn: 97752
2010-03-04 21:28:09 +00:00
Evan Cheng c58aea0086 Rename -machine-cse to -enable-machine-cse.
llvm-svn: 97713
2010-03-04 02:08:04 +00:00
Evan Cheng 68dabc7058 Add an option to enable machine cse (it's not doing anything yet.
llvm-svn: 97627
2010-03-03 01:38:35 +00:00
Dan Gohman 0d8a9af7b8 Add a flag to addPassesToEmit* to disable the Verifier pass run
after LSR, so that clients can opt in.

llvm-svn: 97357
2010-02-28 00:41:59 +00:00
Bob Wilson d4655991c3 Remove unused "NoPRE" parameter in GVN and createGVNPass().
llvm-svn: 97235
2010-02-26 18:35:19 +00:00
Bob Wilson 01abf8fc2f Besides removing phi cycles that reduce to a single value, also remove dead
phi cycles.  Adjust a few tests to keep dead instructions from being optimized
away.  This (together with my previous change for phi cycles) fixes Apple
radar 7627077.

llvm-svn: 96057
2010-02-13 00:31:44 +00:00
Chris Lattner 741580a5bd give MCCodeEmitters access to the current MCContext.
llvm-svn: 96038
2010-02-12 23:12:47 +00:00
Dan Gohman 45774ce0ad Reapply the new LoopStrengthReduction code, with compile time and
bug fixes, and with improved heuristics for analyzing foreign-loop
addrecs.

This change also flattens IVUsers, eliminating the stride-oriented
groupings, which makes it easier to work with.

llvm-svn: 95975
2010-02-12 10:34:29 +00:00
Bob Wilson 0827e040e0 Add a new pass on machine instructions to optimize away PHI cycles that
reduce down to a single value.  InstCombine already does this transformation
but DAG legalization may introduce new opportunities.  This has turned out to
be important for ARM where 64-bit values are split up during type legalization:
InstCombine is not able to remove the PHI cycles on the 64-bit values but
the separate 32-bit values can be optimized.  I measured the compile time 
impact of this (running llc on 176.gcc) and it was not significant.

llvm-svn: 95951
2010-02-12 01:30:21 +00:00
Evan Cheng ea5c6be766 Run codegen dce pass for all targets at all optimization levels. Previously it's
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.

llvm-svn: 95493
2010-02-06 09:07:11 +00:00
Chris Lattner edcf065a29 change addPassesToEmitFile to return true on failure instead of its input,
add -filetype=null for performance testing and remove -filetype=dynlib,
which isn't planned to be implemented.

llvm-svn: 95202
2010-02-03 05:55:08 +00:00
Chris Lattner 249453fff0 pass an instprinter into the AsmPrinter if it is available.
llvm-svn: 95168
2010-02-03 00:29:55 +00:00
Chris Lattner d111bd518d make any use of the "O" stream in asmprinter print to
stderr if in filetype=obj mode.  This is a hack, and will
live until dwarf emission and other random stuff that is
not yet going through MCStreamer is upgraded.  It only
impacts filetype=obj mode.

llvm-svn: 95166
2010-02-03 00:22:02 +00:00
Chris Lattner 8856a67e41 Hook up -filetype=obj through the MachO streamer. Here's a demo:
$ cat t.ll 
@g = global i32 42
$ llc t.ll -o t.o -filetype=obj
$ nm t.o
00000000 D _g

There is still a ton of work left.  Instructions are not being encoded
yet apparently.

llvm-svn: 95162
2010-02-02 23:57:42 +00:00
Chris Lattner c49f8c7456 use OwningPtr and factor code better.
llvm-svn: 95156
2010-02-02 23:45:17 +00:00
Chris Lattner b0d44c3807 refactor code so that LLVMTargetMachine creates the asmstreamer and
mccontext instead of having AsmPrinter do it.  This allows other 
types of MCStreamer's to be passed in.

llvm-svn: 95155
2010-02-02 23:37:42 +00:00
Chris Lattner 530c72a65d simplify getVerboseAsm
llvm-svn: 95153
2010-02-02 22:58:13 +00:00
Chris Lattner 32445d300f move handling of asm-verbose out of AsmPrinter.cpp into LLVMTargetMachine.cpp with the rest of the command line options.
llvm-svn: 95152
2010-02-02 22:54:51 +00:00
Chris Lattner 919b97436e Remove a bunch of stuff around the edges of the ELF writer.
Now the only use of the ELF writer is the JIT, which won't be
easy to fix in the short term. :( :(

llvm-svn: 95148
2010-02-02 22:31:11 +00:00
Chris Lattner f0cb12acf2 eliminate FileModel::Model, just use CodeGenFileType. The client
of the code generator shouldn't care what object format a target
uses.

llvm-svn: 95124
2010-02-02 21:06:45 +00:00