Commit Graph

191902 Commits

Author SHA1 Message Date
Michael Kuperstein bd57186c76 [X86] Convert esp-relative movs of function arguments to pushes, step 2
This moves the transformation introduced in r223757 into a separate MI pass.
This allows it to cover many more cases (not only cases where there must be a 
reserved call frame), and perform rudimentary call folding. It still doesn't 
have a heuristic, so it is enabled only for optsize/minsize, with stack 
alignment <= 8, where it ought to be a fairly clear win.

Differential Revision: http://reviews.llvm.org/D6789

llvm-svn: 227728
2015-02-01 11:44:44 +00:00
Chandler Carruth af3c256ffa [PM] Clean up a stale comment that came from a differnt pass when
I created this header.

llvm-svn: 227727
2015-02-01 11:35:56 +00:00
Chandler Carruth fdffd87d68 [PM] Port SimplifyCFG to the new pass manager.
This should be sufficient to replace the initial (minor) function pass
pipeline in Clang with the new pass manager. I'll probably add an (off
by default) flag to do that just to ensure we can get extra testing.

llvm-svn: 227726
2015-02-01 11:34:21 +00:00
Chandler Carruth e8c686aa86 [PM] Port EarlyCSE to the new pass manager.
I've added RUN lines both to the basic test for EarlyCSE and the
target-specific test, as this serves as a nice test that the TTI layer
in the new pass manager is in fact working well.

llvm-svn: 227725
2015-02-01 10:51:23 +00:00
Chandler Carruth 9f8d9b613c [PM] Teach the module-to-function adaptor to not run function passes
over declarations.

This is both quite unproductive and causes things to crash, for example
domtree would just assert.

I've added a declaration and a domtree run to the basic high-level tests
for the new pass manager.

llvm-svn: 227724
2015-02-01 10:47:25 +00:00
Chandler Carruth 9973aeede5 [PM] Switch to a ranged based for loop. NFC
llvm-svn: 227723
2015-02-01 10:40:21 +00:00
Craig Topper da97c20128 [X86] Add all intrinsics for scalar rsqrt28/rcp28 to avx512erintrin.h. Add parentheses around all macro arguments.
llvm-svn: 227722
2015-02-01 10:15:11 +00:00
Chandler Carruth e038552c8a [PM] Port TTI to the new pass manager, introducing a TargetIRAnalysis to
produce it.

This adds a function to the TargetMachine that produces this analysis
via a callback for each function. This in turn faves the way to produce
a *different* TTI per-function with the correct subtarget cached.

I've also done the necessary wiring in the opt tool to thread the target
machine down and make it available to the pass registry so that we can
construct this analysis from a target machine when available.

llvm-svn: 227721
2015-02-01 10:11:22 +00:00
Craig Topper 2844ca7319 [X86] Add a few target specific nodes to 'getTargetNodeName'
llvm-svn: 227720
2015-02-01 10:00:37 +00:00
Craig Topper c4b852a909 [X86] Flesh out more of the avx512erintrin.h file.
llvm-svn: 227719
2015-02-01 08:52:55 +00:00
Elena Demikhovsky 534a99d878 AVX2: Added 2 more tests for gather intrinsics.
llvm-svn: 227718
2015-02-01 08:52:15 +00:00
Michael Kuperstein a691f3e921 Removed assert that doesn't typecheck and breaks debug MSVC build.
llvm-svn: 227717
2015-02-01 08:46:20 +00:00
Craig Topper b01fc317c1 [X86] Use macros in AVX512ER header to allow ICE to be checked for immediate argument.
llvm-svn: 227716
2015-02-01 08:05:12 +00:00
Chandler Carruth 2dc92e90d8 [PM] Refactor the analysis registration and pass pipeline parsing to
live in a class.

While this isn't really significant right now, I need to expose some
state to the pass construction expressions, and making them get
evaluated within a class context is a nice way to collect members that
they may need to access.

llvm-svn: 227715
2015-02-01 07:40:05 +00:00
Craig Topper 3b079c5ed2 [X86] Convert some more const ints to ICE in AVX512 builtins.
llvm-svn: 227714
2015-02-01 07:35:43 +00:00
Craig Topper 67826a5883 [X86] Rename _mm512_valign_epi64/32 intrinsics to _mm512_alignr_epi64/32 to match Intel docs. Make immediate argument to them an ICE. Fix mask size for the alignd version.
llvm-svn: 227713
2015-02-01 07:35:40 +00:00
Craig Topper 72c7d51251 [X86] Change rounding parameter of all the AVX512 builtins to an ICE.
llvm-svn: 227712
2015-02-01 07:35:35 +00:00
Shankar Easwaran d6f73ac366 [test] Add test for section groups and deadstrip
This adds a test that deadstrip should preserve the section group even if there
is only one reference to a function in the group.

llvm-svn: 227711
2015-02-01 05:47:02 +00:00
Davide Italiano df1b821b59 Remove trailing whitespace introduced in r227709.
Reported by:	shankarke

llvm-svn: 227710
2015-02-01 05:27:01 +00:00
Davide Italiano cd84ed35bd [ELF] Don't compare an atom with itself in compareByPosition().
This caused some tests to fail on FreeBSD, and Mac OS X.
Some std::sort() implementations will check for strict-weak-ordering
by comparing with the same element, or will compare an element to
itself for 1-element sequence. Take care of this case. Thanks to
chandlerc for explaning that to me.

Reviewed by:	ruiu

llvm-svn: 227709
2015-02-01 05:06:45 +00:00
Davide Italiano 1ecdf4ad30 [ELF] Implement semantic action for ENTRY linker script command.
Reviewed by:	shankarke, ruiu

llvm-svn: 227708
2015-02-01 03:27:25 +00:00
Shankar Easwaran 0f011fdcdf [ELF] Set order of ctors/dtors section
llvm-svn: 227707
2015-02-01 03:21:57 +00:00
Shankar Easwaran 0a13acfa8b [ELF] got/got.plt sections are handled as typeGOT
The .got and .got.plt sections are already handled as typeGOT. There is no need
to handle these atoms whose contentType is typeData.

llvm-svn: 227706
2015-02-01 03:21:55 +00:00
Jingyue Wu 6c26bb63fe [SeparateConstOffsetFromGEP] skip optnone functions
llvm-svn: 227705
2015-02-01 02:34:41 +00:00
Jingyue Wu 6e091c8eab [SeparateConstOffsetFromGEP] set PreservesCFG flag
SeparateConstOffsetFromGEP does not change the shape of the control flow graph.

llvm-svn: 227704
2015-02-01 02:33:02 +00:00
Jingyue Wu 0220df0dfd [NVPTX] Emit .pragma "nounroll" for loops marked with nounroll
Summary:
CUDA driver can unroll loops when jit-compiling PTX. To prevent CUDA
driver from unrolling a loop marked with llvm.loop.unroll.disable is not
unrolled by CUDA driver, we need to emit .pragma "nounroll" at the
header of that loop.

This patch also extracts getting unroll metadata from loop ID metadata
into a shared helper function.

Test Plan: test/CodeGen/NVPTX/nounroll.ll

Reviewers: eliben, meheff, jholewinski

Reviewed By: jholewinski

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D7041

llvm-svn: 227703
2015-02-01 02:27:45 +00:00
Adrian Prantl 152ac396db Fix PR22393. When recursively replacing an aggregate with a smaller
aggregate or scalar, the debug info needs to refer to the absolute offset
(relative to the entire variable) instead of storing the offset inside
the smaller aggregate.

llvm-svn: 227702
2015-02-01 00:58:04 +00:00
Adrian Prantl 02d6f22c93 Add missing tags.
llvm-svn: 227701
2015-02-01 00:57:31 +00:00
NAKAMURA Takumi 7ae226dfaf [CMake] LLVMLTO requires Intrinsics.gen since r227685 introduced llvm/Analysis/TargetTransformInfo.h.
llvm-svn: 227700
2015-02-01 00:55:43 +00:00
NAKAMURA Takumi d75e020342 [CMake] LLVMTarget requires Intrinsics.gen since r227669 introduced llvm/Analysis/TargetTransformInfo.h.
llvm-svn: 227699
2015-02-01 00:55:32 +00:00
Chandler Carruth d8b3e9a420 [PM] Remove a bunch of stale TTI creation method declarations. I nuked
their definitions, but forgot to clean up all the declarations which are
in different files.

llvm-svn: 227698
2015-02-01 00:22:15 +00:00
Matt Arsenault 25f61a6f89 Fix typo
llvm-svn: 227697
2015-01-31 23:37:27 +00:00
Filipe Cabecinhas 01e77c2617 Fix a typo
We're not that much into metals.

llvm-svn: 227696
2015-01-31 23:25:54 +00:00
Filipe Cabecinhas f2a3aec5c7 Tweak behavior due to -fexceptions, in C++ mode, imply -fcxx-exceptions
Added test

llvm-svn: 227695
2015-01-31 23:05:51 +00:00
Rafael Auler 8251d741f4 Implement semantic action for SEARCH_DIR linker script command
This is needed, among others by the FreeBSD kernel linker script.

Patch by Davide Italiano!

Reviewers: ruiu, rafaelauler

Differential Revision: http://reviews.llvm.org/D7220

llvm-svn: 227694
2015-01-31 22:42:19 +00:00
Matt Arsenault 08ad328ae2 R600/SI: Only select cvt_flr/cvt_rpi with no NaNs.
These have different behavior from cvt_i32_f32 on NaN.

llvm-svn: 227693
2015-01-31 21:28:13 +00:00
Saleem Abdulrasool 3475dc358c X86: silence a GCC warning
GCC 4.9 gives the following warning:
  warning: enumeral and non-enumeral type in conditional expression
Cast the enumeral value to an integer within the ternary operation.  NFC.

llvm-svn: 227692
2015-01-31 17:56:11 +00:00
Diego Novillo 6253035c18 Remove unused variable.
Summary:
This variable is only used inside an assert. This breaks builds with
asserts disabled.

OK for trunk?

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7314

llvm-svn: 227691
2015-01-31 17:17:33 +00:00
Aaron Ballman a3bcd37c02 Removed a spurious semicolon; NFC
llvm-svn: 227690
2015-01-31 15:18:47 +00:00
Simon Pilgrim 43fbaada8e Removed SSE lane blend findCommutedOpIndices overrides. NFCI.
The default op indices frmo TargetInstrInfo::findCommutedOpIndices are being commuted so we don't need to do this.

llvm-svn: 227689
2015-01-31 15:16:30 +00:00
Simon Pilgrim 9c76b47469 [X86][SSE] Shuffle mask decode support for zero extend, scalar float/double moves and integer load instructions
This patch adds shuffle mask decodes for integer zero extends (pmovzx** and movq xmm,xmm) and scalar float/double loads/moves (movss/movsd).

Also adds shuffle mask decodes for integer loads (movd/movq).

Differential Revision: http://reviews.llvm.org/D7228

llvm-svn: 227688
2015-01-31 14:09:36 +00:00
Chandler Carruth aab5ec078e [PM] Update Clang for the new LLVM API in r227685 for managing the
TargetTransformInfo, and unify the code in a single place.

llvm-svn: 227686
2015-01-31 11:18:46 +00:00
Chandler Carruth 93dcdc47db [PM] Switch the TargetMachine interface from accepting a pass manager
base which it adds a single analysis pass to, to instead return the type
erased TargetTransformInfo object constructed for that TargetMachine.

This removes all of the pass variants for TTI. There is now a single TTI
*pass* in the Analysis layer. All of the Analysis <-> Target
communication is through the TTI's type erased interface itself. While
the diff is large here, it is nothing more that code motion to make
types available in a header file for use in a different source file
within each target.

I've tried to keep all the doxygen comments and file boilerplate in line
with this move, but let me know if I missed anything.

With this in place, the next step to making TTI work with the new pass
manager is to introduce a really simple new-style analysis that produces
a TTI object via a callback into this routine on the target machine.
Once we have that, we'll have the building blocks necessary to accept
a function argument as well.

llvm-svn: 227685
2015-01-31 11:17:59 +00:00
Kumar Sukhani 9559a5c05e [asan][mips] Fix MIPS64 Asan mapping
llvm-svn: 227684
2015-01-31 10:43:18 +00:00
Kumar Sukhani 14a4f24d2c [asan][mips] Fix MIPS64 Asan mapping
llvm-svn: 227683
2015-01-31 09:13:58 +00:00
Owen Anderson be2edf30e4 Replace another std::set in the core of CodeGenRegister, this time with sorted arrays.
The hot path through this region of code does lots of batch inserts into sets. By storing them as sorted arrays, we can defer the sorting to the end of the batch, which is dramatically more efficient. This reduces tblgen runtime by 25% on my worst-case target.

llvm-svn: 227682
2015-01-31 09:13:36 +00:00
Craig Topper da798ddba5 [X86] Make AVX512 integer comparison builtins use unsigned types for the masks.
llvm-svn: 227681
2015-01-31 08:58:36 +00:00
Craig Topper ae2957cce6 [X86] AVX512 scatter/gather builtins as taking an ICE for scale instead of just a const int.
llvm-svn: 227680
2015-01-31 08:58:30 +00:00
Craig Topper 1a8b0472d5 [X86] Add immediate range checking for a couple XOP builtins.
llvm-svn: 227679
2015-01-31 08:57:52 +00:00
Owen Anderson a366d7b217 Change more of the guts of CodeGenRegister's RegUnit tracking to be based on bit vectors.
This is a continuation of my prior work to move some of the inner workings for CodeGenRegister to use bit vectors when computing about register units. This is highly beneficial to TableGen runtime on targets with large, dense register files. This patch represents a ~40% runtime reduction over and above my earlier improvement on a stress test of this case.

llvm-svn: 227678
2015-01-31 07:49:41 +00:00