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58 Commits

Author SHA1 Message Date
Reed Kotler 6743924a32 Add conditional branch instructions and their patterns. 
llvm-svn: 166134
 2012-10-17 22:29:54 +00:00
Reed Kotler cf11c59e2f Div, Rem int/unsigned int 
llvm-svn: 165783
 2012-10-12 02:01:09 +00:00
Reed Kotler 210ebe93f3 1. Add load/store words from the stack 
2. As part of this, added assembly format FEXT_RI16_SP_explicit_ins and
moved other lines for FEXT_RI16 formats to be in the right place in the code.
3. Added mayLoad and mayStore assignements for the load/store instructions added and for ones already there that did not have this assignment.
4. Another patch will deal with the problem of load/store byte/halfword to the stack. This is a particular Mips16 problem.

llvm-svn: 164811
 2012-09-28 02:26:24 +00:00
Akira Hatanaka 0fbaec2246 mips16 fixes. 
1. Add MoveR3216
2. Correct spelling for Move32R16

Patch by Reed Kotler.

llvm-svn: 163869
 2012-09-14 03:21:56 +00:00
Craig Topper ca698195a2 Remove unused private field to silence build warning. 
llvm-svn: 162426
 2012-08-23 04:45:31 +00:00
Akira Hatanaka fab8929459 Move the code that creates instances of MipsInstrInfo and MipsFrameLowering out 
of MipsTargetMachine.cpp.

llvm-svn: 161191
 2012-08-02 18:21:47 +00:00
Akira Hatanaka cb37e13fa7 Add definitions of two subclasses of MipsRegisterInfo, Mips16RegisterInfo and 
MipsSERegisterInfo.

llvm-svn: 161092
 2012-07-31 23:41:32 +00:00
Akira Hatanaka b7fa3c9db0 Add definitions of two subclasses of MipsInstrInfo, MipsInstrInfo (for mips16), 
and MipsSEInstrInfo (for mips32/64).

llvm-svn: 161081
 2012-07-31 21:49:49 +00:00