Commit Graph

372549 Commits

Author SHA1 Message Date
Simon Pilgrim d06a445ca4 [X86] subvector-broadcast.ll - replace X32 check prefix with X86. NFC.
We typically use X32 for gnux32 triples
2020-11-17 16:16:50 +00:00
Peyton, Jonathan L 8647c669a4 [OpenMP] NFC: remove tabs in message catalog file 2020-11-17 10:15:04 -06:00
Andy Wingo 2a473db573 [WebAssembly] Fix parsing of linking section for named global imports
Differential Revision: https://reviews.llvm.org/D91635
2020-11-17 08:14:29 -08:00
Peyton, Jonathan L 0454154efd [OpenMP][stats] reset serial state when re-entering serial region
Differential Revision: https://reviews.llvm.org/D90867
2020-11-17 10:09:56 -06:00
Matt Arsenault c5ce6036c1 Linker: Fix linking of byref types
This wasn't properly remapping the type like with the other
attributes, so this would end up hitting a verifier error after
linking different modules using byref.
2020-11-17 11:02:04 -05:00
Jay Foad e67d8859f2 [AMDGPU] Precommit more vccz workaround tests 2020-11-17 15:55:40 +00:00
Anton Afanasyev 0a1d315f9f [SLPVectorizer] Fix assert 2020-11-17 18:46:31 +03:00
Ben Shi bba96c9965 [clang][AVR] Improve avr-ld command line options
Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D88410
2020-11-17 23:28:41 +08:00
Alexey Bataev 5292187a2d [OPENMP]Fix PR48076: mapping of data member pointer.
If the data member pointer is mapped, the compiler tries to optimize the
mapping of such data by discarding explicit mapping flags and trying to
emit combined data instead. In some cases, this optimization is not
quite correctly implemented and it leads to a program crash at the
runtime. Instead, if the data member is mapped, just emit it as is and
do not emit combined mapping flags for it.

Differential Revision: https://reviews.llvm.org/D91552
2020-11-17 07:18:32 -08:00
Florian Hahn 46846ac45b
[Matrix] Add inline assembly test case.
This patch adds a new test cases which uses a matrix value as memory
inline assembly argument. Currently the pointer element type does not
match the vector type.
2020-11-17 15:13:16 +00:00
Anton Afanasyev fcad8d3635 [SLP] Make SLPVectorizer to use `llvm.masked.gather` intrinsic
For the scattered operands of load instructions it makes sense
to use gathering load intrinsic, which can lower to native instruction
for X86/AVX512 and ARM/SVE. This also enables building
vectorization tree with entries containing scattered operands.
The next step is to add scattered store.

Fixes PR47629 and PR47623

Differential Revision: https://reviews.llvm.org/D90445
2020-11-17 18:11:45 +03:00
Andy Wingo b90228e411 [WebAssembly][MC] Remove useless overrides in MCWasmStreamer
Differential Revision: https://reviews.llvm.org/D91604
2020-11-17 07:09:49 -08:00
Joe Ellis 23a96b84a8 [AArch64][SVE] Support implicit lax vector conversions for SVE types
Lax vector conversions was behaving incorrectly for implicit casts
between scalable and fixed-length vector types. For example, this:

    #include <arm_sve.h>

    #define N __ARM_FEATURE_SVE_BITS
    #define FIXED_ATTR __attribute__((arm_sve_vector_bits(N)))

    typedef svfloat32_t fixed_float32_t FIXED_ATTR;

    void allowed_depending() {
      fixed_float32_t fs32;
      svfloat64_t s64;

      fs32 = s64;
    }

... would fail because the vectors have differing lane sizes. This patch
implements the correct behaviour for
-flax-vector-conversions={none,all,integer}. Specifically:

- -flax-vector-conversions=none prevents all lax vector conversions
  between scalable and fixed-sized vectors.
- -flax-vector-conversions=integer allows lax vector conversions between
  scalable and fixed-size vectors whose element types are integers.
- -flax-vector-conversions=all allows all lax vector conversions between
  scalable and fixed-size vectors (including those with floating point
  element types).

The implicit conversions are implemented as bitcasts.

Reviewed By: fpetrogalli

Differential Revision: https://reviews.llvm.org/D91067
2020-11-17 14:50:17 +00:00
Paul C. Anagnostopoulos 498859cbf6 [TableGen] Clean up Target .td include files
Differential Revision: https://reviews.llvm.org/D91483
2020-11-17 09:45:14 -05:00
Benjamin Kramer c25e1edf61 [MLIR] Fix up integration tests after b7382ed3fe 2020-11-17 15:42:45 +01:00
Andrzej Warzynski e8356a79ff [flang][nfc] Add missing dependency in CMake
This missing dependency has been causing the Flang buildbots
(with BUILD_SHARED_LIBS set to ON) to fail:
  * http://lab.llvm.org:8011/#/builders/66/builds/542
  * http://lab.llvm.org:8011/#/builders/33/builds/764

This missing dependency was exposed by this change:
  * https://reviews.llvm.org/D91461
This change is fine - the root cause of the failing builds is the
missing dependency.
2020-11-17 14:32:39 +00:00
Florian Hahn 13042da5cb
[ConstraintElimination] Add support for And.
When processing conditional branches, if the condition is an AND of 2 compares
and the true successor only has the current block as predecessor, queue both
conditions for the true successor.
2020-11-17 14:12:15 +00:00
Kadir Cetinkaya 5a9f386704
[clang-tidy] Make clang-format and include-order-check coherent
LLVM style puts both gtest and gmock to the end of the include list.
But llvm-include-order-check was only moving gtest headers to the end, resulting
in a false tidy-warning.

Differential Revision: https://reviews.llvm.org/D91602
2020-11-17 14:54:10 +01:00
Erich Keane 6976fef05b Update 'note-candiate' functions to skip lambda-conversion-op-overloads
In the wake of https://reviews.llvm.org/D89559, we discovered that a
couple of tests (the ones modified below to have additional triple
versions) would fail on Win32, for 1 of two reasons.  We seem to not
have a win32 buildbot anymore, so the triple is to make sure this
doesn't get broken in the future.

First, two of the three 'note-candidate' functions weren't appropriately
skipping the remaining conversion functions.

Second, in 1 situation (note surrogate candidates) we actually print the
type of the conversion operator.  The two tests that ran into that
needed updating to make sure it printed the proper one in the win32
case.
2020-11-17 05:49:31 -08:00
Sander de Smalen f571fe6df5 Reland [LoopVectorizer] NFCI: Calculate register usage based on TLI.getTypeLegalizationCost.
This relands https://reviews.llvm.org/D91059 and reverts commit
30fded75b4.

GetRegUsage now returns 0 when Ty is not a valid vector element type.
2020-11-17 13:45:10 +00:00
Kazushi (Jam) Marukawa f4517bbd73 [VE] Implement JumpTable
Implement JumpTable to make BRIND work on VE.  Update an existing
br_jt regression test also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91582
2020-11-17 22:43:10 +09:00
Stephan Herhut c4472f8b4c [mlir][std] Canonicalize extract_element(tensor_cast).
Canonicalize extract_element(tensor_cast(v)) to just extract_element(v).

Differential Revision: https://reviews.llvm.org/D91621
2020-11-17 14:41:39 +01:00
Stephan Herhut 3598605c0b [mlir][std] Fold dim(dynamic_tensor_from_elements, %cst)
The shape of the result of a dynamic_tensor_from_elements is defined via its
result type and operands. We already fold dim operations when they reference
one of the statically sized dimensions. Now, also fold dim on the dynamically
sized dimensions by picking the corresponding operand.

Differential Revision: https://reviews.llvm.org/D91616
2020-11-17 14:39:59 +01:00
Stephan Herhut ffac5b8e4c [mlir][linalg] Allow tensor_to_memref in dependence analysis
This enables the use of fusion on buffers in partially lowered
programs.

Differential Revision: https://reviews.llvm.org/D91613
2020-11-17 14:37:47 +01:00
Kazushi (Jam) Marukawa 5872cab849 [VE] Correct getMnemonic
https://reviews.llvm.org/D90039 breaks VE backend.  So, fix it.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91619
2020-11-17 22:33:29 +09:00
Alex Zinenko 88f25bda13 [mlir] Allow for using interface class name in ODS interface definitions
It may be necessary for interface methods to process or return variables with
the interface class type, in particular for attribute and type interfaces that
can return modified attributes and types that implement the same interface.
However, the code generated by ODS in this case would not compile because the
signature (and the body if provided) appear in the definition of the Model
class and before the interface class, which derives from the Model. Change the ODS
interface method generator to emit only method declarations in the Model class
itself, and emit method definitions after the interface class. Mark as "inline"
since their definitions are still emitted in the header and are no longer
implicitly inline. Add a forward declaration of the interface class before the
Concept+Model classes to make the class name usable in declarations.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D91499
2020-11-17 14:28:55 +01:00
Alex Zinenko ef8e859c0b [mlir] Fix Python tests after "module_terminator" migrated to ODS
The "module_terminator" op now has a custom syntax and therefore is
printed without quotes. Adapt Python tests to check for this syntax.
2020-11-17 14:16:31 +01:00
Nathan James d44edfc109
[clang][NFC] Use SmallString instead of SmallVector<char
Simplifies code in some places and is more explicit about what is being used.
No additional includes were added here so no impact on compile time.
2020-11-17 13:02:58 +00:00
Simon Pilgrim 0765d78a41 [X86] vector-sext.ll - replace X32 check prefix with X86. NFC.
We typically use X32 for gnux32 triples
2020-11-17 12:39:47 +00:00
Simon Pilgrim 74f6493587 [X86] insert-into-constant-vector.ll - replace X32 check prefix with X86. NFC.
We typically use X32 for gnux32 triples
2020-11-17 12:39:47 +00:00
Simon Pilgrim 3c933043e8 [X86] avx-intel-ocl.ll - replace X32 check prefix with X86. NFC.
We typically use X32 for gnux32 triples
2020-11-17 12:39:46 +00:00
Simon Pilgrim 7b099b1e1f [X86] 2011-10-19-widen_vselect.ll - replace X32 check prefix with X86. NFC.
We typically use X32 for gnux32 triples
2020-11-17 12:39:46 +00:00
Simon Pilgrim 0627140cd5 [clang][driver] Fix definition/declaration argument name mismatches. NFCI.
AddCXXStdlibLibArgs args were using the names for the clang equivalent methods.

Silences cppcheck warnings.
2020-11-17 12:39:45 +00:00
Muhammad Omair Javaid 661e4040ac [LLDB] Fix SVE reginfo for sequential offset in g packet
This moves in the direction of our effort to synchronize register descriptions
between LLDB and GDB xml description. We want to able to send registers in a
way that their offset fields can be re-constructed based on register sizes
in the increasing order of register number.

In context to Arm64 SVE, FPCR and FPSR are same registers in FPU regset and
SVE regset. Previously FPSR/FPCR offset was set at the end of SVE data
because Linux ptrace data placed FPCR and FPSR at the end of SVE register set.

Considering interoperability with other stubs like QEMU and that g packets
should generate register data in increasing order of register numbers. We
have to move FPCR/FPSR offset up to its original location according to
register numbering scheme of ARM64 registers with SVE registers included.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D90741
2020-11-17 17:18:34 +05:00
Luke Drummond 537cbd90c4 Escape command line arguments in backtraces
A common routine is to have the compiler crash, and attempt to rerun the
cc1 command-line by copying and pasting the arguments printed by
`llvm::Support::PrettyStackProgram::print`. However, these arguments are
not quoted or escaped which means they must be manually edited before
working correctly. This patch ensures that shell-unfriendly characters
are C-escaped, and arguments with spaces are double-quoted reducing the
frustration of running cc1 inside a debugger.

As the quoting is C, this is "best effort for most shells", but should
be fine for at least bash, zsh, csh, and cmd.exe.

Reviewed by: jhenderson

Differential Revision: https://reviews.llvm.org/D90759
2020-11-17 12:16:13 +00:00
Muhammad Omair Javaid fcca6fe93f [LLDB] Update SVE Z reg info to remove invalidate regs
In our recent discussion we are aiming to make LLDB registers exchange minimum
possible information in qRegisterInfo or XMl register descriptions.
For SVE registers, Z registers are catagorized as primary registers and should
not have any infomration about any pseudo registers. All pseudo registers
should have the information on which primary register they belong to.
This patch removes invalidate_regs list from Z registers and will mitigate its
impact on SVE resize patch in a follow up update.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D91057
2020-11-17 17:14:44 +05:00
Florian Hahn a9adb62a64
[AsmPrinter] Use getMnemonic for instruction-mix remark.
This patch uses the new `getMnemonic` helper from D90039
to display mnemonics instead of the internal opcodes.

The main motivation behind using the mnemonics is that they
are more user-friendly and more directly related to the assembly
the users will be presented.

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D90040
2020-11-17 12:12:47 +00:00
Sven van Haastregt f0c690018a [OpenCL] Stop opencl-c-base.h leaking extension enabling
opencl-c.h disables all extensions at its end, but opencl-c-base.h
does not, and that causes any inclusion of only opencl-c-base.h to
leave some extensions (such as cl_khr_fp16) enabled.  This affects the
-fdeclare-opencl-builtins option for example.

This violates the OpenCL Extension Specification which specifies that
"The initial state of the compiler is as if the directive #pragma
OPENCL EXTENSION all : disable was issued".

Fix by disabling all extensions at the end of opencl-c-base.h and
enable extensions inside opencl.h which relied on opencl-c-base.h
enabling the cl_khr_fp16/64 extensions.

Differential Revision: https://reviews.llvm.org/D91429
2020-11-17 12:07:40 +00:00
Serge Guelton 6795984a47 [build] Fix dependencies of LLVMExegesis 2020-11-17 06:15:02 -05:00
Alex Zinenko c5a6712f8c [mlir] Add basic support for attributes in ODS-generated Python bindings
In ODS, attributes of an operation can be provided as a part of the "arguments"
field, together with operands. Such attributes are accepted by the op builder
and have accessors generated.

Implement similar functionality for ODS-generated op-specific Python bindings:
the `__init__` method now accepts arguments together with operands, in the same
order as in the ODS `arguments` field; the instance properties are introduced
to OpView classes to access the attributes.

This initial implementation accepts and returns instances of the corresponding
attribute class, and not the underlying values since the mapping scheme of the
value types between C++, C and Python is not yet clear. Default-valued
attributes are not supported as that would require Python to be able to parse
C++ literals.

Since attributes in ODS are tightely related to the actual C++ type system,
provide a separate Tablegen file with the mapping between ODS storage type for
attributes (typically, the underlying C++ attribute class), and the
corresponding class name. So far, this might look unnecessary since all names
match exactly, but this is not necessarily the cases for non-standard,
out-of-tree attributes, which may also be placed in non-default namespaces or
Python modules. This also allows out-of-tree users to generate Python bindings
without having to modify the bindings generator itself. Storage type was
preferred over the Tablegen "def" of the attribute class because ODS
essentially encodes attribute _constraints_ rather than classes, e.g. there may
be many Tablegen "def"s in the ODS that correspond to the same attribute type
with additional constraints

The presence of the explicit mapping requires the change in the .td file
structure: instead of just calling the bindings generator directly on the main
ODS file of the dialect, it becomes necessary to create a new file that
includes the main ODS file of the dialect and provides the mapping for
attribute types. Arguably, this approach offers better separability of the
Python bindings in the build system as the main dialect no longer needs to know
that it is being processed by the bindings generator.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D91542
2020-11-17 11:47:37 +01:00
Haojian Wu af0d607e72 [clang-tidy] Fix an abseil-redundant-strcat-calls crash on 0-parameter StrCat().
Differential Revision: https://reviews.llvm.org/D91601
2020-11-17 11:05:24 +01:00
Kazushi (Jam) Marukawa 3a5c0ea895 [VE] Add vbrd intrinsic instructions
Add vbrd intrinsic instructions and a regression test.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91569
2020-11-17 19:04:18 +09:00
Ben Shi 9f8f8db339 [AVR] Optimize the 16-bit NEGW pseudo instruction
Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D88658
2020-11-17 17:51:58 +08:00
Florian Hahn b2f4c5fddc
[AsmWriter] Factor out mnemonic generation to accessible getMnemonic.
This patch factors out the part of printInstruction that gets the
mnemonic string for a given MCInst. This is intended to be used
subsequently for the instruction-mix remarks to display the final
mnemonic (D90040).

Unfortunately making `getMnemonic` available to the AsmPrinter
seems to require making it virtual. Not sure if there's a way around
that with the current layering of the AsmPrinters.

Reviewed By: Paul-C-Anagnostopoulos

Differential Revision: https://reviews.llvm.org/D90039
2020-11-17 09:47:38 +00:00
serge-sans-paille c6ef6e1690 [build] normalize components dependencies
Use LINK_COMPONENTS instead of explicit target_link_libraries for components.
This avoids redundancy and potential inconsistencies.

Differential Revision: https://reviews.llvm.org/D91461
2020-11-17 10:42:34 +01:00
Kai Luo c2460c3254 [PowerPC] Add negated abs test using llvm.abs intrinsic. NFC. 2020-11-17 09:28:56 +00:00
Haojian Wu 218500d823 [clang-tidy] Verify the fixes in abseil-redundant-strcat-calls test, NFC 2020-11-17 10:15:29 +01:00
River Riddle 73ca690df8 [mlir][NFC] Remove references to Module.h and Function.h
These includes have been deprecated in favor of BuiltinDialect.h, which contains the definitions of ModuleOp and FuncOp.

Differential Revision: https://reviews.llvm.org/D91572
2020-11-17 00:55:47 -08:00
River Riddle c51e4c4f01 [mlir][IR] Use tablegen for the BuiltinDialect and operations
This has been a long standing TODO, and cleans up a bit of IR/. This will also make it easier to move FuncOp out of IR/ at some point in the future. For now, Module.h and Function.h just forward BuiltinDialect.h. These files will be removed in a followup.

Differential Revision: https://reviews.llvm.org/D91571
2020-11-17 00:53:40 -08:00
Serge Pavlov 9faedb2d71 [Driver] Quote executable in reports generated by -fproc-stat-report
The option -fproc-stat-report=<file> makes driver to generate child
process resource comsumption report. In the report executable name was
not quoted and it made parsing the report more difficult. With this
change the executable name is surrounded by quotation marks.
2020-11-17 15:16:09 +07:00