Commit Graph

115385 Commits

Author SHA1 Message Date
Duncan P. N. Exon Smith bcc4f121a3 DebugInfo: Rename some testcases
Momentarily (but never in tree), the `scope:` field was called
`parent:`.  Apparently a few testcases were left behind with "parent" in
the name, so rename them.

llvm-svn: 233560
2015-03-30 16:21:28 +00:00
Duncan P. N. Exon Smith 869db50ffd Verifier: Check operands of MDSubprogram nodes
Check operands of `MDSubprogram`s in the verifier, and update the
accessors and factory functions to use more specific types.

There were a lot of broken testcases, which I fixed in r233466.  If you
have out-of-tree tests for debug info, you probably need similar changes
to the ones I made there.

llvm-svn: 233559
2015-03-30 16:19:15 +00:00
Yaron Keren d1fdbe7c32 Trying to fix the Hexagon and debian-fast bots arm32_neon_vcnt_upgrade.ll test.
llvm-svn: 233558
2015-03-30 16:10:39 +00:00
Yaron Keren 075759aadd Remove more superfluous .str() and replace std::string concatenation with Twine.
Following r233392, http://llvm.org/viewvc/llvm-project?rev=233392&view=rev.

llvm-svn: 233555
2015-03-30 15:42:36 +00:00
Sanjay Patel bbe1756a8c more space; NFC
llvm-svn: 233554
2015-03-30 15:31:32 +00:00
Simon Pilgrim 2711b743b8 [X86] Ensure integer domain on scalar i64 load/store stack folding tests. NFC
llvm-svn: 233553
2015-03-30 15:25:51 +00:00
Rafael Espindola 53444a4308 Fix Sphinx warning " Title underline too short.".
llvm-svn: 233551
2015-03-30 15:16:30 +00:00
Rafael Espindola d3ac79b3b4 Save a std::string.
The group names are always symbol names, so we can use a StringRef.

llvm-svn: 233545
2015-03-30 13:59:06 +00:00
Ulrich Weigand b8d76fb7ca [SystemZ] Fix LLVM crash on unoptimized code
Compiling the following function with -O0 would crash, since LLVM would
hit an assertion in getTestUnderMaskCond:

  int test(unsigned long x)
  {
    return x >= 0 && x <= 15;
  }

Fixed by detecting the case in the caller of getTestUnderMaskCond.

llvm-svn: 233541
2015-03-30 13:46:59 +00:00
Ulrich Weigand 58bb263eed [SystemZ] Remove TargetMachine CPU auto-detection
As was done for X86 in r206094.

llvm-svn: 233540
2015-03-30 13:46:25 +00:00
Rafael Espindola c9d069222e Special case the creation of relocation sections.
These sections are never looked up and we know when have to create them. Use
that to save adding them to the regular map and avoid a symbol->string->symbol
conversion for the group symbol.

This also makes the implementation independent of the details of how unique
sections are implemented.

llvm-svn: 233539
2015-03-30 13:39:16 +00:00
Daniel Sanders 82df616d8e [mips] Support 9-bit offsets for the 'R' inline assembly memory constraint.
Summary:
The 'R' constraint is actually supposed to be much more complicated than
this and is defined in terms of whether it will cause macro expansion in
the assembler. 'R' is getting less useful due to architecture changes and
ought to be replaced by other constraints. We therefore implement 9-bit
offsets which will work for all subtargets and all instructions.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8440

llvm-svn: 233537
2015-03-30 13:27:25 +00:00
Russell Gallop 9dc5e3e4ed Revert test commit at revision 233535.
llvm-svn: 233536
2015-03-30 12:39:03 +00:00
Russell Gallop 7d9dbdc5ac Test commit
llvm-svn: 233535
2015-03-30 12:37:55 +00:00
Daniel Jasper 87e848c7dc Revert "[SCEV] Look at backedge dominating conditions."
This leads to terribly slow compile times under MSAN. More discussion
on the commit thread of r233447.

llvm-svn: 233529
2015-03-30 09:30:02 +00:00
Elena Demikhovsky d8fda62247 AVX-512: blank lines, duplicated tests, no functional changes
see comments http://reviews.llvm.org/D6835

llvm-svn: 233528
2015-03-30 09:29:28 +00:00
Elena Demikhovsky 98de9d6360 AVX-512: added intrinsics for VPAND, VPOR and VPXOR
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 233525
2015-03-30 08:30:34 +00:00
Craig Topper 5d28b900ac [X86] In getHostCPUFeatures, disable xop, f16c, fma, and fma4 if OS does not support saving ymm state.
llvm-svn: 233518
2015-03-30 06:31:14 +00:00
Craig Topper 3611d9bc01 [X86] Remove FeatureAES for 'corei7' CPU. 'corei7' should match 'nehalem' which doesn't have AES. Having AES and not PCLMUL makes 'corei7' halfway between Nehalem and Westmere.
llvm-svn: 233517
2015-03-30 06:31:11 +00:00
Craig Topper 3c2e758e51 [X86] Use the more specific CPU names like 'nehalem', 'westmere', 'haswell', etc. Split Nehalem and Westmere CPUs.
llvm-svn: 233516
2015-03-30 06:31:09 +00:00
Craig Topper 0668285171 [X86] Move family 6 model 21 to 'pentium-m'. Near as I can tell this is a Dothan based SOC.
llvm-svn: 233515
2015-03-30 06:31:06 +00:00
Craig Topper 4e78a92610 [X86] Family 6 model 29 is a Penryn based processor not a Nehalem based processor.
llvm-svn: 233514
2015-03-30 06:31:03 +00:00
Alexei Starovoitov 36df1ca5f1 [MCJIT] In debug memory dump output, don't truncate 64 bit addresses
Summary: In dumpMemorySections a cast was too short, and in resolveRelocations a format string was too short.

Test Plan:
Enable debug build and run a program which invokes MCJIT::finalizeObject(). Saw valid input as below (highlighted addresses were previously truncated):

```
Parse relocations:
Resolving relocations Section #0	**0x7f4c1337b000**
----- Contents of section socket1 before relocations -----
**0x00007f4c1337b000**: 18 01 00 00 01 01 01 0a 00 00 00 00 04 03 02 01
0x00007f4c1337b010: 7b 1a f8 ff 00 00 00 00 18 11 00 00 05 00 00 00

```

Reviewers: lhames

Reviewed By: lhames

Subscribers: llvm-commits, ast

Differential Revision: http://reviews.llvm.org/D8681

llvm-svn: 233512
2015-03-30 05:15:57 +00:00
Lang Hames e352602517 [Orc] Add missing #include. Hopefully this will appease the modules buildbots.
llvm-svn: 233510
2015-03-30 04:02:55 +00:00
Lang Hames 633fe146e9 [MCJIT][Orc] Refactor RTDyldMemoryManager, weave RuntimeDyld::SymbolInfo through
MCJIT.

This patch decouples the two responsibilities of the RTDyldMemoryManager class,
memory management and symbol resolution, into two new classes:
RuntimeDyld::MemoryManager and RuntimeDyld::SymbolResolver.

The symbol resolution interface is modified slightly, from:

  uint64_t getSymbolAddress(const std::string &Name);

to:

  RuntimeDyld::SymbolInfo findSymbol(const std::string &Name);

The latter passes symbol flags along with symbol addresses, allowing RuntimeDyld
and others to reason about non-strong/non-exported symbols.


The memory management interface removes the following method:

  void notifyObjectLoaded(ExecutionEngine *EE,
                          const object::ObjectFile &) {}

as it is not related to memory management. (Note: Backwards compatibility *is*
maintained for this method in MCJIT and OrcMCJITReplacement, see below).


The RTDyldMemoryManager class remains in-tree for backwards compatibility.
It inherits directly from RuntimeDyld::SymbolResolver, and indirectly from
RuntimeDyld::MemoryManager via the new MCJITMemoryManager class, which
just subclasses RuntimeDyld::MemoryManager and reintroduces the
notifyObjectLoaded method for backwards compatibility).

The EngineBuilder class retains the existing method:

  EngineBuilder&
  setMCJITMemoryManager(std::unique_ptr<RTDyldMemoryManager> mcjmm);

and includes two new methods:

  EngineBuilder&
  setMemoryManager(std::unique_ptr<MCJITMemoryManager> MM);

  EngineBuilder&
  setSymbolResolver(std::unique_ptr<RuntimeDyld::SymbolResolver> SR);

Clients should use EITHER:

A single call to setMCJITMemoryManager with an RTDyldMemoryManager.

OR (exclusive)

One call each to each of setMemoryManager and setSymbolResolver.

This patch should be fully compatible with existing uses of RTDyldMemoryManager.
If it is not it should be considered a bug, and the patch either fixed or
reverted.

If clients find the new API to be an improvement the goal will be to deprecate
and eventually remove the RTDyldMemoryManager class in favor of the new classes.

llvm-svn: 233509
2015-03-30 03:37:06 +00:00
Lang Hames c420f84e63 [Orc] Add missing inline keyword to the function introduced in r233504.
llvm-svn: 233506
2015-03-29 22:07:07 +00:00
Lang Hames 2104100454 [Orc] Use raw TargetAddresses for callback trampoline addresses, rather than IR.
Add convenience function for building a typed IR Constant from trampoline
addresses.
   

llvm-svn: 233504
2015-03-29 21:55:27 +00:00
Benjamin Kramer 2739571168 Silence sign compare warning. NFC.
llvm-svn: 233502
2015-03-29 20:49:03 +00:00
Benjamin Kramer 9de151ee5d [inline asm] Don't reject duplicated matching constraints
They're harmless and it's easy to generate them from clang, leading to
a crash in LLVM. Found by afl-fuzz.

llvm-svn: 233500
2015-03-29 20:33:07 +00:00
Simon Pilgrim dcbe1213c8 Use SDValue bool check to tidyup some possible vector folding ops. NFC.
llvm-svn: 233498
2015-03-29 19:13:40 +00:00
Simon Pilgrim d15c2805ab Use SDValue bool check to tidyup some possible ReassociateOps. NFC.
llvm-svn: 233495
2015-03-29 16:49:51 +00:00
Elena Demikhovsky 72e3ccc375 AVX-512: Fixed the "commutative" property flag in VPANDN instruction
By Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 233489
2015-03-29 09:14:29 +00:00
Craig Topper 7db49fda99 Fix a variable name in MSVC specific part of rr233487.
llvm-svn: 233488
2015-03-29 01:07:57 +00:00
Craig Topper 798a260554 [X86] Implement getHostCPUFeatures for X86.
Plan to use this as part of CPU 'native' support so we can stop picking a different CPU name if CPU doesn't support AVX or AVX2.

llvm-svn: 233487
2015-03-29 01:00:23 +00:00
Akira Hatanaka fb2289cb1b Delete MCInstPrinter::AvailableFeatures.
All the ports have been fixed to read the feature bits from the subtarget passed
to the print methods. Also, delete the call to setAvailableFeatures in the
constructor of NVPTX's instprinter as the instprinter wasn't using the feature
bits anywhere.

llvm-svn: 233486
2015-03-28 21:07:24 +00:00
Akira Hatanaka 16adb81a9e [X86] Read the feature bits from the subtarget that is passed to printInst
instead of from MCInstPrinter::AvailableFeatures.

llvm-svn: 233485
2015-03-28 20:56:05 +00:00
Akira Hatanaka 1d07994550 [Objdump] Pass the correct subtarget to printInst.
This fixes a bug I introduced in r233411.

llvm-svn: 233484
2015-03-28 20:44:05 +00:00
Hal Finkel 6e9110abe9 [PowerPC] Add asm parser support for bitmask forms of rotate-and-mask instructions
The asm syntax for the 32-bit rotate-and-mask instructions can take a 32-bit
bitmask instead of an (mb, me) pair. This syntax is not specified in the Power
ISA manual, but is accepted by GNU as, and is documented in IBM's Assembler
Language Reference. The GNU Multiple Precision Arithmetic Library (gmp)
contains assembly that uses this syntax.

To implement this, I moved the isRunOfOnes utility function from
PPCISelDAGToDAG.cpp to PPCMCTargetDesc.h.

llvm-svn: 233483
2015-03-28 19:42:41 +00:00
Simon Pilgrim 7fdcc30e93 [DAGCombiner] Fixed incorrect test for buildvector of constant integers.
DAGCombiner::ReassociateOps was correctly testing for an constant integer scalar but failed to correctly test for constant integer vectors (it was testing for any constant vector).

llvm-svn: 233482
2015-03-28 18:31:31 +00:00
Hal Finkel cd5553ed39 [ConstantFold] Don't fold ppc_fp128 <-> int bitcasts
PPC_FP128 is really the sum of two consecutive doubles, where the first double
is always stored first in memory, regardless of the target endianness. The
memory layout of i128, however, depends on the target endianness, and so we
can't fold this without target endianness information. As a result, we must not
do this folding in lib/IR/ConstantFold.cpp (it could be done instead in
Analysis/ConstantFolding.cpp, but that's not done now).

Fixes PR23026.

llvm-svn: 233481
2015-03-28 16:44:57 +00:00
Craig Topper b2a097a8a3 Convert feature strings to lowercase even if they have a '+'/'-' in front of them.
llvm-svn: 233475
2015-03-28 04:59:14 +00:00
Akira Hatanaka 5f11781ed5 Partially revert the changes I made in r233473 to keep the code concise.
llvm-svn: 233474
2015-03-28 04:40:43 +00:00
Akira Hatanaka ba511fdd12 clang-format X86ATTInstPrinter.{h,cpp} before I make changes to these files.
llvm-svn: 233473
2015-03-28 04:25:41 +00:00
Akira Hatanaka 725657bad6 [SparcInstPrinter] Use the subtarget that is passed to the print function
instead of the one passed to the constructor.

Unfortunately, I don't have a test case for this change. In order to test my
change, I will have to run the code after line 90 in printSparcAliasInstr. I
couldn't make that happen because printAliasInstr would always handle the
printing of fcmp instructions that the code after line 90 is supposed to handle.

llvm-svn: 233471
2015-03-28 04:03:51 +00:00
Craig Topper 28f550b4df Update comment to match code behavior.
llvm-svn: 233470
2015-03-28 03:24:19 +00:00
Duncan P. N. Exon Smith a8b3a1f374 Verifier: Allow subroutine types to have no type array
Loosen one check from r233446: as long as `DIBuilder` requires a
non-null type for every subprogram, we should allow a null type array.
Also add tests for the rest of `MDSubroutineType`, which were somehow
missing.

llvm-svn: 233468
2015-03-28 02:43:53 +00:00
Richard Trieu d989386f74 Fix comparison functions.
llvm-svn: 233467
2015-03-28 02:37:33 +00:00
Duncan P. N. Exon Smith ce2b983425 DebugInfo: Fix testcases with invalid MDSubprogram nodes
Fix testcases that don't pass the verifier after a WIP patch to check
`MDSubprogram` operands more effectively.  I found the following issues:

  - When `isDefinition: false`, the `variables:` field might point at
    `!{i32 786468}`, or at a tuple that pointed at an empty tuple with
    the comment "previously: invalid DW_TAG_base_type" (I vaguely recall
    adding those comments during an upgrade script).  In these cases, I
    just dropped the array.
  - The `variables:` field might point at something like `!{!{!8}}`,
    where `!8` was an `MDLocation`.  I removed the extra layer of
    indirection.
  - Invalid `type:` (not an `MDSubroutineType`).

llvm-svn: 233466
2015-03-28 02:26:45 +00:00
Ahmed Bougacha a0f35592be [CodeGen] "PromoteInteger" f32 to f64 doesn't make sense.
The original f32->f64 promotion logic was refactored into roughly the
currently shape in r37781. However, starting with r132263, the
legalizer has been split into different kinds, and the previous
"Promote" (which did the right thing) was search-and-replace'd into
"PromoteInteger". The divide gradually deepened, with type legalization
("PromoteInteger") being separated from ops legalization
("Promote", which still works for floating point ops).

Fast-forward to today: there's no in-tree target with legal f64 but
illegal f32 (rather: no tests were harmed in the making of this patch).

With such a target, i.e., if you trick the legalizer into going through
the PromoteInteger path for FP, you get the expected brokenness.
For instance, there's no PromoteIntRes_FADD (the name itself sounds
wrong), so we'll just hit some assert in the PromoteInteger path.

Don't pretend we can promote f32 to f64. Instead, always soften.

llvm-svn: 233464
2015-03-28 01:22:37 +00:00
Akira Hatanaka ee97475b2e [ARM] Enable changing instprinter's behavior based on the per-function
subtarget.

llvm-svn: 233451
2015-03-27 23:41:42 +00:00