llvm-project

Commit Graph

Author	SHA1	Message	Date
Jim Grosbach	c16a657ad0	ARM: Test r193381 a bit more thoroughly. Make sure we're predicating right based on CPU even if the triple is 'wrong'. llvm-svn: 193382	2013-10-24 23:11:05 +00:00
Jim Grosbach	1d1d6d4675	ARM: Tweak usage of '*vfp' compiler_rt functions. Only use them if the subtarget has ARM mode, as these routines are implemented as ARM code. rdar://15302004 llvm-svn: 193381	2013-10-24 23:07:11 +00:00
Tim Northover	94ecbd2e6c	ARM: Use non-VFP softcalls on embedded Darwinish targets The compiler-rt functions __adddf3vfp and so on exist purely to allow Thumb1 code to make use of VFP instructions by switching back to ARM mode, they make no sense for M-class processors which don't even have an ARM mode. Given that justification, in practice this is a platform ABI decision so the actual check is based on that rather than CPU features. rdar://problem/15302004 llvm-svn: 193327	2013-10-24 10:37:09 +00:00

Author

SHA1

Message

Date

Jim Grosbach

c16a657ad0

ARM: Test r193381 a bit more thoroughly.

Make sure we're predicating right based on CPU even if the triple is 'wrong'.

llvm-svn: 193382

2013-10-24 23:11:05 +00:00

Jim Grosbach

1d1d6d4675

ARM: Tweak usage of '*vfp' compiler_rt functions.

Only use them if the subtarget has ARM mode, as these routines are implemented
as ARM code.

rdar://15302004

llvm-svn: 193381

2013-10-24 23:07:11 +00:00

Tim Northover

94ecbd2e6c

ARM: Use non-VFP softcalls on embedded Darwinish targets

The compiler-rt functions __adddf3vfp and so on exist purely to allow Thumb1
code to make use of VFP instructions by switching back to ARM mode, they make
no sense for M-class processors which don't even have an ARM mode.

Given that justification, in practice this is a platform ABI decision so the
actual check is based on that rather than CPU features.

rdar://problem/15302004

llvm-svn: 193327

2013-10-24 10:37:09 +00:00

3 Commits