Commit Graph

3413 Commits

Author SHA1 Message Date
Evan Cheng fa8f9f937a Undo r50574. We are already ensuring the folded load address is 16-byte aligned.
llvm-svn: 50578
2008-05-02 17:01:01 +00:00
Evan Cheng 4f9cd9181e 80 column violation.
llvm-svn: 50575
2008-05-02 07:53:32 +00:00
Evan Cheng 50f82f2c8e Not safe folding a load + FsXORPSrr into FsXORPSrm. It's loading a FR64 value but the load folding variant expects a 16-byte aligned address.
llvm-svn: 50574
2008-05-02 07:50:58 +00:00
Arnold Schwaighofer be0de34ede Tail call optimization improvements:
Move platform independent code (lowering of possibly overwritten
arguments, check for tail call optimization eligibility) from
target X86ISelectionLowering.cpp to TargetLowering.h and
SelectionDAGISel.cpp.

Initial PowerPC tail call implementation:

Support ppc32 implemented and tested (passes my tests and
test-suite llvm-test).  
Support ppc64 implemented and half tested (passes my tests).
On ppc tail call optimization is performed if 
  caller and callee are fastcc
  call is a tail call (in tail call position, call followed by ret)
  no variable argument lists or byval arguments
  option -tailcallopt is enabled
Supported:
 * non pic tail calls on linux/darwin
 * module-local tail calls on linux(PIC/GOT)/darwin(PIC)
 * inter-module tail calls on darwin(PIC)
If constraints are not met a normal call will be emitted.

A test checking the argument lowering behaviour on x86-64 was added.

llvm-svn: 50477
2008-04-30 09:16:33 +00:00
Dan Gohman da44054867 Fix the SVOffset values for loads and stores produced by
memcpy/memset expansion. It was a bug for the SVOffset value
to be used in the actual address calculations.

llvm-svn: 50359
2008-04-28 17:15:20 +00:00
Anton Korobeynikov fac70f2f44 Fix FP return for Win64 ABI
llvm-svn: 50342
2008-04-28 07:40:07 +00:00
Anton Korobeynikov e183b3cd76 Properly lower vararg's FORMAL_ARGUMENTS node on win64
llvm-svn: 50325
2008-04-27 23:15:03 +00:00
Anton Korobeynikov b5096e9c73 Handle fp80 for win64
llvm-svn: 50324
2008-04-27 22:54:09 +00:00
Chris Lattner 724539c001 A few inline asm cleanups:
- Make targetlowering.h fit in 80 cols.
  - Make LowerAsmOperandForConstraint const.
  - Make lowerXConstraint -> LowerXConstraint
  - Make LowerXConstraint return a const char* instead of taking a string byref.

llvm-svn: 50312
2008-04-26 23:02:14 +00:00
Evan Cheng 1e78184a99 Extract the lower 64-bit if a MMX value is passed in a XMM register.
llvm-svn: 50292
2008-04-25 20:13:28 +00:00
Evan Cheng 5ba02020e6 Fix illegal MMX_MOVDQ2Qrr pattern. vector_extract result must be a scalar value.
llvm-svn: 50291
2008-04-25 20:12:46 +00:00
Evan Cheng ccde6dd016 Special handling for MMX values being passed in either GPR64 or lower 64-bits of XMM registers.
llvm-svn: 50289
2008-04-25 19:11:04 +00:00
Evan Cheng 6d653b58f9 Fix MMX_MOVQ2DQrr pattern. It's illegal to do a bitconvert from a smaller type to a larger one.
llvm-svn: 50278
2008-04-25 18:19:54 +00:00
Evan Cheng 59834d1c7a Not checking for intrinsics which do not have a chain operand.
llvm-svn: 50260
2008-04-25 08:55:28 +00:00
Evan Cheng 051da5deaa - Switch from std::set to SmallPtrSet.
- Add comments.

llvm-svn: 50259
2008-04-25 08:22:20 +00:00
Evan Cheng df38b35a1e MMX argument passing fixes:
On Darwin / Linux x86-32, v8i8, v4i16, v2i32 values are passed in MM[0-2].                                                                                                                                      
On Darwin / Linux x86-32, v1i64 values are passed in memory.                                                                                                                                                    
On Darwin x86-64, v8i8, v4i16, v2i32 values are passed in XMM[0-7].                                                                                                                                     
On Darwin x86-64, v1i64 values are passed in 64-bit GPRs.

llvm-svn: 50257
2008-04-25 07:56:45 +00:00
Chris Lattner 741c7a3b49 Loosen up an assertion to allow intrinsics. I really have no
idea what this code (findNonImmUse) does, so I'm only guessing 
that this is the right thing.  It would be really really nice
if this had comments and perhaps switched to SmallPtrSet
(hint hint) :)

This fixes rdar://5886601, a crash on gcc.target/i386/sse4_1-pblendw.c

llvm-svn: 50252
2008-04-25 05:13:01 +00:00
Evan Cheng 9165e165dc Fix bug in x86 memcpy / memset lowering. If there are trailing bytes not handled by rep instructions, a new memcpy / memset is introduced for them. However, since source / destination addresses are already adjusted, their offsets should be zero.
llvm-svn: 50239
2008-04-25 00:26:43 +00:00
Anton Korobeynikov 0d6df367f1 Fix typo
llvm-svn: 50169
2008-04-23 18:24:25 +00:00
Anton Korobeynikov 965babda19 Only allow increase of max alignment value
llvm-svn: 50168
2008-04-23 18:23:50 +00:00
Anton Korobeynikov c1534dca56 Be over-conservative: scan for all used virtual registers and calculate maximal stack alignment in assumption, that there will be spill of vector register.
llvm-svn: 50167
2008-04-23 18:23:30 +00:00
Anton Korobeynikov 2659011b70 Add X86 Maximal Stack Alignment Calculator Pass before RA
llvm-svn: 50166
2008-04-23 18:23:05 +00:00
Anton Korobeynikov 156550ae79 Do proper book-keeping of offsets and prologue/epilogue code for stack realignment
llvm-svn: 50163
2008-04-23 18:21:27 +00:00
Anton Korobeynikov 89a0a017fb If stack realignment is used - incoming args will use EBP as base register and locals - ESP
llvm-svn: 50162
2008-04-23 18:21:02 +00:00
Anton Korobeynikov ba5129073c Eastimate required stack alignment early, so we can decide, whether we will need frame pointer or not
llvm-svn: 50161
2008-04-23 18:20:17 +00:00
Anton Korobeynikov c756b460d9 Cleanup
llvm-svn: 50159
2008-04-23 18:19:23 +00:00
Anton Korobeynikov a8aac3db3f Simplify
llvm-svn: 50158
2008-04-23 18:18:36 +00:00
Anton Korobeynikov cb195f511d Make stack alignment options global for all targets
llvm-svn: 50157
2008-04-23 18:18:10 +00:00
Anton Korobeynikov 9328fbc4c7 Provide option for enabling-disabling stack realignment
llvm-svn: 50156
2008-04-23 18:17:11 +00:00
Anton Korobeynikov ca150edda6 Disable stack realignment for functions with dynamic-sized alloca's
llvm-svn: 50155
2008-04-23 18:16:43 +00:00
Anton Korobeynikov a7495260ee Provide ABI-correct stack alignment
llvm-svn: 50154
2008-04-23 18:16:16 +00:00
Anton Korobeynikov 8843487e16 Provide convenient helpers for some operations
llvm-svn: 50153
2008-04-23 18:15:48 +00:00
Anton Korobeynikov 2ccafa47ac Whitespace cleanup
llvm-svn: 50152
2008-04-23 18:15:11 +00:00
Dan Gohman f166d2d0d6 Implement an x86-64 ABI detail of passing structs by hidden first
argument. The x86-64 ABI requires the incoming value of %rdi to
be copied to %rax on exit from a function that is returning a
large C struct.

Also, add a README-X86-64 entry detailing the missed optimization
opportunity and proposing an alternative approach.

llvm-svn: 50075
2008-04-21 23:59:07 +00:00
Dan Gohman db08f5218e Fix the encoding of the MMX movd that moves from MMX to 64-bit GPR.
llvm-svn: 50053
2008-04-21 19:52:29 +00:00
Chris Lattner a89143f1e0 Add an ugly note.
llvm-svn: 50029
2008-04-21 04:46:30 +00:00
Nicolas Geoffray 984e7199cc Don't forget to update the current operand when getting the size of an instruction.
llvm-svn: 50007
2008-04-20 23:36:47 +00:00
Chris Lattner 470ab00c76 A better fix for my previous patch, MOVZQI2PQIrr just requires SSE2.
llvm-svn: 49986
2008-04-20 05:52:46 +00:00
Chris Lattner 3b18762f40 Switch to using Simplified ConstantFP::get API.
llvm-svn: 49977
2008-04-20 00:41:09 +00:00
Evan Cheng 5e7ee0a002 Also LXCHG64 -> XCHG64rm.
llvm-svn: 49948
2008-04-19 02:05:42 +00:00
Evan Cheng 7f4240a47c xchg which references a memory operand does not need to lock prefix. Atomicity is guaranteed.
llvm-svn: 49946
2008-04-19 01:20:30 +00:00
Dan Gohman ad4071a9e1 Fix the handling of va_copy on x86-64. As of llvm-gcc r49920
llvm-gcc is now lowering va_copy on x86-64, so this completes
the fix for PR2230.

llvm-svn: 49922
2008-04-18 20:55:41 +00:00
Evan Cheng 00bd8d904a - Fix atomic operation JIT encoding.
- Remove unused instructions.

llvm-svn: 49921
2008-04-18 20:55:36 +00:00
Evan Cheng 5879213597 Also support Intel asm syntax.
llvm-svn: 49878
2008-04-17 23:35:10 +00:00
Evan Cheng 4704baa555 Fix assembly code for atomic operations.
llvm-svn: 49869
2008-04-17 21:26:35 +00:00
Evan Cheng 147cb764b5 Don't forget about sub-register indices when rematting instructions.
llvm-svn: 49830
2008-04-16 23:44:44 +00:00
Dale Johannesen c1279f5e4b Unbreak build on x86-64.
llvm-svn: 49822
2008-04-16 22:24:33 +00:00
Nicolas Geoffray a7557dfe71 Correlate stubs with functions in JIT: when emitting a stub, the JIT tells the memory manager which function
the stub will resolve.

llvm-svn: 49814
2008-04-16 20:46:05 +00:00
Nicolas Geoffray ae84bbdbed Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
llvm-svn: 49809
2008-04-16 20:10:13 +00:00
Evan Cheng a15cee1036 Initialize X863DNowLevel.
llvm-svn: 49808
2008-04-16 19:03:02 +00:00
Roman Levenstein a3ee1a38a3 Ongoing work on improving the instruction selection infrastructure:
Rename SDOperandImpl back to SDOperand.
Introduce the SDUse class that represents a use of the SDNode referred by
an SDOperand. Now it is more similar to Use/Value classes.

Patch is approved by Dan Gohman.

llvm-svn: 49795
2008-04-16 16:15:27 +00:00
Dan Gohman d43d3beeb0 Add support for the form of the SSE41 extractps instruction that
puts its result in a 32-bit GPR.

llvm-svn: 49762
2008-04-16 02:32:24 +00:00
Dan Gohman 8c99ccaf96 Recreate the size SDNode instead of reusing the old one in the x86
memcpy lowering code; this ensures that the size node has the desired
result type. This fixes a regression from r49572 with @llvm.memcpy.i64
on x86-32.

llvm-svn: 49761
2008-04-16 01:32:32 +00:00
Dan Gohman 3dd8ba6235 Remove X86_64SRet; it isn't used anymore.
llvm-svn: 49759
2008-04-16 00:24:30 +00:00
Dan Gohman 01a5d36d9d Add movd instructions to move from MMX registers
to 64-bit GPR registers on x86-64.

llvm-svn: 49757
2008-04-15 23:55:07 +00:00
Dan Gohman 2505d86783 Fix const-correctness issues with the SrcValue handling in the
memory intrinsic expansion code.

llvm-svn: 49666
2008-04-14 17:55:48 +00:00
Dale Johannesen 876224b1e8 Reverse sense of unwind-tables option. This means
stack tracebacks on Darwin x86-64 won't work by default;
nevertheless, everybody but me thinks this is a good idea.

llvm-svn: 49663
2008-04-14 17:54:17 +00:00
Anton Korobeynikov b9f38f38fa Provide option for stack alignment override
llvm-svn: 49593
2008-04-12 22:12:22 +00:00
Arnold Schwaighofer 634fc9a33a This patch corrects the handling of byval arguments for tailcall
optimized x86-64 (and x86) calls so that they work (... at least for
my test cases).

Should fix the following problems:

Problem 1: When i introduced the optimized handling of arguments for
tail called functions (using a sequence of copyto/copyfrom virtual
registers instead of always lowering to top of the stack) i did not
handle byval arguments correctly e.g they did not work at all :).

Problem 2: On x86-64 after the arguments of the tail called function
are moved to their registers (which include ESI/RSI etc), tail call
optimization performs byval lowering which causes xSI,xDI, xCX
registers to be overwritten. This is handled in this patch by moving
the arguments to virtual registers first and after the byval lowering
the arguments are moved from those virtual registers back to
RSI/RDI/RCX.

llvm-svn: 49584
2008-04-12 18:11:06 +00:00
Dan Gohman 544ab2c50b Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.

Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.

This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.

Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.

This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.

llvm-svn: 49572
2008-04-12 04:36:06 +00:00
Dan Gohman 8c7cf88f7e Fix a bug that prevented x86-64 from using rep.movsq for
8-byte-aligned data.

llvm-svn: 49571
2008-04-12 02:35:39 +00:00
Nate Begeman 7417348a7e 80 col fix
llvm-svn: 49569
2008-04-12 00:47:57 +00:00
Chris Lattner aeb23a8a34 add a note, this is actually not too bad to implement.
llvm-svn: 49466
2008-04-10 05:54:50 +00:00
Chris Lattner c692188075 move the x86-32 part of PR2108 here.
llvm-svn: 49465
2008-04-10 05:37:47 +00:00
Chris Lattner ad75302497 Fix the x86-64 side of PR2108 by adding a v2f64 version of
MOVZQI2PQIrr.  This would be better handled as a dag combine 
(with the goal of eliminating the bitconvert) but I don't know
how to do that safely.  Thoughts welcome.

llvm-svn: 49463
2008-04-10 05:13:43 +00:00
Dan Gohman 33b3300178 Make isVectorClearMaskLegal's operand list const.
llvm-svn: 49446
2008-04-09 20:09:42 +00:00
Dan Gohman 3d074a3125 Add XMM1 as a second return value register for f32 and f64 on x86-64. This
is needed for the x86-64-ABI handling of structs that contain floating-point
members that are returned by value.

llvm-svn: 49441
2008-04-09 17:54:37 +00:00
Dan Gohman cbf87313a2 Add DX as a second return value register for i16 on x86.
llvm-svn: 49440
2008-04-09 17:53:38 +00:00
Dale Johannesen fe767621ca Handle the situation in 2008-01-25-EmptyFunction.ll
correctly when unwind info is being generated.

llvm-svn: 49366
2008-04-08 00:37:56 +00:00
Dale Johannesen 344aec2952 Implement new llc flag -disable-required-unwind-tables.
Corresponds to -fno-unwind-tables (usually default in gcc).

llvm-svn: 49361
2008-04-08 00:10:24 +00:00
Dan Gohman 3bc3ddd638 Rename MemOperand to MachineMemOperand. This was suggested by
review feedback from Chris quite a while ago. No functionality
change.

llvm-svn: 49348
2008-04-07 19:35:22 +00:00
Roman Levenstein 51f532f92d Re-commit of the r48822, where the infinite looping problem discovered
by Dan Gohman is fixed.

llvm-svn: 49330
2008-04-07 10:06:32 +00:00
Gabor Greif e9ecc68d8f API changes for class Use size reduction, wave 1.
Specifically, introduction of XXX::Create methods
for Users that have a potentially variable number of
Uses.

llvm-svn: 49277
2008-04-06 20:25:17 +00:00
Evan Cheng f77b5ef3d0 Favors pshufd over shufps when shuffling elements from one vector. pshufd is faster than shufps.
llvm-svn: 49244
2008-04-05 00:30:36 +00:00
Evan Cheng 6c66bd368e Re-enable SSE4.
llvm-svn: 49158
2008-04-03 08:53:29 +00:00
Evan Cheng 6db4b4cc65 Fix x86-64 encoding bug. REX prefix must always follow 0x0F prefix. For example, extractps in 64bit mode: 66 REX 0F 3A 17, not 66 0F 3A REX 17.
llvm-svn: 49157
2008-04-03 08:53:17 +00:00
Evan Cheng d9129d1de3 Cosmetic
llvm-svn: 49156
2008-04-03 07:45:18 +00:00
Evan Cheng 3063c5546e Temporarily disabling SSE4 until we fix the encoding issues.
llvm-svn: 49129
2008-04-03 04:49:54 +00:00
Evan Cheng 025cea1126 Backing out 48222 temporarily.
llvm-svn: 49124
2008-04-03 03:13:16 +00:00
Dale Johannesen 8780ecbbac Cosmetic changes per EH patch review feedback.
llvm-svn: 49096
2008-04-02 17:04:45 +00:00
Anton Korobeynikov 20c9e4cbee Add new CC lowering rule: provide a list of registers, which can be 'shadowed',
when some another register is used for argument passing.
Currently is used on Win64.

llvm-svn: 49079
2008-04-02 05:23:57 +00:00
Dale Johannesen fd967cf3fa Recommitting EH patch; this should answer most of the
review feedback.
-enable-eh is still accepted but doesn't do anything.
EH intrinsics use Dwarf EH if the target supports that,
and are handled by LowerInvoke otherwise.
The separation of the EH table and frame move data is,
I think, logically figured out, but either one still
causes full EH info to be generated (not sure how to
split the metadata correctly).
MachineModuleInfo::needsFrameInfo is no longer used and
is removed.

llvm-svn: 49064
2008-04-02 00:25:04 +00:00
Evan Cheng b86595fb0a ReMat of load from stub in pic mode extends the life of pic base. Currently spiller doesn't do a good job of estimating the impact. Disable for now.
llvm-svn: 49059
2008-04-01 23:26:12 +00:00
Evan Cheng 19a6dd9f2a Remove unnecessary and non-deterministic checking code. Re-enable remat of load from gv stub.
llvm-svn: 49054
2008-04-01 21:38:20 +00:00
Dan Gohman cb9f8f6e4e Don't use __bzero for memset if the second argument isn't zero.
llvm-svn: 49050
2008-04-01 20:56:18 +00:00
Dan Gohman 980d7200c1 Speculatively micro-optimize memory-zeroing calls on Darwin 10.
llvm-svn: 49048
2008-04-01 20:38:36 +00:00
Dale Johannesen 5e4e051c2a Revert 49006 for the moment.
llvm-svn: 49046
2008-04-01 20:00:57 +00:00
Evan Cheng 306e3dcff4 Disabling remat of load from gv stub (temporarily) again to fix llvmgcc bootstrap miscompare.
llvm-svn: 49037
2008-04-01 07:33:13 +00:00
Dale Johannesen efa81a6979 Accept 'y' constraint (MMX) in inline asm.
llvm-svn: 49011
2008-04-01 00:57:48 +00:00
Dale Johannesen 7d02cf3c9c Emit exception handling info for functions which are
not marked nounwind, or for all functions when -enable-eh
is set, provided the target supports Dwarf EH.

llvm-gcc generates nounwind in the right places; other FEs
will need to do so also.  Given such a FE, -enable-eh should
no longer be needed.

llvm-svn: 49006
2008-03-31 23:40:23 +00:00
Evan Cheng e4f77c69ac It's not safe to fold a load from GV stub or constantpool into a two-address use.
llvm-svn: 49002
2008-03-31 23:19:51 +00:00
Evan Cheng ed6e34fe41 Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
llvm-svn: 48995
2008-03-31 20:40:39 +00:00
Evan Cheng 1973a46cd3 Re-apply 48911.
llvm-svn: 48977
2008-03-31 07:54:19 +00:00
Dan Gohman fd2eb00cc2 Fix a tokenfactor node to use the load chain rather than the
load value. This fixes PR2177.

llvm-svn: 48932
2008-03-28 23:45:16 +00:00
Evan Cheng b8654202dd Backing out 48911 for now. It's breaking stuff.
llvm-svn: 48922
2008-03-28 17:49:06 +00:00
Evan Cheng 81e0c9a32c New entry.
llvm-svn: 48912
2008-03-28 07:07:06 +00:00
Evan Cheng 9ae4d7b719 Load from stub is already re-materializable.
llvm-svn: 48911
2008-03-28 06:49:25 +00:00
Evan Cheng 308e564693 Code clean up.
llvm-svn: 48856
2008-03-27 01:45:11 +00:00
Evan Cheng 29e62a59f3 Allow certain lea instructions to be rematerialized.
llvm-svn: 48855
2008-03-27 01:41:09 +00:00
Evan Cheng 4fb07c6500 Remove an unused command line option.
llvm-svn: 48854
2008-03-27 01:30:24 +00:00
Roman Levenstein 358e04a185 Use a linked data structure for the uses lists of an SDNode, just like
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.

The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.

On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better. 

llvm-svn: 48822
2008-03-26 12:39:26 +00:00
Evan Cheng 292063603e Fix some SSE4.1 instruction encoding bugs.
llvm-svn: 48815
2008-03-26 08:11:49 +00:00
Dale Johannesen ad6c23d5e9 Use ## for comment delimiter on darwin x86-32, so
llvm's output .s files will go through gcc -std=c99
without triggering preprocesser errors.  Approach
suggested by Daveed Vandevoorde.

llvm-svn: 48808
2008-03-25 23:29:30 +00:00
Evan Cheng ddc58ff92a Smaller function alignment when optimizing for size.
llvm-svn: 48805
2008-03-25 22:29:46 +00:00
Dan Gohman c60c67fc37 Add explicit keywords.
llvm-svn: 48801
2008-03-25 22:06:05 +00:00
Dan Gohman bdc24adaaf A quick nm audit turned up several fixed tables and objects that were
marked read-write. Use const so that they can be allocated in a
read-only segment.

llvm-svn: 48800
2008-03-25 21:45:14 +00:00
Dan Gohman 883cbfd0ba Add CMP32mr and friends to the load-unfolding table. Among
other things, this allows the scheduler to unfold a load operand
in the 2008-01-08-SchedulerCrash.ll testcase, so it now successfully
clones the comparison to avoid a pushf+popf.

llvm-svn: 48777
2008-03-25 16:53:19 +00:00
Evan Cheng 615488ab45 - SSE4.1 extractfps extracts a f32 into a gr32 register. Very useful! Not. Fix the instruction specification and teaches lowering code to use it only when the only use is a store instruction.
llvm-svn: 48746
2008-03-24 21:52:23 +00:00
Evan Cheng 58db865d6e Remove duplicated entries.
llvm-svn: 48714
2008-03-23 22:56:07 +00:00
Anton Korobeynikov 1fdd5e9133 Minor typo fixes. Also add another FIXME.
llvm-svn: 48710
2008-03-23 20:32:06 +00:00
Anton Korobeynikov 17fb491469 Add license header
llvm-svn: 48707
2008-03-23 14:53:18 +00:00
Anton Korobeynikov 9f0e820fa3 Add Win64 compilation callback. This allows easy examples to be JITed on Win64!
llvm-svn: 48706
2008-03-23 14:44:32 +00:00
Anton Korobeynikov a347663762 Provide a JIT selector on win64
llvm-svn: 48704
2008-03-23 13:43:47 +00:00
Anton Korobeynikov 7574ead985 Hack out the PIC mode on Win64 targets. This needs to be investigated later.
llvm-svn: 48703
2008-03-23 13:41:18 +00:00
Anton Korobeynikov 4733e72a25 Code cleanup. Provide generic way of selecting JIT pointer bitwidth regardless
of compiler used.

llvm-svn: 48702
2008-03-23 13:40:45 +00:00
Anton Korobeynikov bd47269f13 Remove old-standing obsolete code.
llvm-svn: 48701
2008-03-23 12:32:54 +00:00
Anton Korobeynikov cec773d8e7 Honour built-in defines on win64 targets for automatically subtarget recognize.
Force stack alignment to 16 bytes on win targets.

llvm-svn: 48695
2008-03-22 21:18:22 +00:00
Anton Korobeynikov 07a789d2b5 Recognize "windows" in target triple, not only "win32"
llvm-svn: 48694
2008-03-22 21:12:53 +00:00
Anton Korobeynikov b86e0936f1 Add information about callee-saved registers on Win64
llvm-svn: 48692
2008-03-22 21:04:01 +00:00
Anton Korobeynikov 7f125b2ba5 Add convenient helper for win64 check. Simplify things slightly.
llvm-svn: 48691
2008-03-22 20:57:27 +00:00
Anton Korobeynikov 7b4f4e1a86 Initial support for Win64 calling conventions. Still in early state.
llvm-svn: 48690
2008-03-22 20:37:30 +00:00
Anton Korobeynikov 2fa75184f3 Another comments fixing
llvm-svn: 48683
2008-03-22 07:53:40 +00:00
Chris Lattner c55b444a8f Restore this assert now that the livevar bug is fixed.
This verifies kill info for "ret" fp operands is right.

llvm-svn: 48656
2008-03-21 20:41:27 +00:00
Duncan Sands d97eea372a Introduce a new node for holding call argument
flags.  This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines.  There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness.  As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.

llvm-svn: 48640
2008-03-21 09:14:45 +00:00
Chris Lattner 68b11e14bc remove Evan's "ugly hack" that sorta attempted to get
x86-64 return conventions correct, but was never enabled.
We can now do the "right thing" with multiple return values.

llvm-svn: 48635
2008-03-21 06:50:21 +00:00
Chris Lattner 5abbe6cef5 Add support for calls that return two FP values in
ST(0)/ST(1).

llvm-svn: 48634
2008-03-21 06:38:26 +00:00
Chris Lattner 7e59a30e9f disable a bogus assertion.
llvm-svn: 48633
2008-03-21 06:01:05 +00:00
Chris Lattner b6f04a3e0a Enable support for returning two long-double values in ST(0)/ST(1).
This allows us to compile fp-stack-2results.ll into:

_test:
	fldz
	fld1
	ret

which returns 1 in ST(0) and 0 in ST(1).  This is needed for x86-64
_Complex long double.

llvm-svn: 48632
2008-03-21 05:57:20 +00:00
Evan Cheng 92b4488202 Undo 48570. Correctly match mmx shift instructions with an immediate operand.
llvm-svn: 48627
2008-03-21 00:40:09 +00:00
Evan Cheng 7a3e750fd2 Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
llvm-svn: 48578
2008-03-20 02:18:41 +00:00
Evan Cheng bbba76fc99 Add intrinsics to match mmx shift builtin's with immediate operand.
llvm-svn: 48569
2008-03-19 23:38:52 +00:00
Arnold Schwaighofer 7da2bceb3b Don't loose incoming argument registers. Fix documentation style.
llvm-svn: 48545
2008-03-19 16:39:45 +00:00
Christopher Lamb 8fe9109469 Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
llvm-svn: 48542
2008-03-19 08:30:06 +00:00
Bill Wendling 2f6ab65d77 On Darwin, GCC issues a ".globl" for something that has a "visibility protected"
attribute instead of ".protected".

llvm-svn: 48516
2008-03-18 23:38:12 +00:00
Evan Cheng 484064370a Fix a x86-64 isel lowering bug that's been around forever. A x86-64 varargs function implicitly reads X86::AL, don't clobber it!
llvm-svn: 48515
2008-03-18 23:36:35 +00:00
Evan Cheng 24bc123e80 Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF.
llvm-svn: 48447
2008-03-17 06:56:52 +00:00
Nate Begeman 9030ecec88 Add a couple missing SSE4 instructions
llvm-svn: 48430
2008-03-16 21:14:46 +00:00
Christopher Lamb d3d0ad3f58 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
llvm-svn: 48412
2008-03-16 03:12:01 +00:00
Evan Cheng 0e7b00d79f Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
llvm-svn: 48380
2008-03-15 00:03:38 +00:00
Evan Cheng 5be52a6053 Fix some 80 col violations.
llvm-svn: 48361
2008-03-14 07:46:48 +00:00
Evan Cheng 96bdbd6c5d Fix a number of encoding bugs. SSE 4.1 instructions MPSADBWrri, PINSRDrr, etc. have 8-bits immediate field (ImmT == Imm8).
llvm-svn: 48360
2008-03-14 07:39:27 +00:00
Evan Cheng 77c8da7f00 Add debugging stuff.
llvm-svn: 48359
2008-03-14 07:13:42 +00:00
Chris Lattner 477d0f5294 Add an issue that is preventing instcombine from doing a simplification.
llvm-svn: 48356
2008-03-14 06:00:19 +00:00
Christopher Lamb dd55d3f1b2 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
2008-03-13 05:47:01 +00:00
Chris Lattner 8a923e7c28 Reimplement the parameter attributes support, phase #1. hilights:
1. There is now a "PAListPtr" class, which is a smart pointer around
   the underlying uniqued parameter attribute list object, and manages
   its refcount.  It is now impossible to mess up the refcount.
2. PAListPtr is now the main interface to the underlying object, and
   the underlying object is now completely opaque.
3. Implementation details like SmallVector and FoldingSet are now no
   longer part of the interface.
4. You can create a PAListPtr with an arbitrary sequence of
   ParamAttrsWithIndex's, no need to make a SmallVector of a specific 
   size (you can just use an array or scalar or vector if you wish).
5. All the client code that had to check for a null pointer before
   dereferencing the pointer is simplified to just access the 
   PAListPtr directly.
6. The interfaces for adding attrs to a list and removing them is a
   bit simpler.

Phase #2 will rename some stuff (e.g. PAListPtr) and do other less 
invasive changes.

llvm-svn: 48289
2008-03-12 17:45:29 +00:00
Evan Cheng 99ee78ef63 Clean up my own mess.
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.

llvm-svn: 48279
2008-03-12 07:02:50 +00:00
Anton Korobeynikov e8fa50f63a Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
llvm-svn: 48257
2008-03-11 22:38:53 +00:00
Dan Gohman 24570836b2 Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.

llvm-svn: 48256
2008-03-11 22:29:46 +00:00
Chris Lattner 8abed80a69 Implement basic support for the 'f' register class constraint. This basically
works, but probably won't if you mix it with 't' or 'u' yet.

llvm-svn: 48243
2008-03-11 19:50:13 +00:00
Chris Lattner 7b27ccfd5e coalesce away 80-bit floating point copies.
llvm-svn: 48241
2008-03-11 19:30:09 +00:00