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10 Commits

Author SHA1 Message Date
Evan Cheng e37da03e60 More pseudo instruction scheduling itinerary fixes. 
llvm-svn: 114768
 2010-09-24 22:41:41 +00:00
Evan Cheng 1d35ad62cc Fix scheduling itinerary for pseudo mov immediate instructions which expand into two real instructions. 
llvm-svn: 114766
 2010-09-24 22:03:46 +00:00
Evan Cheng 722cd122dc Fix LDM_RET schedule itinery. 
llvm-svn: 113435
 2010-09-08 22:57:08 +00:00
Jim Grosbach 7ea5fc0794 minor housekeeping cleanup: 80-column, trailing whitespace, spelling, etc.. No functional change. 
llvm-svn: 106988
 2010-06-28 04:27:01 +00:00
Anton Korobeynikov a09d95412e Some A9 load/store cleanups 
llvm-svn: 105109
 2010-05-29 19:25:39 +00:00
Anton Korobeynikov 2a21aef8f2 Some rough approximations for load/stores on A9 
llvm-svn: 105108
 2010-05-29 19:25:34 +00:00
Anton Korobeynikov d4c7cceb70 NEON/VFP stuff can be issued only via Pipe1 on A9 
llvm-svn: 105107
 2010-05-29 19:25:29 +00:00
Anton Korobeynikov 94d7fd88fd Add some integer instruction itineraries for A9 
llvm-svn: 105106
 2010-05-29 19:25:17 +00:00
Anton Korobeynikov 7d62e33291 Make processor FUs unique for given itinerary. This extends the limit of 32 
FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.

llvm-svn: 101754
 2010-04-18 20:31:01 +00:00
Anton Korobeynikov 090323aee5 Split A8/A9 itins - they already were too big. 
llvm-svn: 100672
 2010-04-07 18:22:11 +00:00