616 Commits

Author	SHA1	Message	Date
Anton Korobeynikov	3709f49ee9	Change register allocation order, so R0 will be allocated the last among scratch. This will make address-calculation code much more happy. ... llvm-svn: 75928	2009-07-16 13:43:40 +00:00
Anton Korobeynikov	04be818918	Add shifts and reg-imm address matching ... llvm-svn: 75927	2009-07-16 13:43:18 +00:00
Anton Korobeynikov	cf7ea6a94f	Add bunch of 32-bit patterns... Uffff :) ... llvm-svn: 75926	2009-07-16 13:42:31 +00:00
Anton Korobeynikov	293324104b	Add 32 bit subregs ... llvm-svn: 75923	2009-07-16 13:35:30 +00:00
Anton Korobeynikov	de517f1e32	Add another bunch of reg-imm patterns for add/or/and/xor ... llvm-svn: 75922	2009-07-16 13:35:08 +00:00
Anton Korobeynikov	ebe2de0e14	Add bunch of reg-imm movs ... llvm-svn: 75921	2009-07-16 13:34:50 +00:00
Anton Korobeynikov	168614f54f	Proper match halfword-imm operands for mov and add ... llvm-svn: 75920	2009-07-16 13:34:24 +00:00
Anton Korobeynikov	28234bcde2	Provide masked reg-imm 'or' and 'and' ... llvm-svn: 75919	2009-07-16 13:33:57 +00:00
Anton Korobeynikov	0d76b17a78	Add reg-reg and pattern ... llvm-svn: 75917	2009-07-16 13:32:49 +00:00
Anton Korobeynikov	f9fe4036f2	Add sub reg-reg pattern ... llvm-svn: 75916	2009-07-16 13:32:16 +00:00
Anton Korobeynikov	a083d7af53	Add xor reg-reg pattern ... llvm-svn: 75915	2009-07-16 13:31:28 +00:00
Anton Korobeynikov	65096d6a60	Add or reg-reg pattern. ... llvm-svn: 75914	2009-07-16 13:30:53 +00:00
Anton Korobeynikov	18172d786f	Add add reg-reg and reg-imm patterns ... llvm-svn: 75913	2009-07-16 13:30:15 +00:00
Anton Korobeynikov	09082fa01a	Add simple reg-reg and reg-imm moves ... llvm-svn: 75912	2009-07-16 13:29:38 +00:00
Anton Korobeynikov	cf4ba97dba	Minimal lowering for formal_arguments / ret ... llvm-svn: 75911	2009-07-16 13:28:59 +00:00
Anton Korobeynikov	c334c28b3b	Let's start another backend :) ... llvm-svn: 75909	2009-07-16 13:27:25 +00:00