Tom Stellard
ce540330df
R600: Add support for GROUP_BARRIER instruction
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Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 185161
2013-06-28 15:46:59 +00:00
Bill Wendling
37e9adb091
Don't cache the instruction and register info from the TargetMachine, because
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the internals of TargetMachine could change.
No functionality change intended.
llvm-svn: 183561
2013-06-07 20:28:55 +00:00
Vincent Lejeune
c689679173
R600: Const/Neg/Abs can be folded to dot4
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llvm-svn: 183278
2013-06-04 23:17:15 +00:00
Benjamin Kramer
d78bb468bd
Move passes from namespace llvm into anonymous namespaces. Sort includes while there.
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llvm-svn: 182594
2013-05-23 17:10:37 +00:00
Vincent Lejeune
519f21eed3
R600: Relax some vector constraints on Dot4.
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Dot4 now uses 8 scalar operands instead of 2 vectors one which allows register
coalescer to remove some unneeded COPY.
This patch also defines some structures/functions that can be used to handle
every vector instructions (CUBE, Cayman special instructions...) in a similar
fashion.
llvm-svn: 182126
2013-05-17 16:50:32 +00:00
Vincent Lejeune
0fca91d52e
R600: Some factorization
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llvm-svn: 182123
2013-05-17 16:50:02 +00:00
Vincent Lejeune
c3d3f9b66e
R600: Fix last ALU of a clause being emitted in a separate clause
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llvm-svn: 178675
2013-04-03 18:24:47 +00:00
Vincent Lejeune
80031d9fc4
R600: Factorize maximum alu per clause in a single location
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llvm-svn: 178667
2013-04-03 16:49:34 +00:00
Vincent Lejeune
9931298b30
R600: Consider KILLGT as an ALU instruction
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Mesa does not override llvm behavior wrt KILLGT anymore so llvm
has to handle KILLGT on its own.
llvm-svn: 178664
2013-04-03 16:24:04 +00:00
Vincent Lejeune
f43bc57b66
R600: Emit CF_ALU and use true kcache register.
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llvm-svn: 178503
2013-04-01 21:47:42 +00:00