6 Commits

Author	SHA1	Message	Date
Daniel Sanders	acc008cb0c	[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC ... As Roman Tereshin pointed out in https://reviews.llvm.org/D45541, the -global-isel option is redundant when -run-pass is given. -global-isel sets up the GlobalISel passes in the pass manager but -run-pass skips that entirely and configures it's own pipeline. llvm-svn: 331603	2018-05-05 21:19:59 +00:00
Puyan Lotfi	43e94b15ea	Followup on Proposal to move MIR physical register namespace to '$' sigil. ... Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922	2018-01-31 22:04:26 +00:00
Justin Bogner	6c452834a1	MIR: Print the register class or bank in vreg defs ... This updates the MIRPrinter to include the regclass when printing virtual register defs, which is already valid syntax for the parser. That is, given 64 bit %0 and %1 in a "gpr" regbank, %1(s64) = COPY %0(s64) would now be written as %1:gpr(s64) = COPY %0(s64) While this change alone introduces a bit of redundancy with the registers block, it allows us to update the tests to be more concise and understandable and brings us closer to being able to remove the registers block completely. Note: We generally only print the class in defs, but there is one exception. If there are uses without any defs whatsoever, we'll print the class on all uses. I'm not completely convinced this comes up in meaningful machine IR, but for now the MIRParser and MachineVerifier both accept that kind of stuff, so we don't want to have a situation where we can print something we can't parse. llvm-svn: 316479	2017-10-24 18:04:54 +00:00
Aditya Nandakumar	4dfd2590dc	[GISel][AArch64]: Fix illegal Generic copies in tests ... This is in preparation for a verifier check that makes sure copies are of the same size (when generic virtual registers are involved). llvm-svn: 316387	2017-10-23 22:53:04 +00:00
Amara Emerson	1f83777bd3	[AArch64][GlobalISel] Add a test case for G_PHI of p0 instruction selection. ... llvm-svn: 315179	2017-10-08 15:29:35 +00:00
Aditya Nandakumar	efd8a84cd5	[GISEl]: Translate phi into G_PHI ... G_PHI has the same semantics as PHI but also has types. This lets us verify that the types in the G_PHI are consistent. This also allows specifying legalization actions for G_PHIs. https://reviews.llvm.org/D36990 llvm-svn: 311596	2017-08-23 20:45:48 +00:00