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2 Commits

Author SHA1 Message Date
Hrvoje Varga 14c42eec54 Add additional Hi/Lo registers to Clang MipsTargetInfoBase 
Differential Revision: http://reviews.llvm.org/D17378

llvm-svn: 264727
 2016-03-29 12:46:16 +00:00
Daniel Sanders 48fa39e4a1 [mips] Add support for 'ZC' inline assembly memory constraint. 
Summary: Also add tests for 'R' and 'm'.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D8449

llvm-svn: 233542
 2015-03-30 13:47:23 +00:00