Commit Graph

93615 Commits

Author SHA1 Message Date
Anna Thomas 037e540f08 [AliasAnalysis] Treat invariant.start as read-memory
Summary:
We teach alias analysis that invariant.start is readonly.
This helps with GVN and memcopy optimizations that currently treat.
invariant.start as a clobber.
We need to treat this as readonly, so that DSE does not incorrectly
remove stores prior to the invariant.start

Reviewers: sanjoy, reames, majnemer, dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23214

llvm-svn: 278138
2016-08-09 17:18:05 +00:00
Xinliang David Li 9035cfceef [Profile] turn off verbose warnings by default
no prof data for func warning is turned off by default
due to its high verbosity and minimal usefulness.

Differential Revision: http://reviews.llvm.org/D23295

llvm-svn: 278127
2016-08-09 15:35:28 +00:00
Artur Pilipenko c710a461b5 [LVI] Make LVI smarter about comparisons with non-constants
Make LVI smarter about comparisons with a non-constant. For example, a s< b constraints a to be in [INT_MIN, INT_MAX) range. This is a part of https://llvm.org/bugs/show_bug.cgi?id=28620 fix.

Reviewed By: sanjoy

Differential Revision: https://reviews.llvm.org/D23205

llvm-svn: 278122
2016-08-09 14:50:08 +00:00
Simon Pilgrim 27740d038c [X86][XOP] Add support for combining target shuffles to VPERMIL2PD/VPERMIL2PS
llvm-svn: 278120
2016-08-09 12:56:15 +00:00
Simon Pilgrim aae7d4a1b6 [X86][XOP] Add support for combining target shuffles to VPPERM
llvm-svn: 278114
2016-08-09 10:56:29 +00:00
Dean Michael Berris 3a25d84a51 [XRay] Test for xray_instr_map in object file. (NFC)
This makes a trivial change in the emission of the per-function XRay
tables, and makes sure that the xray_instr_map section does show up in
the object file.

llvm-svn: 278113
2016-08-09 10:42:11 +00:00
Artur Pilipenko d97eedff40 Revert 278107 which causes buildbot failures and in addition has wrong commit message
llvm-svn: 278109
2016-08-09 10:00:22 +00:00
Artur Pilipenko a410d81f64 Teach CorrelatedValuePropagation to mark adds as no wrap
Use LVI to prove that adds do not wrap. The change is motivated by https://llvm.org/bugs/show_bug.cgi?id=28620 bug and it's the first step to fix that problem.

Reviewed By: sanjoy

Differential Revision: http://reviews.llvm.org/D23059

llvm-svn: 278107
2016-08-09 09:41:34 +00:00
Simon Pilgrim 54c32ddf55 [X86][SSE] Fix memory folding of (v)roundsd / (v)roundss
We only had partial memory folding support for the intrinsic definitions, and (as noted on PR27481) was causing FR32/FR64/VR128 mismatch errors with the machine verifier.

This patch adds missing memory folding support for both intrinsics and the ffloor/fnearbyint/fceil/frint/ftrunc patterns and in doing so fixes the failing machine verifier stack folding tests from PR27481.

Differential Revision: https://reviews.llvm.org/D23276

llvm-svn: 278106
2016-08-09 09:32:34 +00:00
Artur Pilipenko adcd01f6cd [LVI] NFC. Fix a typo Bofore -> Before
llvm-svn: 278105
2016-08-09 09:14:29 +00:00
Craig Topper a10549d3e9 [X86] Reduce duplicated code in the execution domain lookup functions by passing tables as an argument.
llvm-svn: 278098
2016-08-09 05:26:09 +00:00
Craig Topper 92a4ff1294 [AVX-512] Add support for execution domain switching masked logical ops between floating point and integer domain.
This switches PS<->D and PD<->Q.

llvm-svn: 278097
2016-08-09 05:26:07 +00:00
Craig Topper 9bd6241106 [X86] Remove the Fv packed logical operation alias instructions. Replace them with patterns to the regular instructions.
This enables execution domain fixing which is why the tests changed.

llvm-svn: 278090
2016-08-09 03:06:33 +00:00
Craig Topper c09273b42b [X86] Cleanup patterns for AVX/SSE for PS operations. Always try to look for bitcasts from floating point types. If only AVX1 is supported we also need to handle integer types with floating point ops without looking for bitcasts.
Previously SSE1 had a pattern that looked for integer types without bitcasts, but the type wasn't legal with only SSE1 and SSE2 add an identical pattern for the integer instructions.

llvm-svn: 278089
2016-08-09 03:06:28 +00:00
Craig Topper de06b51d3d [X86] Remove unnecessary bitcast from the front of AVX1Only 256-bit logical operation patterns.
llvm-svn: 278088
2016-08-09 03:06:26 +00:00
Matthias Braun 7313ca6dbf X86InstrInfo: Update liveness in classifyLea()
We need to update liveness information when we create COPYs in
classifyLea().

This fixes http://llvm.org/28301

llvm-svn: 278086
2016-08-09 01:47:26 +00:00
Derek Schuff 53b9af02c8 [WebAssembly] Fix bugs in WebAssemblyLowerEmscriptenExceptions pass
* Delete extra '_' prefixes from JS library function names. fixImports()
  function in JS glue code deals with this for wasm.
* Change command-line option names in order to be consistent with
  asm.js.
* Add missing lowering code for llvm.eh.typeid.for intrinsics
* Delete commas in mangled function names
* Fix a function argument attributes bug. Because we add the pointer to
  the original callee as the first argument of invoke wrapper, all
  argument attribute indices have to be incremented by one.

Patch by Heejin Ahn

Differential Revision: https://reviews.llvm.org/D23258

llvm-svn: 278081
2016-08-09 00:29:55 +00:00
Sean Silva 5f6ec06f17 Consistently use CGSCCAnalysisManager
Besides a general consistently benefit, the extra layer of indirection
allows the mechanical part of https://reviews.llvm.org/D23256 that
requires touching every transformation and analysis to be factored out
cleanly.

Thanks to David for the suggestion.

llvm-svn: 278080
2016-08-09 00:28:56 +00:00
Sean Silva 0746f3bfa4 Consistently use LoopAnalysisManager
One exception here is LoopInfo which must forward-declare it (because
the typedef is in LoopPassManager.h which depends on LoopInfo).

Also, some includes for LoopPassManager.h were needed since that file
provides the typedef.

Besides a general consistently benefit, the extra layer of indirection
allows the mechanical part of https://reviews.llvm.org/D23256 that
requires touching every transformation and analysis to be factored out
cleanly.

Thanks to David for the suggestion.

llvm-svn: 278079
2016-08-09 00:28:52 +00:00
Sean Silva fd03ac6a0c Consistently use ModuleAnalysisManager
Besides a general consistently benefit, the extra layer of indirection
allows the mechanical part of https://reviews.llvm.org/D23256 that
requires touching every transformation and analysis to be factored out
cleanly.

Thanks to David for the suggestion.

llvm-svn: 278078
2016-08-09 00:28:38 +00:00
Sean Silva 36e0d01e13 Consistently use FunctionAnalysisManager
Besides a general consistently benefit, the extra layer of indirection
allows the mechanical part of https://reviews.llvm.org/D23256 that
requires touching every transformation and analysis to be factored out
cleanly.

Thanks to David for the suggestion.

llvm-svn: 278077
2016-08-09 00:28:15 +00:00
Saleem Abdulrasool 015280211b CodeView: extract the OMF Directory Header
The DebugDirectory contains a pointer to the CodeView info structure which is a
derivative of the OMF debug directory.  The structure has evolved a bit over
time, and PDB 2.0 used a slightly different definition from PDB 7.0.  Both of
these are specific to CodeView and not COFF.  Reflect this by moving the
structure definitions into the DebugInfo/CodeView headers.  Define a generic
DebugInfo union type that can be used to pass around a reference to the
DebugInfo irrespective of the versioning.  NFC.

llvm-svn: 278075
2016-08-09 00:25:12 +00:00
Sanjay Patel 06ba09af67 [x86] split combineVSelectWithAllOnesOrZeros into a helper function; NFCI
llvm-svn: 278074
2016-08-09 00:01:11 +00:00
Derek Schuff b7d6d9e3cd [WebAssembly] Fix CFI index to account for padding nullptr function
The WebAssembly linker now creates a dummy function at index 0 to
prevent miscomparisons with the NULL pointer, see
https://github.com/WebAssembly/binaryen/pull/658. Thanks to pcc for
pointing out this problem!

Patch by Dominic Chen

Differential Revision: https://reviews.llvm.org/D23137

llvm-svn: 278073
2016-08-08 23:56:01 +00:00
Rui Ueyama f53c8cb439 Revert "Do not ignore SizeOfOptionalHeader in COFF header even if PE header is not present."
This reverts commit r278066 to unbreak buildbots.

llvm-svn: 278070
2016-08-08 23:07:03 +00:00
Lang Hames 072728d419 Revert r278065 while I investigate some build-bot breakage.
llvm-svn: 278069
2016-08-08 22:57:30 +00:00
Rui Ueyama 776c6828a5 Do not ignore SizeOfOptionalHeader in COFF header even if PE header is not present.
Attribute SizeOfOptionalHeader is ignored if no PE header is present
in the file. This attribute should be ignored according to standard,
however there are uses of this field even though it should not be used.

This change does not conform to PE/COFF standard, but there are several
COFF files without PE header, where you had to add up SizeOfOptionalHeader
in order to get proper section headers. Other tools and their own parsers
do take this into account.

Patch by Marek Milkovič!

https://reviews.llvm.org/D22750

llvm-svn: 278066
2016-08-08 22:54:22 +00:00
Lang Hames 33c0b6bfca [RuntimeDyld][Orc][MCJIT] Add partial weak-symbol support to RuntimeDyld.
This patch causes RuntimeDyld to check for existing definitions when it
encounters weak symbols. If a definition already exists then the new weak
definition is discarded. All symbol lookups within a "logical dylib" should now
agree on the address of any given weak symbol. This allows the JIT to better
match the behavior of the static linker for C++ code.

This support is only partial, as it does not allow strong definitions that
occur after the first weak definition (in JIT symbol lookup order) to override
the previous weak definitions. Support for this will be added in a future
patch.

llvm-svn: 278065
2016-08-08 22:53:37 +00:00
Charles Davis e9c32c7ed3 Revert "[X86] Support the "ms-hotpatch" attribute."
This reverts commit r278048. Something changed between the last time I
built this--it takes awhile on my ridiculously slow and ancient
computer--and now that broke this.

llvm-svn: 278053
2016-08-08 21:20:15 +00:00
Justin Bogner 6b4422e6fe InstCombine: Remove a redundant #ifdef NDEBUG. NFC
The DEBUG() macro already does this.

llvm-svn: 278049
2016-08-08 21:02:11 +00:00
Charles Davis 0822aa118e [X86] Support the "ms-hotpatch" attribute.
Summary:
Based on two patches by Michael Mueller.

This is a target attribute that causes a function marked with it to be
emitted as "hotpatchable". This particular mechanism was originally
devised by Microsoft for patching their binaries (which they are
constantly updating to stay ahead of crackers, script kiddies, and other
ne'er-do-wells on the Internet), but is now commonly abused by Windows
programs to hook API functions.

This mechanism is target-specific. For x86, a two-byte no-op instruction
is emitted at the function's entry point; the entry point must be
immediately preceded by 64 (32-bit) or 128 (64-bit) bytes of padding.
This padding is where the patch code is written. The two byte no-op is
then overwritten with a short jump into this code. The no-op is usually
a `movl %edi, %edi` instruction; this is used as a magic value
indicating that this is a hotpatchable function.

Reviewers: majnemer, sanjoy, rnk

Subscribers: dberris, llvm-commits

Differential Revision: https://reviews.llvm.org/D19908

llvm-svn: 278048
2016-08-08 21:01:39 +00:00
Krzysztof Parzyszek 341cf3fbe5 [Hexagon] Add pattern for 64-bit mulhs
llvm-svn: 278040
2016-08-08 19:24:25 +00:00
Michael Zolotukhin 2f50725dbd [LoopUnroll] Simplify loops created by unrolling.
Summary:
Currently loop-unrolling doesn't preserve loop-simplified form. This patch
fixes it by resimplifying affected loops.

Reviewers: chandlerc, sanjoy, hfinkel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23148

llvm-svn: 278038
2016-08-08 19:02:15 +00:00
Mehdi Amini c137c28c8b RefreshCallGraph does not modify the SCC, adding "const" to make it clear (NFC)
llvm-svn: 278037
2016-08-08 18:51:05 +00:00
Geoff Berry 290a13e7c7 [MemorySSA] Fix windows build breakage caused by r278028
r278028: [MemorySSA] Ensure address stability of MemorySSA object.
llvm-svn: 278035
2016-08-08 18:27:22 +00:00
Nirav Dave f45fd2ba87 [X86] Improve code size on X86 segment moves
Moves of a value to a segment register from a 16-bit register is
equivalent to one from it's corresponding 32-bit register. Match gas's
behavior and rewrite instructions to the shorter of equivalent forms.

Reviewers: rnk, ab

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23166

llvm-svn: 278031
2016-08-08 18:01:04 +00:00
Geoff Berry cdf5333f6f [MemorySSA] Ensure address stability of MemorySSA object.
Summary:
Ensure that the MemorySSA object never changes address when using the
new pass manager since the walkers contained by MemorySSA cache pointers
to it at construction time.  This is achieved by wrapping the
MemorySSAAnalysis result in a unique_ptr.  Also add some asserts that
check for this bug.

Reviewers: george.burgess.iv, dberlin

Subscribers: mcrosier, hfinkel, chandlerc, silvas, llvm-commits

Differential Revision: https://reviews.llvm.org/D23171

llvm-svn: 278028
2016-08-08 17:52:01 +00:00
Oliver Stannard 8331aaee8f [ARM] Add support for embedded position-independent code
This patch adds support for some new relocation models to the ARM
backend:

* Read-only position independence (ROPI): Code and read-only data is accessed
  PC-relative. The offsets between all code and RO data sections are known at
  static link time. This does not affect read-write data.
* Read-write position independence (RWPI): Read-write data is accessed relative
  to the static base register (r9). The offsets between all writeable data
  sections are known at static link time. This does not affect read-only data.

These two modes are independent (they specify how different objects
should be addressed), so they can be used individually or together. They
are otherwise the same as the "static" relocation model, and are not
compatible with SysV-style PIC using a global offset table.

These modes are normally used by bare-metal systems or systems with
small real-time operating systems. They are designed to avoid the need
for a dynamic linker, the only initialisation required is setting r9 to
an appropriate value for RWPI code.

I have only added support to SelectionDAG, not FastISel, because
FastISel is currently disabled for bare-metal targets where these modes
would be used.

Differential Revision: https://reviews.llvm.org/D23195

llvm-svn: 278015
2016-08-08 15:28:31 +00:00
Zhan Jun Liau 4fbc3f4a37 [SystemZ] Add support for the .insn directive
Summary:
Add support for the .insn directive.

.insn is an s390 specific directive that allows encoding of an instruction
instead of using a mnemonic. The motivating case is some code in node.js that
requires support for the .insn directive.

Reviewers: koriakin, uweigand

Subscribers: koriakin, llvm-commits

Differential Revision: https://reviews.llvm.org/D21809

llvm-svn: 278012
2016-08-08 15:13:08 +00:00
Sebastian Pop bfb96c5bfd GVN-hoist: enable by default
llvm-svn: 278010
2016-08-08 14:46:15 +00:00
Artur Pilipenko eed618d5c0 [LVI] NFC. On the fast dest path use inverse predicate instead of inverse range result
Gathering constantins from a condition on the false path ask makeAllowedICmpRegion about inverse predicate instead of inversing the resulting range.

This change was separated from the review "[LVI] Make LVI smarter about comparisons with non-constants" (https://reviews.llvm.org/D23205#inline-198361)

llvm-svn: 278009
2016-08-08 14:33:11 +00:00
Artur Pilipenko 54b50cc1a8 [LVI] NFC. Rename confusing local NegOffset to Offset
NegOffset is not necessarily negative

llvm-svn: 278008
2016-08-08 14:13:56 +00:00
Artur Pilipenko 21472910c1 [LVI] NFC. Extract LHS, RHS, Predicate locals in getValueFromCondition
llvm-svn: 278007
2016-08-08 14:08:37 +00:00
Silviu Baranga fa00ba3c1a [AArch64] PR28877: Don't assume we're running after legalization when creating vcvtfp2fxs
Summary:
The DAG combine transformation that was generating the
aarch64_neon_vcvtfp2fxs node was assuming that all
inputs where legal and wasn't accounting that the input
could be a v4f64 if we're trying to do the transformation
before legalization. We now bail out in this case.

All illegal types besides v4f64 were already rejected.

Fixes https://llvm.org/bugs/show_bug.cgi?id=28877.

Reviewers: jmolloy

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D23261

llvm-svn: 278002
2016-08-08 13:13:57 +00:00
Daniel Sanders 3feeb9c851 Re-commit r277988: [mips][ias] Fix all the hacks related to MIPS-specific unary operators (%hi/%lo/%gp_rel/etc.).
Hopefully with the MSVC builds fixed. I've added a missing '#include <tuple>'
that gcc and clang don't seem to need.

llvm-svn: 277995
2016-08-08 11:50:25 +00:00
Simon Pilgrim 33fc788374 [X86][SSE] Assert if the shuffle mask indices are not -1 or within a valid input range
As discussed in post-review rL277959

llvm-svn: 277993
2016-08-08 11:07:34 +00:00
Daniel Sanders cae9aeed39 Revert r277988: [mips][ias] Fix all the hacks related to MIPS-specific unary operators (%hi/%lo/%gp_rel/etc.).
It seems that MSVC doesn't like std::tie().

llvm-svn: 277990
2016-08-08 09:33:14 +00:00
Daniel Sanders 2ab623b5a3 [mips][ias] Fix all the hacks related to MIPS-specific unary operators (%hi/%lo/%gp_rel/etc.).
Summary:
They are now lexed as a single token on targets where
MCAsmInfo::HasMipsExpressions is true and then parsed in a similar way to
the '~' operator as part of MCExpr::parseExpression.

As a result:
* expressions and immediates no longer have different parsing rules. The
  difference is now solely down to whether evaluateAsAbsolute() succeeds.
* %hi(%neg(%gp_rel(x))) are no longer parsed as a single operator and
  decomposed into the three MipsMCExpr nodes. They are parsed directly as
  three MipsMCExpr nodes.
  * parseMemOperand no longer needs to eat all the surrounding parenthesis
    to get at the outermost operator to make this work
* %hi(%neg(%gp_rel(x))) and %lo(%neg(%gp_rel(x))) are no longer the only
  3-in-1 relocs that parse for N64. They're still the only combinations that
  are permitted in relocatable expressions though. Fixing that should be a
  later patch.
* We no longer need to list all the tokens that can occur as the first token of
  an expression or immediate.

test/MC/Mips/expr1.s:
    This change also prevents the incorrect lowering of %lo(2*4)+foo to
    %lo(8+foo) which is not an equivalent expression (the difference is
    whether foo is truncated to 16-bit or not) and the test has been
    updated to account for the macro expansion the correct expression requires.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: https://reviews.llvm.org/D23110

llvm-svn: 277988
2016-08-08 09:20:52 +00:00
Diana Picus 4dd6c249ac [SelectionDAG] Refactor visitInlineAsm a bit. NFCI.
This shaves off ~100 lines from visitInlineAsm.

llvm-svn: 277987
2016-08-08 08:54:39 +00:00
Sean Silva 0873e7d218 Add some comments linking back to PR28400.
Thanks to Mehdi for the suggestion!

llvm-svn: 277984
2016-08-08 07:03:49 +00:00