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66147 Commits

Author SHA1 Message Date
Kevin Enderby ba985d9dd5 Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mc 
will accept versions that the darwin assembler allows.  Forms ending in "pi" and
forms without all the operands.

llvm-svn: 117427
 2010-10-27 00:59:28 +00:00
Jakob Stoklund Olesen 79e1407c11 Handle critical loop predecessors by making both inside and outside registers 
live out.

This doesn't prevent us from inserting a loop preheader later on, if that is
better.

llvm-svn: 117424
 2010-10-27 00:39:07 +00:00
Jakob Stoklund Olesen 795ed98180 Compute critical loop predecessors in the same way as critical loop exits. 
Critical edges going into a loop are not as bad as critical exits. We can handle
them by splitting the critical edge, or by having both inside and outside
registers live out of the predecessor.

llvm-svn: 117423
 2010-10-27 00:39:05 +00:00
Jakob Stoklund Olesen 0e7a011a00 Physical registers trivially have multiple connected components all the time. 
Only virtuals should be requires to be connected.

llvm-svn: 117422
 2010-10-27 00:39:01 +00:00
Jim Grosbach 2577b2e8b1 One more spot where the new arm mode LDR instruction representation 
doesn't need the additional addrmode2 register operand. Missed it the first
time around.

llvm-svn: 117421
 2010-10-27 00:38:16 +00:00
Wesley Peck e9b429e96f Adding disassembler to the MicroBlaze backend. 
llvm-svn: 117420
 2010-10-27 00:23:01 +00:00
Jim Grosbach 5a7c715470 Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on 
rdar://8477752.

llvm-svn: 117419
 2010-10-27 00:19:44 +00:00
Jim Grosbach a92801b695 Since I parameterized this bit, I should probably actually use said parameter. 
llvm-svn: 117418
 2010-10-26 23:58:04 +00:00
Dan Gohman 5faac39061 Enable clang autocompletion by default. 
llvm-svn: 117415
 2010-10-26 23:24:54 +00:00
Dale Johannesen e660f4d072 Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches 
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.

llvm-svn: 117413
 2010-10-26 23:11:10 +00:00
Andrew Trick 5f88cc34e1 Remove the vector of live vregs. I thought we would need to track 
them, but hopefully we won't. And this is not the right data structure
to do it anyway.

llvm-svn: 117412
 2010-10-26 22:58:24 +00:00
Owen Anderson 825b2d1946 Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and vqrshrun. 
llvm-svn: 117411
 2010-10-26 22:50:46 +00:00
Jim Grosbach 1e4d9a17c2 First part of refactoring ARM addrmode2 (load/store) instructions to be more 
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.

llvm-svn: 117409
 2010-10-26 22:37:02 +00:00
Jakob Stoklund Olesen e4f3317cda After splitting, compute connected components of all new registers, not just for 
the remainder register.

Example:

bb0:
  x = 1
bb1:
  use(x)
  ...
  x = 2
  jump bb1

When x is isolated in bb1, the inner part breaks into two components, x1 and x2:

bb0:
  x0 = 1
bb1:
  x1 = x0
  use(x1)
  ...
  x2 = 2
  x0 = x2
  jump bb1

llvm-svn: 117408
 2010-10-26 22:36:09 +00:00
Jakob Stoklund Olesen 260fa289df Verify that live intervals are connected. If there are multiple connected 
components, each should get its own virtual register.

llvm-svn: 117407
 2010-10-26 22:36:07 +00:00
Jakob Stoklund Olesen 022e7795cf Call RenumberValues for all new registers created during splitting. This is 
necessary to get correct hasPHIKill flags.

llvm-svn: 117406
 2010-10-26 22:36:05 +00:00
Jakob Stoklund Olesen 4453324e5b Preserve PHIDef bits in cloned values during splitting. 
llvm-svn: 117405
 2010-10-26 22:36:02 +00:00
Devang Patel 05561e8b7b Assign source ordering to nodes created for StoreInst. 
llvm-svn: 117404
 2010-10-26 22:14:52 +00:00
Owen Anderson 2888e2c7f9 Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn. 
llvm-svn: 117402
 2010-10-26 21:58:41 +00:00
Jim Grosbach 3fe94f1e9f FileCheck'ize 
llvm-svn: 117401
 2010-10-26 21:26:47 +00:00
Owen Anderson c4126a1a2c Add tests for NEON encoding of vshll. 
llvm-svn: 117399
 2010-10-26 21:21:47 +00:00
Owen Anderson e18579976f Simplify classes for shift instructions, which are never commutable. 
llvm-svn: 117398
 2010-10-26 21:13:59 +00:00
Owen Anderson 0fbb20769f Tests for NEON encoding of vshr. 
llvm-svn: 117396
 2010-10-26 21:08:42 +00:00
Owen Anderson 3665fee8de Provide correct NEON encodings for vshl, register and immediate forms. 
llvm-svn: 117394
 2010-10-26 20:56:57 +00:00
Jakob Stoklund Olesen b7050233fb Teach MachineBasicBlock::print() to annotate instructions and blocks with 
SlotIndexes when available.

llvm-svn: 117392
 2010-10-26 20:21:46 +00:00
Jakob Stoklund Olesen db594373bd Remmeber to print full live interval on verification error. 
llvm-svn: 117391
 2010-10-26 20:21:43 +00:00
Rafael Espindola c9fb35e73b Add support for .ident. 
llvm-svn: 117389
 2010-10-26 19:35:47 +00:00
Jim Grosbach 9302bfdd5a Grammar. 
llvm-svn: 117388
 2010-10-26 19:34:41 +00:00
Jim Grosbach 79b3bf4d81 Nuke extraneous comment. It's applicable elsewhere, but not in this func. 
llvm-svn: 117387
 2010-10-26 19:22:23 +00:00
Owen Anderson db192ba90f Tests for NEON encoding of vrecpe, vrecps, vrsqrte, and vsqrts. 
llvm-svn: 117385
 2010-10-26 18:43:13 +00:00
Andrew Trick 84aef49e32 Jakob's review of the basic register allocator. 
llvm-svn: 117384
 2010-10-26 18:34:01 +00:00
Owen Anderson b3bcf529fc Tests for NEON encodings of vpmin and vpmax. 
llvm-svn: 117382
 2010-10-26 18:31:47 +00:00
Owen Anderson 691ce68d3c Add correct NEON encoding for vpadal. 
llvm-svn: 117380
 2010-10-26 18:18:03 +00:00
Rafael Espindola d94f3b4ae9 handle X86::EH_RETURN64 and X86::EH_RETURN. 
llvm-svn: 117378
 2010-10-26 18:09:55 +00:00
Owen Anderson 035b3261ee Tests for NEON encoding of vpadd and vpaddl. 
llvm-svn: 117377
 2010-10-26 18:04:51 +00:00
Devang Patel b5694e702c s/beginScope/beginInstruction/g 
s/endScope/endInstruction/g

llvm-svn: 117376
 2010-10-26 17:49:02 +00:00
Owen Anderson 284cb361d1 Add NEON encodings for vmov and vmvn of immediates. 
llvm-svn: 117374
 2010-10-26 17:40:54 +00:00
Jakob Stoklund Olesen 9eabfa3a39 Don't verify physical registers going into landing pads. 
Magic is happening that we don't understand.

llvm-svn: 117370
 2010-10-26 16:49:23 +00:00
Rafael Espindola e8ae98817a Implement some relaxations for arithmetic instructions. The limitation 
on RIP relative relocations looks artificial, but this is a superset of
what we were able to do before.

llvm-svn: 117364
 2010-10-26 14:09:12 +00:00
Duncan Sands 406e6f59b8 Yet another thing that was forgotten to be added to the release notes... 
llvm-svn: 117362
 2010-10-26 12:43:36 +00:00
Kalle Raiskila a49d062234 Change v64 datalayout in SPU. 
The SPU ABI does not mention v64, and all examples
in C suggest v128 are treated similarily to arrays, 
we use array alignment for v64 too. This makes the 
alignment of e.g. [2 x <2 x i32>] behave "intuitively"
and similar to as if the elements were e.g. i32s.

This also makes an "unaligned store" test to be 
aligned, with different (but functionally equivalent)
code generated.

llvm-svn: 117360
 2010-10-26 10:45:47 +00:00
NAKAMURA Takumi 4bb599cf7d CMake: Build utils/KillTheDoctor only on MSVC for now. 
Mingw does not have the header <dbghelp.h>.
Thanks to Daniel Newton, testing it on mingw.

llvm-svn: 117352
 2010-10-26 05:08:27 +00:00
Evan Cheng e96b8d7ab6 Use instruction itinerary to determine what instructions are 'cheap'. 
llvm-svn: 117348
 2010-10-26 02:08:50 +00:00
Evan Cheng b45591979b NEON vmov's are in Neon domain. 
llvm-svn: 117347
 2010-10-26 02:03:05 +00:00
Nick Lewycky 90b2ac2696 For statistics that are only used in functions declared in !NDEBUG, wrap the 
declarations in !NDEBUG to avoid -Wunused-variable warnings. Patch by
Matt Beaumont-Gay!

llvm-svn: 117345
 2010-10-26 00:51:57 +00:00
Jakob Stoklund Olesen e2c340c8d0 InlineSpiller can also update LiveStacks. 
llvm-svn: 117338
 2010-10-26 00:11:35 +00:00
Jakob Stoklund Olesen 7cdc1e5f16 Make the spiller responsible for updating the LiveStacks analysis. 
llvm-svn: 117337
 2010-10-26 00:11:33 +00:00
Bob Wilson e1961fe289 When the "true" and "false" blocks of a diamond if-conversion are the same, 
do not double-count the duplicate instructions by counting once from the
beginning and again from the end.  Keep track of where the duplicates from
the beginning ended and don't go past that point when counting duplicates
at the end.  Radar 8589805.

This change causes one of the MC/ARM/simple-fp-encoding tests to produce
different (better!) code without the vmovne instruction being tested.
I changed the test to produce vmovne and vmoveq instructions but moving
between register files in the opposite direction.  That's not quite the same
but predicated versions of those instructions weren't being tested before,
so at least the test coverage is not any worse, just different.

llvm-svn: 117333
 2010-10-26 00:02:24 +00:00
Bob Wilson efd360c535 Change if-conversion to keep track of the extra cost due to microcoded 
instructions separately from the count of non-predicated instructions.  The
instruction count is used in places to determine how many instructions to
copy, predicate, etc. and things get confused if that count includes the
extra cost for microcoded ops.

llvm-svn: 117332
 2010-10-26 00:02:21 +00:00
Bob Wilson 59f7cdaf98 Tidy up redundant check. 
llvm-svn: 117331
 2010-10-26 00:02:19 +00:00