3374835b46
MCAssembler: Switch MCAsmFixup to storing MCFixupKind instead of just a size.
...
llvm-svn: 96094
2010-02-13 09:28:54 +00:00
97867a9cfc
MCAssembler: Sink fixup list into MCDataFragment.
...
llvm-svn: 96093
2010-02-13 09:28:43 +00:00
056bc60336
MCAssembler: Switch MCFillFragment to only taking constant values. Symbolic expressions can always be emitted as data + fixups.
...
llvm-svn: 96092
2010-02-13 09:28:32 +00:00
1a1fbb50fc
MC/Mach-O: Implement EmitValue using data fragments + fixups instead of fill fragment.
...
llvm-svn: 96091
2010-02-13 09:28:22 +00:00
8e53203154
MCAssembler: Start applying fixups in the data section.
...
llvm-svn: 96090
2010-02-13 09:28:15 +00:00
bedf1d4a41
MCAssembler: Add assorted dump() methods.
...
llvm-svn: 96089
2010-02-13 09:28:03 +00:00
2610a34b15
X86: Move extended MCFixupKinds into X86FixupKinds.h
...
llvm-svn: 96088
2010-02-13 09:27:52 +00:00
42c66b7270
Split some code out to a helper function (FindReusablePredBB)
...
and add a doxygen comment.
Cache the phi entry to avoid doing tons of
PHINode::getBasicBlockIndex calls in the common case.
On my insane testcase from re2c, this speeds up CGP from
617.4s to 7.9s (78x).
llvm-svn: 96083
2010-02-13 05:35:08 +00:00
5e7f705934
Speed up codegen prepare from 3.58s to 0.488s.
...
llvm-svn: 96081
2010-02-13 05:01:14 +00:00
72c4dce884
PHINode::getBasicBlockIndex is O(n) in the number of inputs
...
to a PHI, avoid it in the common case where the BB occurs
in the same index for multiple phis. This speeds up CGP on
an insane testcase from 8.35 to 3.58s.
llvm-svn: 96080
2010-02-13 04:24:19 +00:00
b0ebb65ab0
iterate over preds using PHI information when available instead of
...
using pred_begin/end. It is much faster.
llvm-svn: 96079
2010-02-13 04:15:26 +00:00
96b8826542
speed up CGP a bit by scanning predecessors through phi operands
...
instead of with pred_begin/end.
llvm-svn: 96078
2010-02-13 04:04:42 +00:00
f83726f6ba
add encoder support and tests for rdtscp
...
llvm-svn: 96076
2010-02-13 03:42:24 +00:00
52a6ab3ba7
Add SETEND and BXJ instructions for disassembly only.
...
llvm-svn: 96075
2010-02-13 02:51:09 +00:00
4d804d794f
Added the rdtscp instruction to the x86 instruction
...
tables.
llvm-svn: 96073
2010-02-13 02:06:11 +00:00
b659c76c77
Fix PR6283.
...
When coalescing with a physreg, remember to add imp-def and imp-kill when
dealing with sub-registers.
Also fix a related bug in VirtRegRewriter where substitutePhysReg may
reallocate the operand list on an instruction and invalidate the reg_iterator.
This can happen when a register is mentioned twice on the same instruction.
llvm-svn: 96072
2010-02-13 02:06:10 +00:00
5b18f039eb
Fix a pruning heuristic which implicitly assumed that SmallPtrSet is
...
deterministically sorted.
llvm-svn: 96071
2010-02-13 02:06:02 +00:00
3b065cdb64
Teach MachineFrameInfo to track maximum alignment while stack objects are being
...
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.
llvm-svn: 96069
2010-02-13 01:56:41 +00:00
492b8b42cd
Enable the inlinehint attribute in the Inliner.
...
Functions explicitly marked inline will get an inlining threshold slightly
more aggressive than the default for -O3. This means than -O3 builds are
mostly unaffected while -Os builds will be a bit bigger and faster.
The difference depends entirely on how many 'inline's are sprinkled on the
source.
In the CINT2006 suite, only these tests are significantly affected under -Os:
Size Time
471.omnetpp +1.63% -1.85%
473.astar +4.01% -6.02%
483.xalancbmk +4.60% 0.00%
Note that 483.xalancbmk runs too quickly to give useful timing results.
llvm-svn: 96066
2010-02-13 01:51:53 +00:00
44232af55a
Fixed encodings for invlpg, invept, and invvpid.
...
llvm-svn: 96065
2010-02-13 01:48:34 +00:00
d0c6d361fe
MC/AsmParser: Attempt to constant fold expressions up-front. This ensures we avoid fixups for obvious cases like '-(16)'.
...
llvm-svn: 96064
2010-02-13 01:28:07 +00:00
b0208d2a06
Added a bunch of saturating add/subtract instructions for disassembly only.
...
llvm-svn: 96063
2010-02-13 01:21:01 +00:00
509154e0f9
rip out the 'heinous' x86 MCCodeEmitter implementation.
...
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
llvm-svn: 96059
2010-02-13 00:49:29 +00:00
140caa7240
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
...
fix swapgs to be spelled right.
llvm-svn: 96058
2010-02-13 00:41:14 +00:00
01abf8fc2f
Besides removing phi cycles that reduce to a single value, also remove dead
...
phi cycles. Adjust a few tests to keep dead instructions from being optimized
away. This (together with my previous change for phi cycles) fixes Apple
radar 7627077.
llvm-svn: 96057
2010-02-13 00:31:44 +00:00
fe873e7c10
Override dominates and properlyDominates for SCEVAddRecExpr, as a
...
SCEVAddRecExpr doesn't necessarily dominate blocks merely dominated
by all of its operands. This fixes an abort compiling 403.gcc.
llvm-svn: 96056
2010-02-13 00:19:39 +00:00
224340cabe
MC/X86: Push immediate operands as immediates not expressions when possible.
...
llvm-svn: 96055
2010-02-13 00:17:21 +00:00
01f88a96c5
Make PassRegistrar thread-safe since it can be modified by code running in
...
separate LLVMContexts.
llvm-svn: 96051
2010-02-13 00:03:17 +00:00
064e926362
Remove special cases for [LM]FENCE, MONITOR and MWAIT from
...
encoder and decoder by using new MRM_ forms.
llvm-svn: 96048
2010-02-12 23:54:57 +00:00
1e827fd8ca
implement the rest of correct x86-64 encoder support for
...
rip-relative addresses, and add a testcase.
llvm-svn: 96040
2010-02-12 23:24:09 +00:00
626b79d6a6
Add the problem I just hacked around in 96015/96020.
...
The solution there produces correct code, but is seriously
deficient in several ways.
llvm-svn: 96039
2010-02-12 23:16:24 +00:00
741580a5bd
give MCCodeEmitters access to the current MCContext.
...
llvm-svn: 96038
2010-02-12 23:12:47 +00:00
2d36eb6e18
Make JIT::runFunction clean up the generated stub function.
...
Patch by Shivram K!
llvm-svn: 96037
2010-02-12 23:05:31 +00:00
4ad96055fb
implement infrastructure to support fixups for rip-rel
...
addressing. This isn't complete because I need an MCContext
to generate new MCExprs.
llvm-svn: 96036
2010-02-12 23:00:36 +00:00
29a9103ee6
Add YIELD, WFE, WFI, and SEV instructions for disassembly only.
...
Plus add two formats: MiscFrm and ThumbMiscFrm. Some of the for disassembly
only instructions are changed from Pseudo Format to MiscFrm Format.
llvm-svn: 96032
2010-02-12 22:53:19 +00:00
d18320361f
pull the rip-relative addressing mode case up early.
...
llvm-svn: 96031
2010-02-12 22:47:55 +00:00
6c1c0141be
fixme resolved!
...
llvm-svn: 96029
2010-02-12 22:39:06 +00:00
0055e75249
start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls.
...
llvm-svn: 96028
2010-02-12 22:36:47 +00:00
12455ca03d
enhance the immediate field encoding to know whether the immediate
...
is pc relative or not, mark call and branches as pcrel.
llvm-svn: 96026
2010-02-12 22:27:07 +00:00
439bda9d3f
Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case.
...
llvm-svn: 96023
2010-02-12 22:17:21 +00:00
cb39340b81
This should have gone in with 26015, see comments there.
...
llvm-svn: 96020
2010-02-12 22:00:40 +00:00
dc2051c802
Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only.
...
llvm-svn: 96019
2010-02-12 21:59:23 +00:00
26062150fa
When save/restoring CR at prolog/epilog, in a large
...
stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot. Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.
SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.
Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.
llvm-svn: 96015
2010-02-12 21:35:34 +00:00
392be58cad
Add support for a union type in LLVM IR. Patch by Talin!
...
llvm-svn: 96011
2010-02-12 20:49:41 +00:00
bdf1b9520c
Add SWP (Swap) and SWPB (Swap Byte) for disassembly only.
...
llvm-svn: 96010
2010-02-12 20:48:24 +00:00
545d36019b
Also recognize armv6t2-* and armv5te-* triplets.
...
llvm-svn: 96008
2010-02-12 20:39:35 +00:00
1a8674e60b
Fix a case of mismatched types in an Add that turned up in 447.dealII.
...
llvm-svn: 96007
2010-02-12 20:39:25 +00:00
9aa30fbe02
Add ARM bitcode file magic.
...
llvm-svn: 96006
2010-02-12 20:13:44 +00:00
2b75de97c0
Reapply 95979, a compile-time speedup, now that the bug it exposed is fixed.
...
llvm-svn: 96005
2010-02-12 19:35:25 +00:00
363f847ec6
Fix this code to avoid dereferencing an end() iterator in
...
offset distributions it doesn't expect.
llvm-svn: 96002
2010-02-12 19:20:37 +00:00
cf20cbec49
Add CPS, MRS, MRSsys, MSR, MSRsys for disassembly only.
...
llvm-svn: 95999
2010-02-12 18:55:33 +00:00
30d99f4b9b
Rewrite handling of DBG_VALUE; previous algorithm
...
didn't handle
X =
Y<dead> = use X
DBG_VALUE(X)
I was hoping to avoid this approach as it's slower,
but I don't think it can be done.
llvm-svn: 95996
2010-02-12 18:40:17 +00:00
75879be9d8
1. modernize the constantmerge pass, using densemap/smallvector.
...
2. don't bother trying to merge globals in non-default sections,
doing so is quite dubious at best anyway.
3. fix a bug reported by Arnaud de Grandmaison where we'd try to
merge two globals in different address spaces.
llvm-svn: 95995
2010-02-12 18:17:23 +00:00
e0b2c69d3c
Revert "Reverse the order for collecting the parts of an addrec. The order", it
...
is breaking llvm-gcc bootstrap.
llvm-svn: 95988
2010-02-12 17:27:08 +00:00
c3c357006e
Setup correct data layout to match gcc's expectations on mingw32.
...
llvm-svn: 95981
2010-02-12 15:28:56 +00:00
c9276dfe04
Cleanup stdcall / fastcall name mangling.
...
This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936
llvm-svn: 95980
2010-02-12 15:28:40 +00:00
0194f58047
Reverse the order for collecting the parts of an addrec. The order
...
doesn't matter, except that ScalarEvolution tends to need less time
to fold the results this way.
llvm-svn: 95979
2010-02-12 11:08:26 +00:00
45774ce0ad
Reapply the new LoopStrengthReduction code, with compile time and
...
bug fixes, and with improved heuristics for analyzing foreign-loop
addrecs.
This change also flattens IVUsers, eliminating the stride-oriented
groupings, which makes it easier to work with.
llvm-svn: 95975
2010-02-12 10:34:29 +00:00
c7ef4cc9fc
* Updated the cost matrix normalization proceedure to better handle infinite costs.
...
* Enabled R1/R2 application for nodes with infinite spill costs in the Briggs heuristic (made
safe by the changes to the normalization proceedure).
* Removed a redundant header.
llvm-svn: 95973
2010-02-12 09:43:37 +00:00
f7477e599f
add a bunch of mod/rm encoding types for fixed mod/rm bytes.
...
This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.
llvm-svn: 95960
2010-02-12 02:06:33 +00:00
44ac89f517
revert r95949, it turns out that adding new prefixes is not a
...
great solution for the disassembler, we'll go with "plan b".
llvm-svn: 95957
2010-02-12 01:55:31 +00:00
905a2d7727
Added coprocessor Instructions CDP, CDP2, MCR, MCR2, MRC, MRC2, MCRR, MCRR2,
...
MRRC, MRRc2. For disassembly only.
llvm-svn: 95955
2010-02-12 01:44:23 +00:00
0827e040e0
Add a new pass on machine instructions to optimize away PHI cycles that
...
reduce down to a single value. InstCombine already does this transformation
but DAG legalization may introduce new opportunities. This has turned out to
be important for ARM where 64-bit values are split up during type legalization:
InstCombine is not able to remove the PHI cycles on the 64-bit values but
the separate 32-bit values can be optimized. I measured the compile time
impact of this (running llc on 176.gcc) and it was not significant.
llvm-svn: 95951
2010-02-12 01:30:21 +00:00
d7e9212e2d
X86: Fix definition for RCL/RCR.*m? operations -- they were getting represented
...
with "tied memory operands", which is wrong.
llvm-svn: 95950
2010-02-12 01:22:03 +00:00
336f9abb45
add another bit of space for new kinds of instruction prefixes.
...
llvm-svn: 95949
2010-02-12 01:15:16 +00:00
c780af6471
Add a missing pattern for movhps so that we get:
...
movq (%ecx,%edx,2), %xmm2
movhps (%ecx,%eax,2), %xmm2
rather than:
movq (%eax, %edx, 2), %xmm2
movq (%eax, %ebx, 2), %xmm3
movlhps %xmm3, %xmm2
Testcase forthcoming.
llvm-svn: 95948
2010-02-12 01:10:45 +00:00
1572e760bc
fix the encodings of monitor and mwait, which were completely
...
busted in both encoders. I'm not bothering to fix it in the
old one at this point.
llvm-svn: 95947
2010-02-12 01:06:22 +00:00
62f50dad8d
improve support for minix, PR6280, patch by
...
Kees van Reeuwijk!
llvm-svn: 95946
2010-02-12 00:37:46 +00:00
be5557e86b
Add a new function attribute, 'alignstack'. It will indicate (when the backends
...
implement support for it) that the stack should be forcibly realigned in the
prologue (and the process reversed in the epilogue).
llvm-svn: 95945
2010-02-12 00:31:15 +00:00
93c92225af
Reapply coalescer fix for better cross-class coalescing.
...
This time with fixed test cases.
llvm-svn: 95938
2010-02-11 23:55:29 +00:00
b1913c4df9
enhance llvm-mc -show-inst to print the enum of an instruction, like so:
...
testb %al, %al ## <MCInst #2412 TEST8rr
## <MCOperand Reg:2>
## <MCOperand Reg:2>>
jne LBB1_7 ## <MCInst #938 JNE_1
## <MCOperand Expr:(LBB1_7)>>
llvm-svn: 95935
2010-02-11 22:57:32 +00:00
524138176d
add a new MCInstPrinter::getOpcodeName interface, when it is
...
implemented, llvm-mc --show-inst now uses it to print the
instruction opcode as well as the number.
llvm-svn: 95929
2010-02-11 22:39:10 +00:00
b8af65ed0b
improve encoding information for branches. We now know they have
...
8 or 32-bit immediates, which allows the new encoder to handle
them.
llvm-svn: 95927
2010-02-11 21:45:31 +00:00
1d34759721
MC: Move assembler-backend's fixup list into the fragment.
...
llvm-svn: 95926
2010-02-11 21:29:46 +00:00
ee82e763e6
MC: Move MCSectionData::Fixup out to MCAsmFixup.
...
llvm-svn: 95925
2010-02-11 21:29:29 +00:00
ddeceae839
make getFixupKindInfo return a const reference, allowing
...
the tables to be const. Teach MCCodeEmitter to handle
the target-indep kinds so that we don't crash on them.
llvm-svn: 95924
2010-02-11 21:27:18 +00:00
0d642824d6
Revert functional change. This broke a bunch of tests.
...
llvm-svn: 95921
2010-02-11 21:19:44 +00:00
2a34015abc
switch to target-indep fixups for 1/2/4/8 byte data.
...
llvm-svn: 95920
2010-02-11 21:17:54 +00:00
c07f1f4f7b
revert 95903.
...
llvm-svn: 95918
2010-02-11 20:58:56 +00:00
28139f0043
It is always good to do a cross-class join when the large register has a tiny interval.
...
Also avoid division by zero.
llvm-svn: 95917
2010-02-11 20:58:45 +00:00
af88c0a84d
Added LDRT/LDRBT/STRT/STRBT for disassembly only.
...
llvm-svn: 95916
2010-02-11 20:31:08 +00:00
1f298326b0
unbreak the build.
...
llvm-svn: 95915
2010-02-11 19:52:11 +00:00
11ddc679ca
Destroy MDNodes while destructing llvm context.
...
llvm-svn: 95903
2010-02-11 19:35:10 +00:00
2b0a7a2592
refactor the conditional jump instructions in the .td file to
...
use a multipattern that generates both the 1-byte and 4-byte
versions from the same defm
llvm-svn: 95901
2010-02-11 19:25:55 +00:00
3964059a16
Forgot to also check in this file for vcvt (floating-point <-> fixed-point, VFP).
...
Sorry!
llvm-svn: 95892
2010-02-11 18:47:03 +00:00
177ced3953
Allow for more than one DBG_VALUE targeting the
...
same dead instruction.
llvm-svn: 95890
2010-02-11 18:23:23 +00:00
12565de705
Don't allow DBG_VALUE to affect codegen.
...
llvm-svn: 95889
2010-02-11 18:22:31 +00:00
2588efd071
Added VCVT (between floating-point and fixed-point, VFP) for disassembly.
...
A8.6.297
llvm-svn: 95885
2010-02-11 18:17:16 +00:00
f40b8e03fb
Added BKPT/tBKPT (breakpoint) to the instruction table for disassembly purpose.
...
llvm-svn: 95884
2010-02-11 18:12:29 +00:00
45396438c3
Use array_pod_sort instead of std::sort for improved code size.
...
Use SmallVector instead of std::vector for better speed when indirectbr has
few successors.
llvm-svn: 95879
2010-02-11 18:06:56 +00:00
cccdc13662
Make sure that ConstantExpr offsets also aren't off of extern
...
symbols.
Thanks to Duncan Sands for the testcase!
llvm-svn: 95877
2010-02-11 17:44:04 +00:00
9c13dfb5dd
Add pseudo instruction TRAP for disassembly, which is encoded according to A5-21
...
as the "Permanently UNDEFINED" instruction.
llvm-svn: 95873
2010-02-11 17:14:31 +00:00
243e1f21db
Use .empty() instead of .size().
...
llvm-svn: 95871
2010-02-11 10:37:57 +00:00
fbf1f02fee
dont' call getX86RegNum on X86::RIP, it doesn't like that. This
...
fixes the remaining x86-64 jit failures afaik.
llvm-svn: 95867
2010-02-11 08:45:56 +00:00
5a4ec879bf
fix a really nasty bug I introduced in r95693: r12 (and r12d,
...
r12b, etc) also encodes to a R/M value of 4, which is just
as illegal as ESP/RSP for the non-sib version an address.
This fixes x86-64 jit miscompilations of a bunch of programs.
llvm-svn: 95866
2010-02-11 08:41:21 +00:00
6bb2463f85
Add and commonize encoder support for all immediates.
...
Stub out some dummy fixups to make things work.
We can now emit fixups like this:
subl $20, %esp ## encoding: [0x83,0xec,A]
## fixup A - offset: 2, value: 20, kind: fixup_1byte_imm
Emitting $20 as a single-byte fixup to be later resolved
by the assembler is ridiculous of course (vs just emitting
the byte) but this is a failure of the matcher, which
should be producing an imm of 20, not an MCExpr of 20.
llvm-svn: 95860
2010-02-11 07:06:31 +00:00
167842f90b
generalize EmitDisplacementField to work with any size
...
and rename it to EmitImmediate.
llvm-svn: 95859
2010-02-11 06:54:23 +00:00
3555993312
eliminate the dead IsPCRel argument.
...
llvm-svn: 95858
2010-02-11 06:51:36 +00:00
5a40e6c95c
eliminate the dead "PCAdj" logic.
...
llvm-svn: 95857
2010-02-11 06:49:52 +00:00
c660b23075
Fix some of the memcheck errors found in the JIT unittests.
...
llvm-svn: 95856
2010-02-11 06:41:30 +00:00
4e8137d678
Rename ValueRequiresCast to ShouldOptimizeCast, to better reflect
...
what it does. Enhance it to return false to optimizing vector
sign extensions from vector comparisions, which is the idiom used
to get a splatted vector for a vector comparison.
Doing this breaks vector-casts.ll, add some compensating
transformations to handle the important case they cover without
depending on this canonicalization.
This fixes rdar://7434900 a serious pessimization of vector compares.
llvm-svn: 95855
2010-02-11 06:26:33 +00:00
c053cbbc4d
Make DSE only scan blocks that are reachable from the entry
...
block. Other blocks may have pointer cycles that will crash
basicaa and other alias analyses. In any case, there is no
point wasting cycles optimizing dead blocks. This fixes
rdar://7635088
llvm-svn: 95852
2010-02-11 05:11:54 +00:00
d924f63692
Make jump threading honor x|undef -> true and x&undef -> false,
...
instead of considering x|undef -> x, which may not be true.
llvm-svn: 95850
2010-02-11 04:40:44 +00:00
531ea566a6
Add ConstantExpr handling to Intrinsic::objectsize lowering.
...
Update testcase accordingly now that we can optimize another
section.
llvm-svn: 95846
2010-02-11 01:48:54 +00:00
7c2005aa6d
Fix to get it to compile.
...
llvm-svn: 95840
2010-02-11 01:15:27 +00:00
6034260c43
Don't print out a default newline when emitting the section offset. There are
...
almost always comments afterwards that need printing.
llvm-svn: 95839
2010-02-11 01:13:02 +00:00
e0913883b7
Make it possible to create multiple JIT instances at the same time, by removing
...
the global TheJIT and TheJITResolver variables. Lazy compilation is supported
by a global map from a stub address to the JITResolver that knows how to
compile it.
Patch by Olivier Meurant!
llvm-svn: 95837
2010-02-11 01:07:39 +00:00
75521cab3e
Reuse operand location when updating PHI instructions.
...
Calling RemoveOperand is very expensive on huge PHI instructions. This makes
early tail duplication run twice as fast on the Firefox JavaScript
interpreter.
llvm-svn: 95832
2010-02-11 00:34:33 +00:00
896428d630
Remove duplicate successors from indirectbr instructions before building the machine CFG.
...
This makes early tail duplication run 60 times faster when compiling the Firefox
JavaScript interpreter, see PR6186.
llvm-svn: 95831
2010-02-11 00:34:18 +00:00
03936a1880
Ignore dbg info intrinsics.
...
llvm-svn: 95828
2010-02-11 00:20:49 +00:00
5b77f0dac1
The previous fix of widening divides that trap was too fragile as it depends on custom
...
lowering and requires that certain types exist in ValueTypes.h. Modified widening to
check if an op can trap and if so, the widening algorithm will apply only the op on
the defined elements. It is safer to do this in widening because the optimizer can't
guarantee removing unused ops in some cases.
llvm-svn: 95823
2010-02-10 23:37:45 +00:00
af3fe99821
Ignore debug info one more place during coalescing.
...
llvm-svn: 95819
2010-02-10 23:04:09 +00:00
0f52d0c074
Delete dead PHI machine instructions. These can be created due to type
...
legalization even when the IR-level optimizer has removed dead phis, such
as when the high half of an i64 value is unused on a 32-bit target.
I had to adjust a few test cases that had dead phis.
This is a partial fix for Radar 7627077.
llvm-svn: 95816
2010-02-10 22:58:57 +00:00
8bba1608bd
Skip debug info in a couple of places.
...
llvm-svn: 95814
2010-02-10 21:47:48 +00:00
7742b6406b
Use an index instead of pointers into the vector. If the vector resizes, then
...
the pointer values could be invalid.
llvm-svn: 95813
2010-02-10 21:41:57 +00:00
1ccda7b7c4
When I rewrote this loop per Chris' preference I
...
changed its behavior. Oops.
llvm-svn: 95811
2010-02-10 21:41:41 +00:00
4d4c6944e9
A few missed optimizations; the last one could have a significant impact on
...
code with lots of bitfields.
llvm-svn: 95809
2010-02-10 21:26:04 +00:00
211746a69a
Strip new llvm.dbg.value intrinsic.
...
llvm-svn: 95807
2010-02-10 21:19:56 +00:00
3e0c9790f2
MC/X86 AsmMatcher: Fix a use after free spotted by d0k, and de-XFAIL
...
x86_32-encoding.s in on expectation of it passing.
llvm-svn: 95806
2010-02-10 21:19:28 +00:00
bd11c41b91
Minor whitespace cleanups.
...
llvm-svn: 95801
2010-02-10 20:42:57 +00:00
c42c5243a1
Use an AssemblyAnnotatorWriter to clean up IVUsers' debug output.
...
The "uses=" comments are just clutter in this context.
llvm-svn: 95799
2010-02-10 20:42:37 +00:00
e34890f921
Add a hook to AssemblyAnnotationWriter to allow custom info comments
...
to be printed, in place of the familiar "uses=" comments.
llvm-svn: 95798
2010-02-10 20:41:46 +00:00
97c5902e78
Fix several comments which had previously been "the the" where a
...
different word was intended.
llvm-svn: 95795
2010-02-10 20:04:19 +00:00
c7e14704d0
Added NOP, DBG, SVC to the instruction table for disassembly purpose.
...
llvm-svn: 95784
2010-02-10 18:02:25 +00:00
4a618827de
Fix "the the" and similar typos.
...
llvm-svn: 95781
2010-02-10 16:03:48 +00:00
de03bd0ab4
emit some simple (and probably incorrect) fixups for symbolic
...
displacement values.
llvm-svn: 95773
2010-02-10 06:52:12 +00:00
f58d0074d7
keep track of what the current byte being emitted is
...
throughout the X86 encoder.
llvm-svn: 95771
2010-02-10 06:41:02 +00:00
a725d785a9
simplify displacement handling, emit displacements by-operand
...
even for the immediate case. No functionality change.
llvm-svn: 95770
2010-02-10 06:30:00 +00:00
183a423af9
Canonicalize sizeof and alignof on pointer types to a canonical
...
pointer type.
llvm-svn: 95769
2010-02-10 06:13:07 +00:00
605474463f
MC: Switch MCFixup to just hold an MCExpr pointer instead of index into the
...
MCInst it came from.
llvm-svn: 95767
2010-02-10 04:47:08 +00:00
29b8f554fc
Now that ShrinkDemandedOps() is separated out from DAG combine. It sometimes leave some obvious nops which dag combine used to clean up afterwards e.g. (trunk (ext n)) -> n. Look for them and squash them.
...
llvm-svn: 95757
2010-02-10 02:17:34 +00:00
75c9a4eeae
llvm-mc: Remove --show-fixups and always show as part of --show-encoding.
...
Also, fix a silly memory leak.
llvm-svn: 95752
2010-02-10 01:41:14 +00:00
f8b0e44584
Rewrite loop to suit Chris' preference.
...
llvm-svn: 95749
2010-02-10 01:31:26 +00:00
ea26fa9971
fix a layering violation: VirtRegRewriter.cpp shouldn't use AsmPrinter.h.
...
llvm-svn: 95748
2010-02-10 01:23:18 +00:00
0a75ceee38
Remove duplicated #include.
...
llvm-svn: 95747
2010-02-10 01:22:57 +00:00
3ebd551aac
Emit an error for illegal inline asm constraint (which uses illegal type) rather than asserting.
...
llvm-svn: 95746
2010-02-10 01:21:02 +00:00
c9505b68c8
fix missing #includes.
...
llvm-svn: 95745
2010-02-10 01:17:36 +00:00
69920c5c8a
daniel *really* likes fixups!
...
llvm-svn: 95742
2010-02-10 01:05:28 +00:00
a0cd0e11c9
Improve comments a even more.
...
llvm-svn: 95740
2010-02-10 00:59:47 +00:00
f8f9f55468
Skip DBG_VALUE many places in live intervals and
...
register coalescing. This fixes many crashes and
places where debug info affects codegen (when
dbg.value is lowered to machine instructions, which
it isn't yet in TOT).
llvm-svn: 95739
2010-02-10 00:55:42 +00:00
74e6852510
Move verbose asm instruction comments to using MCStreamer.
...
The major win of this is that the code is simpler and they
print on the same line as the instruction again:
movl %eax, 96(%esp) ## 4-byte Spill
movl 96(%esp), %eax ## 4-byte Reload
cmpl 92(%esp), %eax ## 4-byte Folded Reload
jl LBB7_86
llvm-svn: 95738
2010-02-10 00:47:53 +00:00
b188e92ca9
Improve comments a bit more.
...
llvm-svn: 95737
2010-02-10 00:45:28 +00:00
222c75bea2
more comment updates
...
llvm-svn: 95736
2010-02-10 00:44:23 +00:00
d40d42c9e5
Add isDebug argument to ChangeToRegister; this prevents
...
the field from being used uninitialized later in some cases.
llvm-svn: 95735
2010-02-10 00:41:49 +00:00
ff68a42121
print all the newlines at the end of instructions with
...
OutStreamer.AddBlankLine instead of textually.
llvm-svn: 95734
2010-02-10 00:36:00 +00:00
08f618cd03
IntegerValType holds a uint32_t, so its constructor should take a uint32_t. This allows it to be properly initialized with bit widths > 65535
...
llvm-svn: 95731
2010-02-10 00:14:03 +00:00
3d1f1cccbb
Fix comments to reflect renaming elsewhere.
...
llvm-svn: 95730
2010-02-10 00:11:11 +00:00
a7c1d6cfd1
Fix the encoding of the movntdqa X86 instruction. It was missing the 0x66
...
prefix which is part of the opcode encoding.
llvm-svn: 95729
2010-02-10 00:10:31 +00:00
482bf69bfe
Add ability for MCInstPrinters to add comments for instructions.
...
Enhance the x86 backend to show the hex values of immediates in
comments when they are large. For example:
movl $1072693248, 4(%esp) ## imm = 0x3FF00000
llvm-svn: 95728
2010-02-10 00:10:18 +00:00
509be1fe5e
TableGen fragment refactoring.
...
Move some utility TableGen defs, classes, etc. into a common file so
they may be used my multiple pattern files. We will use this for
the AVX specification to help with the transition from the current
SSE specification.
llvm-svn: 95727
2010-02-09 23:52:19 +00:00
1215c774f2
Add VBIF/VBIT for disassembly only.
...
A8.6.279
llvm-svn: 95713
2010-02-09 23:05:23 +00:00
893047d43e
Only dump output in debug mode.
...
llvm-svn: 95711
2010-02-09 23:03:05 +00:00
9a0a46163d
llvm-mc: Add --show-fixups option, for displaying the instruction fixup information in the asm comments.
...
llvm-svn: 95710
2010-02-09 23:00:14 +00:00
0e42dc0dac
MC/X86: Add a dummy implementation of MCFixup generation for hacky X86 MCCodeEmitter.
...
llvm-svn: 95709
2010-02-09 23:00:03 +00:00
b311a6b3ae
MC: First cut at MCFixup, for getting fixup/relocation information out of an MCCodeEmitter.
...
llvm-svn: 95708
2010-02-09 22:59:55 +00:00
bf02536262
Improve comments in the LSDA somewhat. They can be improved much more.
...
llvm-svn: 95707
2010-02-09 22:49:16 +00:00
b618f66c5f
Added VMRS/VMSR for disassembly only.
...
A8.6.335 & A8.6.336
llvm-svn: 95703
2010-02-09 22:35:38 +00:00
8aef06f8eb
port encoder enhancements over to the new encoder.
...
llvm-svn: 95699
2010-02-09 21:57:34 +00:00
0c3b66cd87
fix X86 encoder to output [disp] only addresses with no SIB byte
...
in X86-32 mode. This is still required in x86-64 mode to avoid
forming [disp+rip] encoding. Rewrite the SIB byte decision logic
to be actually understandable.
llvm-svn: 95693
2010-02-09 21:47:19 +00:00
7b7028fd24
Move Intrinsic::objectsize lowering back to InstCombineCalls and
...
enable constant 0 offset lowering.
llvm-svn: 95691
2010-02-09 21:24:27 +00:00
45d89644ae
revert r95689: getX86RegNum(BaseReg) != N86::ESP is
...
a confusing idiom to check for ESP or RSP.
llvm-svn: 95690
2010-02-09 21:21:26 +00:00
e464a4d815
simplify.
...
llvm-svn: 95689
2010-02-09 21:00:12 +00:00
b06015aa69
move target-independent opcodes out of TargetInstrInfo
...
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
llvm-svn: 95687
2010-02-09 19:54:29 +00:00
f7279bd10f
Radar 7417921
...
tMOVCCi pattern only valid for low registers, as the Thumb1 mov immediate to
register instruction only works with low registers. Allowing high registers
for the instruction resulted in the assembler choosing the wide (32-bit)
encoding for the mov, but LLVM though the instruction was only 16 bits wide,
so offset calculations for constant pools became incorrect, leading to
out of range constant pool entries.
llvm-svn: 95686
2010-02-09 19:51:37 +00:00
ad1aa86276
Pull these back out, they're a little too aggressive and time
...
consuming for a simple optimization.
llvm-svn: 95671
2010-02-09 17:29:18 +00:00
64e0ae8dd4
Added vcvtb/vcvtt (between half-precision and single-precision, VFP).
...
For disassembly only.
A8.6.300
llvm-svn: 95669
2010-02-09 17:21:56 +00:00
d19418d112
Remember to update live-in lists when coalescing physregs.
...
Patch by M Wahab!
llvm-svn: 95668
2010-02-09 17:20:11 +00:00
f5f335da37
move PR3462 to here.
...
llvm-svn: 95650
2010-02-09 05:55:14 +00:00
cf11e602a2
add a note from PR6194
...
llvm-svn: 95649
2010-02-09 05:45:29 +00:00
c3adf44885
Skip DEBUG_VALUE in some places where it was affecting codegen.
...
llvm-svn: 95647
2010-02-09 02:01:46 +00:00
ce25dd74c0
Add declaration attribute to a variable DIE, if there is a separate DIE for the definition.
...
llvm-svn: 95646
2010-02-09 01:58:33 +00:00
f4c8d3cea9
simplify this code, duh.
...
llvm-svn: 95643
2010-02-09 01:14:06 +00:00
9b6a1789e5
fix PR6193, only considering sign extensions *from i1* for this
...
xform.
llvm-svn: 95642
2010-02-09 01:12:41 +00:00
be2f0b2b7b
Add file in here too.
...
llvm-svn: 95641
2010-02-09 01:11:03 +00:00
89261502cb
make -show-inst be formatted a bit nicer. Before:
...
movl $3735928559, a ## inst: <MCInst 1273 <MCOperand Reg:0> <MCOperand Imm:1> <MCOperand Reg:0> <MCOperand Expr:(a)> <MCOperand Reg:0> <MCOperand Expr:(3735928559)>>
after:
movl $3735928559, a ## <MCInst #1273
## <MCOperand Reg:0>
## <MCOperand Imm:1>
## <MCOperand Reg:0>
## <MCOperand Expr:(a)>
## <MCOperand Reg:0>
## <MCOperand Expr:(3735928559)>>
llvm-svn: 95637
2010-02-09 00:54:51 +00:00
48121948dc
Fixed a bug in the PBQP allocator's findCoalesces method.
...
Previously spill registers, whose def indexes are not defined, would sometimes be improperly marked as coalescable with conflicting registers. The new findCoalesces routine conservatively assumes that any register with at least one undefined def is not coalescable with any register it interferes with.
llvm-svn: 95636
2010-02-09 00:50:27 +00:00
d00faaa9c7
Implement x86 asm parsing support for %st and %st(4)
...
llvm-svn: 95634
2010-02-09 00:49:22 +00:00
7b1e683975
Added copy sensible construction & assignment to PBQP graphs and fixed a memory access bug in the heuristic solver.
...
llvm-svn: 95633
2010-02-09 00:45:48 +00:00
9f85e7eb16
Add a new pass to do llvm.objsize lowering using SCEV.
...
Initial skeleton and SCEVUnknown lowering implemented,
the rest should come relatively quickly. Move testcase
to new directory.
Move pass to right before SimplifyLibCalls - which is
moved down a bit so we can take advantage of a few opts.
llvm-svn: 95628
2010-02-09 00:35:38 +00:00
60db0a6ba5
pass stringref by value instead of by const&
...
llvm-svn: 95627
2010-02-09 00:34:28 +00:00
187242b3ab
move PR6212 to this file.
...
llvm-svn: 95624
2010-02-09 00:11:10 +00:00
227077d1be
Implement AsmPrinter support for several more operators which have
...
direct MCExpr equivalents. Don't use MCExpr::Shr because it isn't
consistent between targets.
llvm-svn: 95620
2010-02-09 00:02:37 +00:00
9a9d9ea7bc
Document that MCExpr::Mod is actually remainder.
...
Document that MCExpr::Div, Mod, and the comparison operators are all
signed operators.
Document that the comparison operators' results are target-dependent.
Document that the behavior of shr is target-dependent.
llvm-svn: 95619
2010-02-08 23:58:47 +00:00
b22423c89a
fix some problems handling large vectors reported in PR6230
...
llvm-svn: 95616
2010-02-08 23:56:03 +00:00
08297ad15d
this is done, tested by CodeGen/ARM/iabs.ll
...
llvm-svn: 95609
2010-02-08 23:48:10 +00:00
a570d05228
tighten up eh.setjmp sequence a bit.
...
llvm-svn: 95603
2010-02-08 23:22:00 +00:00
ebc970e4eb
now that @GOTOFF is no longer represented as a suffix on a
...
MCSymbol, we can remove the 'suffix' argument of
GetBlockAddressSymbol. Do so.
llvm-svn: 95601
2010-02-08 23:10:08 +00:00
d9d7186dc0
unify the paths for external symbols and global variables:
...
2 files changed, 48 insertions(+), 83 deletions(-)
llvm-svn: 95599
2010-02-08 23:03:41 +00:00
99777dd78f
switch the rest of the "@ concatentation" logic in the X86
...
backend to use X86MCTargetExpr, simplifying a bunch of code.
llvm-svn: 95595
2010-02-08 22:52:47 +00:00
4d16049c61
Fixed the AT&T AsmLexer to report the proper strings
...
for register tokens. Before, if it encountered
'%al,' it would report 'al,' as the token. Now it
correctly reports '%al'.
llvm-svn: 95594
2010-02-08 22:50:23 +00:00
b8479fb309
switch ELF @GOTOFF references to use X86MCTargetExpr.
...
llvm-svn: 95593
2010-02-08 22:33:55 +00:00
e51b57bee0
ConstantFoldConstantExpression can theoretically return the original
...
expression; don't go into an infinite loop if it does.
llvm-svn: 95591
2010-02-08 22:19:11 +00:00
b6b2164e28
add an x86 implementation of MCTargetExpr for
...
representing @GOT and friends. Use it for
personality references as a first use.
llvm-svn: 95588
2010-02-08 22:09:08 +00:00
54d88f1759
don't make hte dtor private or we can't construct the class.
...
llvm-svn: 95587
2010-02-08 22:07:36 +00:00
9e60686a83
Add VCVTR (between floating-point and integer, VFP) for disassembly purpose.
...
The 'R' suffix means the to-integer operations use the rounding mode specified
by the FPSCR, encoded as Inst{7} = 0.
A8.6.295
llvm-svn: 95584
2010-02-08 22:02:41 +00:00
4268d6a7c3
When CodeGen'ing unoptimized code, there may be unfolded constant expressions
...
in global initializers. Instead of aborting, attempt to fold them on the
spot. If folding succeeds, emit the folded expression instead.
This fixes PR6255.
llvm-svn: 95583
2010-02-08 22:02:38 +00:00
6f9646e1c5
Add const qualifiers.
...
llvm-svn: 95582
2010-02-08 22:00:06 +00:00
120cfe23a7
Apply the 95471 fix to SelectionDAGBuilder as well;
...
we can get in here if FastISel gives up in a block.
(Actually the two copies of this need to be unified. Later.)
llvm-svn: 95579
2010-02-08 21:53:27 +00:00
bd374da130
In guaranteed tailcall mode, don't decline the tailcall optimization
...
for blocks ending in "unreachable".
llvm-svn: 95565
2010-02-08 20:34:14 +00:00
3464a5b609
Rename the PerformTailCallOpt variable to GuaranteedTailCallOpt to reflect
...
its current purpose.
llvm-svn: 95564
2010-02-08 20:27:50 +00:00
beb1238a85
Add VCMP (VFP floating-point compare without 'E' bit set) for disassembly purpose.
...
llvm-svn: 95560
2010-02-08 19:41:48 +00:00
38d022efe9
add scaffolding for target-specific MCExprs.
...
llvm-svn: 95559
2010-02-08 19:41:07 +00:00
c7e606f132
Added VMOVRRS/VMOVSRR to ARMInstrVFP.td for disassembly purpose.
...
A8.6.331 VMOV (between two ARM core registers and two single-precision registers)
llvm-svn: 95548
2010-02-08 17:26:09 +00:00
6e29e9d262
Fix x86 JIT stub on MSVC.
...
Thanks to Kristaps Straupe for noticing the bug.
llvm-svn: 95537
2010-02-08 08:37:27 +00:00
b1d5ead9fb
Make the destructor for TypeMapBase protected. Spotted by Duncan Sands with
...
cppcheck!
llvm-svn: 95527
2010-02-07 21:13:46 +00:00
a1b98ab7d5
Give DwarfPrinter a protected (but not virtual) destructor. Cppcheck
...
warns about this base class not having a virtual destructor, but since
this class has no virtual methods and neither it or the types derived
from it has a destructor, a protected trivial destructor will do (and
shuts cppcheck up) the trick without the cost of introducing a vtable.
llvm-svn: 95526
2010-02-07 21:09:22 +00:00
d59cddc098
Add suport for VASTART on Mips.
...
llvm-svn: 95506
2010-02-06 21:00:02 +00:00
d6fff557db
First step towards varargs support in Mips:
...
- o32 cc must pass all arguments in A0...A3 and stack regardless
if its type (but respect the alignment).
- Store all variable arguments back to the caller stack.
llvm-svn: 95500
2010-02-06 19:20:49 +00:00
ea5c6be766
Run codegen dce pass for all targets at all optimization levels. Previously it's
...
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.
llvm-svn: 95493
2010-02-06 09:07:11 +00:00
182c53ee88
Fix an uninitialized value. Radar 7609421.
...
llvm-svn: 95488
2010-02-06 05:55:20 +00:00
4536b9a904
Fix alignment on ppc linux. This fixes the build of crtend.o
...
llvm-svn: 95477
2010-02-06 03:32:21 +00:00
d064aefefc
Do not emit callseq instructions around sibcalls. This eliminated some unnecessary stack adjustments.
...
llvm-svn: 95475
2010-02-06 03:28:46 +00:00
db2eb47835
After Victor's latest commits I am seeing null
...
addresses in dbg.declare; ignore this for the
moment to prevent things from breaking.
llvm-svn: 95471
2010-02-06 02:26:02 +00:00
827de51a4a
Linker should not remap null operands of metadata
...
llvm-svn: 95468
2010-02-06 01:31:55 +00:00
1b08138152
Function-local metadata whose operands had been optimized to no longer refer to function-local IR were not getting written by BitcodeWriter; solution is for these metadata to be enumerated just like global metadata.
...
llvm-svn: 95467
2010-02-06 01:21:09 +00:00
74bb06c0f0
Reintroduce the InlineHint function attribute.
...
This time it's for real! I am going to hook this up in the frontends as well.
The inliner has some experimental heuristics for dealing with the inline hint.
When given a -respect-inlinehint option, functions marked with the inline
keyword are given a threshold just above the default for -O3.
We need some experiments to determine if that is the right thing to do.
llvm-svn: 95466
2010-02-06 01:16:28 +00:00
6efc8e5120
Set DW_AT_artificial only if argument is marked as artificial.
...
llvm-svn: 95461
2010-02-06 01:02:37 +00:00
5638c36efd
Handle AddrMode6 (for NEON load/stores) in Thumb2's rewriteT2FrameIndex.
...
Radar 7614112.
llvm-svn: 95456
2010-02-06 00:24:38 +00:00
5f9ead2714
Don't unroll loops containing function calls.
...
llvm-svn: 95454
2010-02-05 23:21:31 +00:00
b0b2297066
Update CodeMetrics to count 'big' function calls explicitly.
...
llvm-svn: 95453
2010-02-05 23:21:18 +00:00
d4be4ced76
Do not generate specification DIE for nested functions.
...
llvm-svn: 95452
2010-02-05 23:09:20 +00:00
9d624778a3
fix incorrect encoding of SBB8mi that Kevin noticed.
...
llvm-svn: 95448
2010-02-05 22:56:11 +00:00
d91f302a05
fix a case where we'd mis-encode fisttp because of an incorrect (and
...
redundant with a correct one) pattern that was added for the disassembler.
llvm-svn: 95446
2010-02-05 22:49:06 +00:00
a60af09414
add note.
...
llvm-svn: 95445
2010-02-05 22:48:33 +00:00
175629608e
print encodings like this:
...
pslld 69, %mm3 ## encoding: [0x0f,0xf2,0x1c,0x25,0x45,0x00,0x00,0x00]
instead of like this:
pslld 69, %mm3 ## encoding: [0x0f,0xf2,0x1c,0x25,0x45,0000,0000,0000]
this only affects 0.
llvm-svn: 95441
2010-02-05 22:20:08 +00:00
58827ff98e
port X86InstrInfo::determineREX over to the new encoder.
...
llvm-svn: 95440
2010-02-05 22:10:22 +00:00
916f48a054
Teach SimplifyCFG about magic pointer constants.
...
Weird code sometimes uses pointer constants other than null. This patch
teaches SimplifyCFG to build switch instructions in those cases.
Code like this:
void f(const char *x) {
if (!x)
puts("null");
else if ((uintptr_t)x == 1)
puts("one");
else if (x == (char*)2 || x == (char*)3)
puts("two");
else if ((intptr_t)x == 4)
puts("four");
else
puts(x);
}
Now becomes a switch:
define void @f(i8* %x) nounwind ssp {
entry:
%magicptr23 = ptrtoint i8* %x to i64 ; <i64> [#uses=1]
switch i64 %magicptr23, label %if.else16 [
i64 0, label %if.then
i64 1, label %if.then2
i64 2, label %if.then9
i64 3, label %if.then9
i64 4, label %if.then14
]
Note that LLVM's own DenseMap uses magic pointers.
llvm-svn: 95439
2010-02-05 22:03:18 +00:00
9c9453e582
wire up 64-bit MCCodeEmitter.
...
llvm-svn: 95438
2010-02-05 21:51:35 +00:00
86bd194234
really kill off the last MRMInitReg inst, remove logic from encoder.
...
llvm-svn: 95437
2010-02-05 21:34:18 +00:00
e96d534ce0
lower the last of the MRMInitReg instructions in MCInstLower.
...
llvm-svn: 95435
2010-02-05 21:30:49 +00:00
90916287ed
teach X86MCInstLower to lower the MOV32r0 and MOV8r0
...
pseudo instructions.
llvm-svn: 95433
2010-02-05 21:21:06 +00:00
fd7976a432
genericize helpers, use them for MOV16r0/MOV64r0
...
llvm-svn: 95432
2010-02-05 21:15:57 +00:00
340b542f8b
factor code better in X86MCInstLower::Lower, teach it to
...
lower the SETB* instructions.
llvm-svn: 95431
2010-02-05 21:13:48 +00:00
64ffd11d49
fix logical-select to invoke filecheck right, and fix hte instcombine
...
xform it is checking to actually pass. There is no need to match
m_SelectCst<0, -1> since instcombine canonicalizes that into not(sext).
Add matches for sext(not(x)) in addition to not(sext(x)).
llvm-svn: 95420
2010-02-05 19:53:02 +00:00
89f7dfff21
implement the rest of the encoding types.
...
llvm-svn: 95414
2010-02-05 19:37:31 +00:00
503243559a
move functions for decoding X86II values into the X86II namespace.
...
llvm-svn: 95410
2010-02-05 19:24:13 +00:00
4739e41ce9
Implement releaseMemory in CodeGenPrepare and free the BackEdges
...
container data. This prevents it from holding onto dangling
pointers and potentially behaving unpredictably.
llvm-svn: 95409
2010-02-05 19:24:11 +00:00
342762fdba
constant propagate a method away.
...
llvm-svn: 95408
2010-02-05 19:20:30 +00:00
8abb67df63
Use a SmallSetVector instead of a SetVector; this code showed up as a
...
malloc caller in a profile.
llvm-svn: 95407
2010-02-05 19:20:15 +00:00
b8d375fd21
change getSizeOfImm and getBaseOpcodeFor to just take
...
TSFlags directly instead of a TargetInstrDesc.
llvm-svn: 95405
2010-02-05 19:16:26 +00:00
37166eb419
add some more encodings.
...
llvm-svn: 95403
2010-02-05 19:04:37 +00:00
04371b4f12
Remove this code for now. I have a better idea and will rewrite with
...
that in mind.
llvm-svn: 95402
2010-02-05 19:04:06 +00:00
a778db9a91
VMOVRRD and VMOVDRR both have Inst{7-6} = 0b00.
...
llvm-svn: 95397
2010-02-05 18:04:58 +00:00
31faefff92
Move --march, --mcpu, and --mattr from JIT/TargetSelect.cpp to lli.cpp.
...
llc.cpp also defined these flags, meaning that when I linked all of LLVM's
libraries into a single shared library, llc crashed on startup with duplicate
flag definitions. This patch passes them through the EngineBuilder into
JIT::selectTarget().
llvm-svn: 95390
2010-02-05 16:19:36 +00:00
675ae27e37
MC: Change default comment column to 40 characters.
...
llvm-svn: 95378
2010-02-05 07:32:18 +00:00
df84b1aa50
implement the non-relocation forms of memory operands
...
llvm-svn: 95368
2010-02-05 06:16:07 +00:00
a366c61f77
Handle tail call with byval arguments.
...
llvm-svn: 95351
2010-02-05 02:21:12 +00:00
610c84a7c2
start adding MRMDestMem, which requires memory form mod/rm encoding
...
to start limping.
llvm-svn: 95350
2010-02-05 02:18:40 +00:00
4f627ba89f
Add a few more encodings, we can now encode all of:
...
pushl %ebp
movl %esp, %ebp
movl $42, %eax
popl %ebp
ret
llvm-svn: 95344
2010-02-05 01:53:19 +00:00
3b245876c0
When the scheduler unfold a load folding instruction it move some of the predecessors to the unfolded load. It decides what gets moved to the load by checking whether the new load is using the predecessor as an operand. The check neglects the cases whether the predecessor is a flagged scheduling unit.
...
rdar://7604000
llvm-svn: 95339
2010-02-05 01:27:11 +00:00
6510dc8dc3
An empty global constant (one of size 0) may have a section immediately
...
following it. However, the EmitGlobalConstant method wasn't emitting a body for
the constant. The assembler doesn't like that. Before, we were generating this:
.zerofill __DATA, __common, __cmd, 1, 3
This fix puts us back to that semantic.
llvm-svn: 95336
2010-02-05 00:17:02 +00:00
27dfb1e1a4
Do not reassociate expressions with i1 type. SimplifyCFG converts some
...
short-circuited conditions to AND/OR expressions, and those expressions
are often converted back to a short-circuited form in code gen. The
original source order may have been optimized to take advantage of the
expected values, and if we reassociate them, we change the order and
subvert that optimization. Radar 7497329.
llvm-svn: 95333
2010-02-04 23:32:37 +00:00
ee9d33b4e7
Disable external stubs for X86-32 and X86-64
...
Instruction selection for X86 now can choose an instruction
sequence that will fit any address of any symbol, no matter
the pointer width. X86-64 uses a mov+call-via-reg sequence
for this.
llvm-svn: 95323
2010-02-04 19:56:59 +00:00
0a4fa4ca93
Fix typo Duncan noticed.
...
llvm-svn: 95322
2010-02-04 19:07:06 +00:00
113fb54bcb
Increase inliner thresholds by 25.
...
This makes the inliner about as agressive as it was before my changes to the
inliner cost calculations. These levels give the same performance and slightly
smaller code than before.
llvm-svn: 95320
2010-02-04 18:48:20 +00:00
c7c89b8325
Fix small bug in handling instructions with more than one implicitly defined operand.
...
ProcessImplicitDefs would only mark one operand per instruction with <undef>.
This fixed PR6086.
llvm-svn: 95319
2010-02-04 18:46:28 +00:00
fb5670fc16
move the PR6214 microoptzn to this file.
...
llvm-svn: 95299
2010-02-04 07:32:01 +00:00
aeba2250a5
Re-enable x86 tail call optimization.
...
llvm-svn: 95295
2010-02-04 06:47:24 +00:00
107a1fbf61
Temporarily revert this since it appears to have caused a build
...
failure.
llvm-svn: 95294
2010-02-04 06:41:27 +00:00
8228b11abc
add support for the sparcv9-*-* target triple to turn on
...
64-bit sparc codegen. Patch by Nathan Keynes!
llvm-svn: 95293
2010-02-04 06:34:01 +00:00
21fb024cc0
From PR6228:
...
"Attached patch removes the extra NUL bytes from the output and changes
test/Archive/MacOSX.toc from a binary to a text file (removes
svn:mime-type=application/octet-stream and adds svn:eol-style=native). I can't
figure out how to get SVN to include the new contents of the file in the patch
so I'm attaching it separately."
Patch by James Abbatiello!
llvm-svn: 95292
2010-02-04 06:19:43 +00:00
42fa84a880
Rework constant expr and array handling for objectsize instcombining.
...
Fix bugs where we would compute out of bounds as in bounds, and where
we couldn't know that the linker could override the size of an array.
Add a few new testcases, change existing testcase to use a private
global array instead of extern.
llvm-svn: 95283
2010-02-04 02:55:34 +00:00
01676f9ff4
It's too risky to eliminate sext / zext of call results for tail call optimization even if the caller / callee attributes completely match. The callee may have been bitcast'ed (or otherwise lied about what it's doing).
...
llvm-svn: 95282
2010-02-04 02:45:02 +00:00
9946b5109c
Change the argument to getIntegerSCEV to be an int64_t, rather
...
than int. This will make it more convenient for LSR, which does
a lot of things with int64_t offsets.
llvm-svn: 95281
2010-02-04 02:43:51 +00:00
9976832a05
Indirect tail call has to go through a call preserved register since it's after callee register pops. X86 isel lowering is using EAX / R11 and it was somehow adding that to function live out. That prevented the real function return register from being added to the function live out list and bad things happen.
...
This fixes 483.xalancbmk (with tail call opt).
llvm-svn: 95280
2010-02-04 02:40:39 +00:00
77fe07a93a
Use a tab instead of space after .type, for consistency.
...
llvm-svn: 95272
2010-02-04 01:42:13 +00:00
c337d6538a
Rewrite FP constant handling in DEBUG_VALUE yet
...
again, so it more or less handles long double.
Restore \n removed in latest MC frenzy.
llvm-svn: 95271
2010-02-04 01:33:43 +00:00
d44ee35f30
Fix (and test) function-local metadata that occurs before the instruction that it refers to; fix is to not enumerate operands of function-local metadata until after all instructions have been enumerated
...
llvm-svn: 95269
2010-02-04 01:13:08 +00:00
f12e18db21
If we're dealing with a zero-length array, don't lower to any
...
particular size, we just don't know what the length is yet.
llvm-svn: 95266
2010-02-03 23:56:07 +00:00
223084d3ac
enhance new encoder to support prefixes + RawFrm
...
instructions with no operands. It can now handle
define void @test2() nounwind { ret void }
llvm-svn: 95261
2010-02-03 21:57:59 +00:00
6794f9b9f6
set up some infrastructure, some minor cleanups.
...
llvm-svn: 95260
2010-02-03 21:43:43 +00:00
f4139067ee
Speculatively disable x86 automatic tail call optimization while we track down a self-hosting issue.
...
llvm-svn: 95259
2010-02-03 21:40:40 +00:00
f914be06d2
stub out a new X86 encoder, which can be tried with
...
-enable-new-x86-encoder until its stable.
llvm-svn: 95256
2010-02-03 21:24:49 +00:00
2f750f3b5a
rename createX86MCCodeEmitter to more accurately reflect what it creates.
...
llvm-svn: 95254
2010-02-03 21:14:33 +00:00
00f1e6c030
Added support for X86 instruction prefixes so llvm-mc can assemble them. The
...
Lock prefix, Repeat string operation prefixes and the Segment override prefixes.
Also added versions of the move string and store string instructions without the
repeat prefixes to X86InstrInfo.td. And finally marked the rep versions of
move/store string records in X86InstrInfo.td as isCodeGenOnly = 1 so tblgen is
happy building the disassembler files.
llvm-svn: 95252
2010-02-03 21:04:42 +00:00
d231689adb
Emit appropriate expression to find virtual base offset.
...
llvm-svn: 95242
2010-02-03 20:08:48 +00:00
999b499024
Provide interface to identifiy artificial methods.
...
llvm-svn: 95240
2010-02-03 19:57:19 +00:00
099552a0ca
r94686 changed all ModuleProvider parameters to Modules, which made the
...
1-argument ExecutionEngine::create(Module*) ambiguous with the signature that
used to be ExecutionEngine::create(ModuleProvider*, defaulted_params). Fixed
by removing the 1-argument create(). Fixes PR6221.
llvm-svn: 95236
2010-02-03 19:18:04 +00:00
e3ee332fe0
llvm-mc: Add --show-inst option, for showing the MCInst inline with the assembly
...
output.
llvm-svn: 95227
2010-02-03 18:18:30 +00:00
04365c5f72
Adjust the heuristics used to decide when SROA is likely to be profitable.
...
The SRThreshold value makes perfect sense for checking if an entire aggregate
should be promoted to a scalar integer, but it is not so good for splitting
an aggregate into its separate elements. A struct may contain a large embedded
array along with some scalar fields that would benefit from being split apart
by SROA. Even if the total aggregate size is large, it may still be good to
perform SROA. Thus, the most important piece of this patch is simply moving
the aggregate size comparison vs. SRThreshold so that it guards only the
aggregate promotion.
We have also been checking the number of elements to decide if an aggregate
should be split up. The limit of "SRThreshold/4" seemed rather arbitrary,
and I don't think it's very useful to derive this limit from SRThreshold
anyway. I've collected some data showing that the current default limit of
32 (since SRThreshold defaults to 128) is a reasonable cutoff for struct
types. One thing suggested by the data is that distinguishing between structs
and arrays might be useful. There are (obviously) a lot more large arrays
than large structs (as measured by the number of elements and not the total
size -- a large array inside a struct still counts as a single element given
the way we do SROA right now). Out of 8377 arrays where we successfully
performed SROA while compiling a large set of benchmarks, only 16 of them had
more than 8 elements. And, for those 16 arrays, it's not at all clear that
SROA was actually beneficial. So, to offset the compile time cost of
investigating more large structs for SROA, the patch lowers the limit on array
elements to 8.
This fixes Apple Radar 7563690.
llvm-svn: 95224
2010-02-03 17:23:56 +00:00
3bcbdb8a28
reapply r95206, this time actually delete the code I'm replacing in the third stub case.
...
llvm-svn: 95209
2010-02-03 06:42:38 +00:00
37fad99a05
revert r95206, it is apparently causing bootstrap failure on i386-darwin9
...
llvm-svn: 95208
2010-02-03 06:41:18 +00:00
44f7325de5
print instruction encodings with the existing comment facilities,
...
so that llvm-mc -show-encoding prints like this:
hlt ## encoding: [0xf4]
instead of like this:
hlt
# encoding: [0xf4]
llvm-svn: 95207
2010-02-03 06:28:13 +00:00
3eef965b06
make the x86 backend emit darwin stubs through mcstreamer
...
instead of textually.
llvm-svn: 95206
2010-02-03 06:21:16 +00:00
082f484074
make MachineModuleInfoMachO hold non-const MCSymbol*'s instead
...
of const ones. non-const ones aren't very useful, because you can't
even, say, emit them.
llvm-svn: 95205
2010-02-03 06:18:30 +00:00
edcf065a29
change addPassesToEmitFile to return true on failure instead of its input,
...
add -filetype=null for performance testing and remove -filetype=dynlib,
which isn't planned to be implemented.
llvm-svn: 95202
2010-02-03 05:55:08 +00:00
27a41d5473
Revert 94937 and move the noreturn check to codegen.
...
llvm-svn: 95198
2010-02-03 03:55:59 +00:00
df951bddb8
Make APInt::countLeadingZerosSlowCase() treat the contents of padding bits
...
as undefined. Fixes an assertion in APFloat::toString noticed by Dale.
llvm-svn: 95196
2010-02-03 03:42:44 +00:00
40905b4302
Allow all types of callee's to be tail called. But avoid automatic tailcall if the callee is a result of bitcast to avoid losing necessary zext / sext etc.
...
llvm-svn: 95195
2010-02-03 03:28:02 +00:00
0b78cc2af5
don't emit \n's at the start of X86AsmPrinter::runOnMachineFunction,
...
.o files don't like that.
llvm-svn: 95187
2010-02-03 01:49:49 +00:00
f1866ab682
privatize a bunch of methods and move \n printing into them.
...
llvm-svn: 95186
2010-02-03 01:46:05 +00:00
aaa1db66a1
rename printMachineInstruction -> EmitInstruction
...
llvm-svn: 95184
2010-02-03 01:41:03 +00:00
a466692552
Reapply 95050 with a tweak to check the register class.
...
llvm-svn: 95183
2010-02-03 01:40:33 +00:00
6f1f865fba
print instructions through the mcstreamer.
...
llvm-svn: 95181
2010-02-03 01:16:28 +00:00
402a111318
emit instructions through the streamer.
...
llvm-svn: 95180
2010-02-03 01:15:03 +00:00
183ef68ef7
Finally eliminate printMCInst and send instructions through
...
the streamer. Demo:
$ cat t.ll
define i32 @test() nounwind {
ret i32 42
}
$ llc t.ll -o -
...
_test:
movl $42, %eax
ret
$ llc t.ll -o t.o -filetype=obj
$ otool -tv t.o
t.o:
(__TEXT,__text) section
_test:
00000000 movl $0x0000002a,%eax
00000005 ret
llvm-svn: 95179
2010-02-03 01:13:25 +00:00
996ec840d0
rejigger the world so that EmitInstruction prints the \n at
...
the end of the instruction instead of expecting the caller to
do it. This currently causes the asm-verbose instruction
comments to be on the next line.
llvm-svn: 95178
2010-02-03 01:09:55 +00:00
41ad1905c9
sink handling of target-independent machine instrs (other
...
than DEBUG_VALUE :( ) into the target indep AsmPrinter.cpp
file. This allows elimination of the
NO_ASM_WRITER_BOILERPLATE hack among other things.
llvm-svn: 95177
2010-02-03 01:00:52 +00:00
55e768c99a
Print FPImm a less kludgy way; APFloat.toString seems
...
to have some problems anyway.
llvm-svn: 95171
2010-02-03 00:36:40 +00:00
76e8c59509
Fix some comment typos.
...
llvm-svn: 95170
2010-02-03 00:33:21 +00:00
Daniel Dunbar