13ac3b2139
Delete some unneeded casts.
...
llvm-svn: 96429
2010-02-17 00:42:19 +00:00
5f10d6c52c
Don't attempt to divide INT_MIN by -1; consider such cases to
...
have overflowed.
llvm-svn: 96428
2010-02-17 00:41:53 +00:00
12995ba3c0
Make the operand and format specifier match, and print all
...
64 bits, fixing a variety of problems.
llvm-svn: 96421
2010-02-17 00:37:20 +00:00
9e89907ed5
Wrap lines to 80 columns and generally try to clean up whitespace and
...
indentation. No functional changes.
llvm-svn: 96418
2010-02-17 00:31:29 +00:00
85e5081c77
Make error statement more personal.
...
llvm-svn: 96410
2010-02-16 22:47:14 +00:00
afac7dad21
fix rdar://7653908, a crash on a case where we would fold a load
...
into a roundss intrinsic, producing a cyclic dag. The root cause
of this is badness handling ComplexPattern nodes in the old dagisel
that I noticed through inspection. Eliminate a copy of the of the
code that handled ComplexPatterns by making EmitChildMatchCode call
into EmitMatchCode.
llvm-svn: 96408
2010-02-16 22:35:06 +00:00
37f106e18c
Handle tGPR register class in a few more places. This fixes some llvm-gcc
...
build failures due to my fix for pr6111.
llvm-svn: 96402
2010-02-16 22:01:59 +00:00
4c444bf606
Add SMC (Secure Monitor Call) system instruction for disassembly only.
...
llvm-svn: 96401
2010-02-16 21:59:54 +00:00
1b967bf0e4
Really reserve R2 on PPC Darwin. PR 6314.
...
llvm-svn: 96399
2010-02-16 21:53:27 +00:00
7c7cfbbc38
Use line and column number to distinguish two lexical blocks at the same level.
...
llvm-svn: 96395
2010-02-16 21:39:34 +00:00
3e2cad3b1a
80 column cleanup
...
llvm-svn: 96393
2010-02-16 21:23:02 +00:00
82b04130cb
Look for SSE and instructions of this form: (and x, (build_vector c1,c2,c3,c4)).
...
If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).
Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335
llvm-svn: 96389
2010-02-16 21:09:44 +00:00
fba7fce5be
Remove trailing whitespace
...
llvm-svn: 96388
2010-02-16 21:07:46 +00:00
aff96b2132
Rename SuccessorNumber to GetSuccessorNumber.
...
llvm-svn: 96387
2010-02-16 21:06:42 +00:00
9641d06809
Add support for emitting non-temporal stores for DAGs marked
...
non-temporal. Fix from r96241 for botched encoding of MOVNTDQ.
Add documentation for !nontemporal metadata.
Add a simpler movnt testcase.
llvm-svn: 96386
2010-02-16 20:50:18 +00:00
2284ddab56
Update Thumb2 to not use CarryDefIsUnused or CarryDefIsUsed predicates, but
...
to have the predicate on the pattern itself instead. Support for the new
ISel. Remove definitions of CarryDefIsUnused and CarryDefIsUsed since they are
no longer used anywhere.
llvm-svn: 96384
2010-02-16 20:42:29 +00:00
756ab53e60
Remove redundant setting of Defs. CPSR is already marked by the block level set of Defs.
...
llvm-svn: 96383
2010-02-16 20:35:59 +00:00
6deab96c81
Refactor rewriting for PHI nodes into a separate function.
...
llvm-svn: 96382
2010-02-16 20:25:07 +00:00
0a334d0df9
First step in eliminating the CarryDefIsUnused and CarryDefIsUsed predicates.
...
They won't work with the new ISel mechanism, as Requires predicates are no
longer allowed to reference the node being selected. Moving the predicate to
the patterns instead solves the problem.
This patch handles ARM mode. Thumb2 will follow.
llvm-svn: 96381
2010-02-16 20:17:57 +00:00
46c39d4f1f
Added for disassembly the following instructions:
...
o Store Return State (SRSW, SRS)
o Load/Store Coprocessor (LDC/STC and friends)
o MSR (immediate)
llvm-svn: 96380
2010-02-16 20:04:27 +00:00
92cdb6eec5
Split critical edges as needed for load PRE.
...
llvm-svn: 96378
2010-02-16 19:51:59 +00:00
3de492ec35
Refactor to share code to find the position of a basic block successor in the
...
terminator's list of successors.
llvm-svn: 96377
2010-02-16 19:49:17 +00:00
0849ed5e26
Fix whitespace.
...
llvm-svn: 96372
2010-02-16 19:42:34 +00:00
10e3022b10
Function attributes have index ~0, not 0
...
llvm-svn: 96370
2010-02-16 19:28:02 +00:00
70aa8d0745
Fix pr6111: Avoid using the LR register for the target address of an indirect
...
branch in ARM v4 code, since it gets clobbered by the return address before
it is used. Instead of adding a new register class containing all the GPRs
except LR, just use the existing tGPR class.
llvm-svn: 96360
2010-02-16 17:24:15 +00:00
cbd43f89ac
Introduce isOpaqueTy and use it rather than isa<OpaqueType>. Also, move some
...
methods to try to have the type predicates be more logically positioned.
llvm-svn: 96349
2010-02-16 14:50:09 +00:00
19d0b47b1f
There are two ways of checking for a given type, for example isa<PointerType>(T)
...
and T->isPointerTy(). Convert most instances of the first form to the second form.
Requested by Chris.
llvm-svn: 96344
2010-02-16 11:11:14 +00:00
d7d8afabd0
Minor warning fixes (semicolons, newline at EOF).
...
llvm-svn: 96343
2010-02-16 10:25:04 +00:00
52bfe24e2c
mark all the generated node predicates 'const'.
...
llvm-svn: 96337
2010-02-16 07:26:36 +00:00
4964ef88c2
make pcrel immediate values relative to the start of the field,
...
not the end of the field, fixing rdar://7651978
llvm-svn: 96330
2010-02-16 05:03:17 +00:00
adcee844ea
The code section for an ISR has a specific address.
...
Currently, whether a function is ISR or not is encoded in the section attribute for that function.
llvm-svn: 96322
2010-02-16 03:41:07 +00:00
d7eb693643
Handle DBG_VALUE mixed with labels when doing PHI
...
elimination. Before a DBG_VALUE could affect codegen.
The solution here is imperfect and not final.
llvm-svn: 96318
2010-02-16 01:57:28 +00:00
af25cf825c
Drop support for the InReg attribute on the ppc backend. This was used by
...
llvm-gcc but has been replaced with pad argument which don't need any
special backend support.
llvm-svn: 96312
2010-02-16 01:50:18 +00:00
521efe68ab
Split the main for-each-use loop again, this time for GenerateTruncates,
...
as it also peeks at which registers are being used by other uses. This
makes LSR less sensitive to use-list order.
llvm-svn: 96308
2010-02-16 01:42:53 +00:00
d37e7b5bc5
Reapply 96294; now that I've gotten around to looking
...
at older buildbot messages, I see the failure predates
this patch.
llvm-svn: 96307
2010-02-16 01:27:47 +00:00
1776295bf1
Apply patch from http://llvm.org/bugs/attachment.cgi?id=4136 now that PR5004 is
...
finished.
llvm-svn: 96304
2010-02-16 00:58:02 +00:00
ae87fc43a7
Something broke. Hard to believe it was this patch
...
but it's harder to believe it's the other candidate,
so reverting. Temporarily I hope.
llvm-svn: 96303
2010-02-16 00:43:58 +00:00
148a972b67
When reusing an existing PHI node in a loop, be even more
...
strict about the requirements.
llvm-svn: 96301
2010-02-16 00:20:08 +00:00
a945c64b5a
Put repeated empty pattern into the AQI instruction class.
...
We could almost use a multiclass for the signed/unsigned instructions, but
there are only 6 of them so I guess it's not worth it.
llvm-svn: 96297
2010-02-15 23:43:47 +00:00
3f08464a1a
Fix a memory leak. Patch by Nicolas Geoffray.
...
llvm-svn: 96295
2010-02-15 23:16:53 +00:00
5b80f0d67f
More handling of DBG_VALUE.
...
llvm-svn: 96294
2010-02-15 23:05:03 +00:00
1be2063afd
Add missed entry to cmake build list file
...
llvm-svn: 96292
2010-02-15 22:55:13 +00:00
5d438e4ad2
Use ttype encoding consistently
...
llvm-svn: 96290
2010-02-15 22:38:25 +00:00
c9adb6a463
Fix a silly darwin-only typo introduced during merge.
...
llvm-svn: 96289
2010-02-15 22:38:10 +00:00
ab663a0bfe
Move TLOF implementations to libCodegen to resolve layering violation.
...
llvm-svn: 96288
2010-02-15 22:37:53 +00:00
ec2ba08d16
It turns out that we emitted completely wrong common EH frame since the early beginning! The "z" CIE augmentation mark indicates that there is an extra word containing the size of augmentation section. However, even for frames w/o any augmentation data we emitted size uleb! (this is the case of "unwinding through C code"). Thus frame moves information was emitterd completely wrong.
...
llvm-svn: 96287
2010-02-15 22:36:41 +00:00
397aecb6d6
Add suffix for stubs, so we won't have name clashes with private symbols.
...
llvm-svn: 96286
2010-02-15 22:36:26 +00:00
ae4ccc10da
Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there
...
llvm-svn: 96285
2010-02-15 22:35:59 +00:00
1d9a8159df
Teach the verifier to check the condition on a branch and ensure that it has
...
'i1' type.
llvm-svn: 96282
2010-02-15 22:09:09 +00:00
2988d573e5
Fix PR6300.
...
A virtual register can be used before it is defined in the same MBB if the MBB
is part of a loop. Teach the implicit-def pass about this case.
llvm-svn: 96279
2010-02-15 22:03:29 +00:00
62f864dea3
Fix crash in VerifyType when checking Contexts. Because there may not be a
...
Module (we were called with verifyFunction and an unowned Function) we can't
rely on Mod->getContext().
llvm-svn: 96275
2010-02-15 21:52:04 +00:00
94e168f09e
Don't try to materialize a function that isn't materializable anyways. This
...
fixes a crash using FPM on a Function that isn't owned by a Module.
llvm-svn: 96273
2010-02-15 21:27:56 +00:00
780d2fe319
A function with no Module owner isn't materializable. This fixes F->dump() for
...
functions not embedded within modules.
llvm-svn: 96272
2010-02-15 21:27:20 +00:00
754946c113
Simplify.
...
llvm-svn: 96269
2010-02-15 21:08:22 +00:00
bcbaaba532
revert r96241. It breaks two regression tests, isn't documented,
...
and the testcase needs improvement.
llvm-svn: 96265
2010-02-15 20:53:01 +00:00
6fbfe5897c
fix PR6305 by handling BlockAddress in a helper function
...
called by jump threading.
llvm-svn: 96263
2010-02-15 20:47:49 +00:00
5e73ff2e3a
Split SelectionDAGISel::IsLegalAndProfitableToFold to
...
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.
This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.
llvm-svn: 96255
2010-02-15 19:41:07 +00:00
63cedef74b
Add support for emitting non-temporal stores for DAGs marked
...
non-temporal.
llvm-svn: 96241
2010-02-15 17:02:56 +00:00
39c6d01879
Add non-temporal flags and remove an assumption of default arguments.
...
llvm-svn: 96240
2010-02-15 17:00:31 +00:00
cbd39c5def
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96239
2010-02-15 16:57:43 +00:00
15478ac350
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96238
2010-02-15 16:57:13 +00:00
772fc34209
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96237
2010-02-15 16:57:02 +00:00
87a5abea33
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96236
2010-02-15 16:56:53 +00:00
2138b0fc90
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96235
2010-02-15 16:56:34 +00:00
27d044d65d
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96234
2010-02-15 16:56:22 +00:00
3cd87cc5ee
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96233
2010-02-15 16:56:10 +00:00
cfa68983e8
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96232
2010-02-15 16:55:58 +00:00
af2931d7bf
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96231
2010-02-15 16:55:37 +00:00
0d0149f5ac
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96230
2010-02-15 16:55:24 +00:00
e2e2073303
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96229
2010-02-15 16:55:07 +00:00
ff34702b04
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96228
2010-02-15 16:53:33 +00:00
68ea4da8cb
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96227
2010-02-15 16:49:52 +00:00
3a0412f122
Add non-temporal flags to MachineMemOperand.
...
llvm-svn: 96226
2010-02-15 16:48:31 +00:00
9dff9bec31
Uniformize the names of type predicates: rather than having isFloatTy and
...
isInteger, we now have isFloatTy and isIntegerTy. Requested by Chris!
llvm-svn: 96223
2010-02-15 16:12:20 +00:00
6b5e62fb0b
Fix changes from r75027
...
llvm-svn: 96220
2010-02-15 15:00:44 +00:00
fefbff9cd8
When testing whether a given SCEV depends on a temporary symbolic
...
name, test whether the SCEV itself is that temporary symbolic name,
in addition to checking whether the symbolic name appears as a
possibly-indirect operand.
llvm-svn: 96216
2010-02-15 10:28:37 +00:00
d4df64d15f
no need to add the instruction count anymore.
...
llvm-svn: 96212
2010-02-15 06:38:41 +00:00
115158fa4f
enhance raw_svector_ostream::write_impl to work with unbuffered streams,
...
which may call write_impl on things that are not the usual buffer.
llvm-svn: 96209
2010-02-15 02:18:26 +00:00
f733d75892
make PadToColumn return the stream so you can use:
...
OS.PadToColumn(42) << "foo";
llvm-svn: 96208
2010-02-15 02:17:50 +00:00
c704ea1c51
Ignore DBG_VALUE in a couple more places.
...
llvm-svn: 96207
2010-02-15 01:45:47 +00:00
4d8feb11dd
When restoring a saved insert location, check to see if the saved
...
insert location has become an "inserted" instruction since the time
it was saved. If so, advance to the first non-"inserted" instruction.
llvm-svn: 96203
2010-02-15 00:21:43 +00:00
4aa57ba3ef
mark "addr" as having type "iPTR", eliminating some type comparisons
...
in hte generated dag isel fil.
llvm-svn: 96193
2010-02-14 21:53:19 +00:00
e4e51a63da
Fix whitespace.
...
llvm-svn: 96179
2010-02-14 18:51:39 +00:00
e7f74bb16c
Fix a comment.
...
llvm-svn: 96178
2010-02-14 18:51:20 +00:00
bb7d52213c
When complicated expressions are broken down into subexpressions
...
with multiplication by constants distributed through, occasionally
those subexpressions can include both x and -x. For now, if this
condition is discovered within LSR, just prune such cases away,
as they won't be profitable. This fixes a "zero allocated in a
base register" assertion failure.
llvm-svn: 96177
2010-02-14 18:50:49 +00:00
d6cbe9f23f
fixes to pagesel/banksel inserter.
...
1. restore these across direct/indirect calls.
2. restore pagesel for any macros with gotos.
llvm-svn: 96175
2010-02-14 18:27:42 +00:00
0a5e0371b0
Forgot to commit the header
...
llvm-svn: 96174
2010-02-14 18:25:41 +00:00
3b38fd6488
follow-on to PR6280
...
llvm-svn: 96172
2010-02-14 18:20:09 +00:00
ce77ce3072
Drop winmcasminfo and use normal AT&T COFF for all windows targets.
...
Otherwise AT&T asm printer is used with non-compatible MCAsmInfo and
there is no way to override this behaviour.
llvm-svn: 96165
2010-02-14 15:19:54 +00:00
c95a814ec3
Try to factorize the specification of saturating add/subtract operations a bit,
...
as suggested by Bob Wilson.
llvm-svn: 96153
2010-02-14 06:32:20 +00:00
2d0f96d49a
Actually, this code doesn't have to be quite so conservative in
...
the no-TLI case. But it should still default to declining the
transformation.
llvm-svn: 96152
2010-02-14 03:21:49 +00:00
6b7517342e
In rememberInstruction, if the value being remembered is the
...
current insertion point, advance the current insertion point.
This avoids a use-before-def situation in a testcase extracted
from clang which is difficult to reduce to a reasonable-sized
regression test.
llvm-svn: 96151
2010-02-14 03:12:47 +00:00
f446713fd0
Simplify this code; no need for a custom subclass if it doesn't need
...
to override anything from the parent class.
llvm-svn: 96150
2010-02-14 02:48:58 +00:00
cb76a806f0
Don't attempt aggressive post-inc uses if TargetLowering is not available,
...
because profitability can't be sufficiently approximated.
llvm-svn: 96148
2010-02-14 02:45:21 +00:00
0daaf13b97
Make LSR not crash if invoked without target lowering info, e.g. if invoked
...
from opt.
llvm-svn: 96135
2010-02-13 23:40:16 +00:00
843a4cc43c
Fix a problem where we had bitcasted operands that gave us
...
odd offsets since the bitcasted pointer size and the offset pointer
size are going to be different types for the GEP vs base object.
llvm-svn: 96134
2010-02-13 23:38:01 +00:00
406cd61828
teach the encoder to handle pseudo instructions like FP_REG_KILL,
...
encoding them into nothing.
llvm-svn: 96110
2010-02-13 19:16:53 +00:00
b8639bc2d1
remove dead code.
...
llvm-svn: 96109
2010-02-13 19:07:06 +00:00
8408c126c1
MCAssembler: Fix pcrel relocations. Oh and,
...
--
ddunbar@ozzy:tmp$ clang -m32 -integrated-as hello.c && ./a.out
hello world!
--
llvm-svn: 96096
2010-02-13 09:45:59 +00:00
1e2fad3de8
MC/Mach-O: Start emitting fixups/relocations for instructions.
...
llvm-svn: 96095
2010-02-13 09:29:02 +00:00
3374835b46
MCAssembler: Switch MCAsmFixup to storing MCFixupKind instead of just a size.
...
llvm-svn: 96094
2010-02-13 09:28:54 +00:00
97867a9cfc
MCAssembler: Sink fixup list into MCDataFragment.
...
llvm-svn: 96093
2010-02-13 09:28:43 +00:00
056bc60336
MCAssembler: Switch MCFillFragment to only taking constant values. Symbolic expressions can always be emitted as data + fixups.
...
llvm-svn: 96092
2010-02-13 09:28:32 +00:00
1a1fbb50fc
MC/Mach-O: Implement EmitValue using data fragments + fixups instead of fill fragment.
...
llvm-svn: 96091
2010-02-13 09:28:22 +00:00
8e53203154
MCAssembler: Start applying fixups in the data section.
...
llvm-svn: 96090
2010-02-13 09:28:15 +00:00
bedf1d4a41
MCAssembler: Add assorted dump() methods.
...
llvm-svn: 96089
2010-02-13 09:28:03 +00:00
2610a34b15
X86: Move extended MCFixupKinds into X86FixupKinds.h
...
llvm-svn: 96088
2010-02-13 09:27:52 +00:00
42c66b7270
Split some code out to a helper function (FindReusablePredBB)
...
and add a doxygen comment.
Cache the phi entry to avoid doing tons of
PHINode::getBasicBlockIndex calls in the common case.
On my insane testcase from re2c, this speeds up CGP from
617.4s to 7.9s (78x).
llvm-svn: 96083
2010-02-13 05:35:08 +00:00
5e7f705934
Speed up codegen prepare from 3.58s to 0.488s.
...
llvm-svn: 96081
2010-02-13 05:01:14 +00:00
72c4dce884
PHINode::getBasicBlockIndex is O(n) in the number of inputs
...
to a PHI, avoid it in the common case where the BB occurs
in the same index for multiple phis. This speeds up CGP on
an insane testcase from 8.35 to 3.58s.
llvm-svn: 96080
2010-02-13 04:24:19 +00:00
b0ebb65ab0
iterate over preds using PHI information when available instead of
...
using pred_begin/end. It is much faster.
llvm-svn: 96079
2010-02-13 04:15:26 +00:00
96b8826542
speed up CGP a bit by scanning predecessors through phi operands
...
instead of with pred_begin/end.
llvm-svn: 96078
2010-02-13 04:04:42 +00:00
f83726f6ba
add encoder support and tests for rdtscp
...
llvm-svn: 96076
2010-02-13 03:42:24 +00:00
52a6ab3ba7
Add SETEND and BXJ instructions for disassembly only.
...
llvm-svn: 96075
2010-02-13 02:51:09 +00:00
4d804d794f
Added the rdtscp instruction to the x86 instruction
...
tables.
llvm-svn: 96073
2010-02-13 02:06:11 +00:00
b659c76c77
Fix PR6283.
...
When coalescing with a physreg, remember to add imp-def and imp-kill when
dealing with sub-registers.
Also fix a related bug in VirtRegRewriter where substitutePhysReg may
reallocate the operand list on an instruction and invalidate the reg_iterator.
This can happen when a register is mentioned twice on the same instruction.
llvm-svn: 96072
2010-02-13 02:06:10 +00:00
5b18f039eb
Fix a pruning heuristic which implicitly assumed that SmallPtrSet is
...
deterministically sorted.
llvm-svn: 96071
2010-02-13 02:06:02 +00:00
3b065cdb64
Teach MachineFrameInfo to track maximum alignment while stack objects are being
...
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.
llvm-svn: 96069
2010-02-13 01:56:41 +00:00
492b8b42cd
Enable the inlinehint attribute in the Inliner.
...
Functions explicitly marked inline will get an inlining threshold slightly
more aggressive than the default for -O3. This means than -O3 builds are
mostly unaffected while -Os builds will be a bit bigger and faster.
The difference depends entirely on how many 'inline's are sprinkled on the
source.
In the CINT2006 suite, only these tests are significantly affected under -Os:
Size Time
471.omnetpp +1.63% -1.85%
473.astar +4.01% -6.02%
483.xalancbmk +4.60% 0.00%
Note that 483.xalancbmk runs too quickly to give useful timing results.
llvm-svn: 96066
2010-02-13 01:51:53 +00:00
44232af55a
Fixed encodings for invlpg, invept, and invvpid.
...
llvm-svn: 96065
2010-02-13 01:48:34 +00:00
d0c6d361fe
MC/AsmParser: Attempt to constant fold expressions up-front. This ensures we avoid fixups for obvious cases like '-(16)'.
...
llvm-svn: 96064
2010-02-13 01:28:07 +00:00
b0208d2a06
Added a bunch of saturating add/subtract instructions for disassembly only.
...
llvm-svn: 96063
2010-02-13 01:21:01 +00:00
509154e0f9
rip out the 'heinous' x86 MCCodeEmitter implementation.
...
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
llvm-svn: 96059
2010-02-13 00:49:29 +00:00
140caa7240
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
...
fix swapgs to be spelled right.
llvm-svn: 96058
2010-02-13 00:41:14 +00:00
01abf8fc2f
Besides removing phi cycles that reduce to a single value, also remove dead
...
phi cycles. Adjust a few tests to keep dead instructions from being optimized
away. This (together with my previous change for phi cycles) fixes Apple
radar 7627077.
llvm-svn: 96057
2010-02-13 00:31:44 +00:00
fe873e7c10
Override dominates and properlyDominates for SCEVAddRecExpr, as a
...
SCEVAddRecExpr doesn't necessarily dominate blocks merely dominated
by all of its operands. This fixes an abort compiling 403.gcc.
llvm-svn: 96056
2010-02-13 00:19:39 +00:00
224340cabe
MC/X86: Push immediate operands as immediates not expressions when possible.
...
llvm-svn: 96055
2010-02-13 00:17:21 +00:00
01f88a96c5
Make PassRegistrar thread-safe since it can be modified by code running in
...
separate LLVMContexts.
llvm-svn: 96051
2010-02-13 00:03:17 +00:00
064e926362
Remove special cases for [LM]FENCE, MONITOR and MWAIT from
...
encoder and decoder by using new MRM_ forms.
llvm-svn: 96048
2010-02-12 23:54:57 +00:00
1e827fd8ca
implement the rest of correct x86-64 encoder support for
...
rip-relative addresses, and add a testcase.
llvm-svn: 96040
2010-02-12 23:24:09 +00:00
626b79d6a6
Add the problem I just hacked around in 96015/96020.
...
The solution there produces correct code, but is seriously
deficient in several ways.
llvm-svn: 96039
2010-02-12 23:16:24 +00:00
741580a5bd
give MCCodeEmitters access to the current MCContext.
...
llvm-svn: 96038
2010-02-12 23:12:47 +00:00
2d36eb6e18
Make JIT::runFunction clean up the generated stub function.
...
Patch by Shivram K!
llvm-svn: 96037
2010-02-12 23:05:31 +00:00
4ad96055fb
implement infrastructure to support fixups for rip-rel
...
addressing. This isn't complete because I need an MCContext
to generate new MCExprs.
llvm-svn: 96036
2010-02-12 23:00:36 +00:00
29a9103ee6
Add YIELD, WFE, WFI, and SEV instructions for disassembly only.
...
Plus add two formats: MiscFrm and ThumbMiscFrm. Some of the for disassembly
only instructions are changed from Pseudo Format to MiscFrm Format.
llvm-svn: 96032
2010-02-12 22:53:19 +00:00
d18320361f
pull the rip-relative addressing mode case up early.
...
llvm-svn: 96031
2010-02-12 22:47:55 +00:00
6c1c0141be
fixme resolved!
...
llvm-svn: 96029
2010-02-12 22:39:06 +00:00
0055e75249
start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls.
...
llvm-svn: 96028
2010-02-12 22:36:47 +00:00
12455ca03d
enhance the immediate field encoding to know whether the immediate
...
is pc relative or not, mark call and branches as pcrel.
llvm-svn: 96026
2010-02-12 22:27:07 +00:00
439bda9d3f
Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case.
...
llvm-svn: 96023
2010-02-12 22:17:21 +00:00
cb39340b81
This should have gone in with 26015, see comments there.
...
llvm-svn: 96020
2010-02-12 22:00:40 +00:00
dc2051c802
Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only.
...
llvm-svn: 96019
2010-02-12 21:59:23 +00:00
26062150fa
When save/restoring CR at prolog/epilog, in a large
...
stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot. Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.
SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.
Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.
llvm-svn: 96015
2010-02-12 21:35:34 +00:00
392be58cad
Add support for a union type in LLVM IR. Patch by Talin!
...
llvm-svn: 96011
2010-02-12 20:49:41 +00:00
bdf1b9520c
Add SWP (Swap) and SWPB (Swap Byte) for disassembly only.
...
llvm-svn: 96010
2010-02-12 20:48:24 +00:00
545d36019b
Also recognize armv6t2-* and armv5te-* triplets.
...
llvm-svn: 96008
2010-02-12 20:39:35 +00:00
1a8674e60b
Fix a case of mismatched types in an Add that turned up in 447.dealII.
...
llvm-svn: 96007
2010-02-12 20:39:25 +00:00
9aa30fbe02
Add ARM bitcode file magic.
...
llvm-svn: 96006
2010-02-12 20:13:44 +00:00
2b75de97c0
Reapply 95979, a compile-time speedup, now that the bug it exposed is fixed.
...
llvm-svn: 96005
2010-02-12 19:35:25 +00:00
363f847ec6
Fix this code to avoid dereferencing an end() iterator in
...
offset distributions it doesn't expect.
llvm-svn: 96002
2010-02-12 19:20:37 +00:00
cf20cbec49
Add CPS, MRS, MRSsys, MSR, MSRsys for disassembly only.
...
llvm-svn: 95999
2010-02-12 18:55:33 +00:00
30d99f4b9b
Rewrite handling of DBG_VALUE; previous algorithm
...
didn't handle
X =
Y<dead> = use X
DBG_VALUE(X)
I was hoping to avoid this approach as it's slower,
but I don't think it can be done.
llvm-svn: 95996
2010-02-12 18:40:17 +00:00
75879be9d8
1. modernize the constantmerge pass, using densemap/smallvector.
...
2. don't bother trying to merge globals in non-default sections,
doing so is quite dubious at best anyway.
3. fix a bug reported by Arnaud de Grandmaison where we'd try to
merge two globals in different address spaces.
llvm-svn: 95995
2010-02-12 18:17:23 +00:00
e0b2c69d3c
Revert "Reverse the order for collecting the parts of an addrec. The order", it
...
is breaking llvm-gcc bootstrap.
llvm-svn: 95988
2010-02-12 17:27:08 +00:00
c3c357006e
Setup correct data layout to match gcc's expectations on mingw32.
...
llvm-svn: 95981
2010-02-12 15:28:56 +00:00
c9276dfe04
Cleanup stdcall / fastcall name mangling.
...
This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936
llvm-svn: 95980
2010-02-12 15:28:40 +00:00
0194f58047
Reverse the order for collecting the parts of an addrec. The order
...
doesn't matter, except that ScalarEvolution tends to need less time
to fold the results this way.
llvm-svn: 95979
2010-02-12 11:08:26 +00:00
45774ce0ad
Reapply the new LoopStrengthReduction code, with compile time and
...
bug fixes, and with improved heuristics for analyzing foreign-loop
addrecs.
This change also flattens IVUsers, eliminating the stride-oriented
groupings, which makes it easier to work with.
llvm-svn: 95975
2010-02-12 10:34:29 +00:00
c7ef4cc9fc
* Updated the cost matrix normalization proceedure to better handle infinite costs.
...
* Enabled R1/R2 application for nodes with infinite spill costs in the Briggs heuristic (made
safe by the changes to the normalization proceedure).
* Removed a redundant header.
llvm-svn: 95973
2010-02-12 09:43:37 +00:00
f7477e599f
add a bunch of mod/rm encoding types for fixed mod/rm bytes.
...
This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.
llvm-svn: 95960
2010-02-12 02:06:33 +00:00
44ac89f517
revert r95949, it turns out that adding new prefixes is not a
...
great solution for the disassembler, we'll go with "plan b".
llvm-svn: 95957
2010-02-12 01:55:31 +00:00
905a2d7727
Added coprocessor Instructions CDP, CDP2, MCR, MCR2, MRC, MRC2, MCRR, MCRR2,
...
MRRC, MRRc2. For disassembly only.
llvm-svn: 95955
2010-02-12 01:44:23 +00:00
0827e040e0
Add a new pass on machine instructions to optimize away PHI cycles that
...
reduce down to a single value. InstCombine already does this transformation
but DAG legalization may introduce new opportunities. This has turned out to
be important for ARM where 64-bit values are split up during type legalization:
InstCombine is not able to remove the PHI cycles on the 64-bit values but
the separate 32-bit values can be optimized. I measured the compile time
impact of this (running llc on 176.gcc) and it was not significant.
llvm-svn: 95951
2010-02-12 01:30:21 +00:00
d7e9212e2d
X86: Fix definition for RCL/RCR.*m? operations -- they were getting represented
...
with "tied memory operands", which is wrong.
llvm-svn: 95950
2010-02-12 01:22:03 +00:00
336f9abb45
add another bit of space for new kinds of instruction prefixes.
...
llvm-svn: 95949
2010-02-12 01:15:16 +00:00
c780af6471
Add a missing pattern for movhps so that we get:
...
movq (%ecx,%edx,2), %xmm2
movhps (%ecx,%eax,2), %xmm2
rather than:
movq (%eax, %edx, 2), %xmm2
movq (%eax, %ebx, 2), %xmm3
movlhps %xmm3, %xmm2
Testcase forthcoming.
llvm-svn: 95948
2010-02-12 01:10:45 +00:00
1572e760bc
fix the encodings of monitor and mwait, which were completely
...
busted in both encoders. I'm not bothering to fix it in the
old one at this point.
llvm-svn: 95947
2010-02-12 01:06:22 +00:00
62f50dad8d
improve support for minix, PR6280, patch by
...
Kees van Reeuwijk!
llvm-svn: 95946
2010-02-12 00:37:46 +00:00
be5557e86b
Add a new function attribute, 'alignstack'. It will indicate (when the backends
...
implement support for it) that the stack should be forcibly realigned in the
prologue (and the process reversed in the epilogue).
llvm-svn: 95945
2010-02-12 00:31:15 +00:00
93c92225af
Reapply coalescer fix for better cross-class coalescing.
...
This time with fixed test cases.
llvm-svn: 95938
2010-02-11 23:55:29 +00:00
b1913c4df9
enhance llvm-mc -show-inst to print the enum of an instruction, like so:
...
testb %al, %al ## <MCInst #2412 TEST8rr
## <MCOperand Reg:2>
## <MCOperand Reg:2>>
jne LBB1_7 ## <MCInst #938 JNE_1
## <MCOperand Expr:(LBB1_7)>>
llvm-svn: 95935
2010-02-11 22:57:32 +00:00
524138176d
add a new MCInstPrinter::getOpcodeName interface, when it is
...
implemented, llvm-mc --show-inst now uses it to print the
instruction opcode as well as the number.
llvm-svn: 95929
2010-02-11 22:39:10 +00:00
b8af65ed0b
improve encoding information for branches. We now know they have
...
8 or 32-bit immediates, which allows the new encoder to handle
them.
llvm-svn: 95927
2010-02-11 21:45:31 +00:00
1d34759721
MC: Move assembler-backend's fixup list into the fragment.
...
llvm-svn: 95926
2010-02-11 21:29:46 +00:00
ee82e763e6
MC: Move MCSectionData::Fixup out to MCAsmFixup.
...
llvm-svn: 95925
2010-02-11 21:29:29 +00:00
ddeceae839
make getFixupKindInfo return a const reference, allowing
...
the tables to be const. Teach MCCodeEmitter to handle
the target-indep kinds so that we don't crash on them.
llvm-svn: 95924
2010-02-11 21:27:18 +00:00
0d642824d6
Revert functional change. This broke a bunch of tests.
...
llvm-svn: 95921
2010-02-11 21:19:44 +00:00
2a34015abc
switch to target-indep fixups for 1/2/4/8 byte data.
...
llvm-svn: 95920
2010-02-11 21:17:54 +00:00
c07f1f4f7b
revert 95903.
...
llvm-svn: 95918
2010-02-11 20:58:56 +00:00
28139f0043
It is always good to do a cross-class join when the large register has a tiny interval.
...
Also avoid division by zero.
llvm-svn: 95917
2010-02-11 20:58:45 +00:00
af88c0a84d
Added LDRT/LDRBT/STRT/STRBT for disassembly only.
...
llvm-svn: 95916
2010-02-11 20:31:08 +00:00
1f298326b0
unbreak the build.
...
llvm-svn: 95915
2010-02-11 19:52:11 +00:00
11ddc679ca
Destroy MDNodes while destructing llvm context.
...
llvm-svn: 95903
2010-02-11 19:35:10 +00:00
2b0a7a2592
refactor the conditional jump instructions in the .td file to
...
use a multipattern that generates both the 1-byte and 4-byte
versions from the same defm
llvm-svn: 95901
2010-02-11 19:25:55 +00:00
3964059a16
Forgot to also check in this file for vcvt (floating-point <-> fixed-point, VFP).
...
Sorry!
llvm-svn: 95892
2010-02-11 18:47:03 +00:00
177ced3953
Allow for more than one DBG_VALUE targeting the
...
same dead instruction.
llvm-svn: 95890
2010-02-11 18:23:23 +00:00
12565de705
Don't allow DBG_VALUE to affect codegen.
...
llvm-svn: 95889
2010-02-11 18:22:31 +00:00
2588efd071
Added VCVT (between floating-point and fixed-point, VFP) for disassembly.
...
A8.6.297
llvm-svn: 95885
2010-02-11 18:17:16 +00:00
f40b8e03fb
Added BKPT/tBKPT (breakpoint) to the instruction table for disassembly purpose.
...
llvm-svn: 95884
2010-02-11 18:12:29 +00:00
45396438c3
Use array_pod_sort instead of std::sort for improved code size.
...
Use SmallVector instead of std::vector for better speed when indirectbr has
few successors.
llvm-svn: 95879
2010-02-11 18:06:56 +00:00
cccdc13662
Make sure that ConstantExpr offsets also aren't off of extern
...
symbols.
Thanks to Duncan Sands for the testcase!
llvm-svn: 95877
2010-02-11 17:44:04 +00:00
9c13dfb5dd
Add pseudo instruction TRAP for disassembly, which is encoded according to A5-21
...
as the "Permanently UNDEFINED" instruction.
llvm-svn: 95873
2010-02-11 17:14:31 +00:00
243e1f21db
Use .empty() instead of .size().
...
llvm-svn: 95871
2010-02-11 10:37:57 +00:00
fbf1f02fee
dont' call getX86RegNum on X86::RIP, it doesn't like that. This
...
fixes the remaining x86-64 jit failures afaik.
llvm-svn: 95867
2010-02-11 08:45:56 +00:00
5a4ec879bf
fix a really nasty bug I introduced in r95693: r12 (and r12d,
...
r12b, etc) also encodes to a R/M value of 4, which is just
as illegal as ESP/RSP for the non-sib version an address.
This fixes x86-64 jit miscompilations of a bunch of programs.
llvm-svn: 95866
2010-02-11 08:41:21 +00:00
6bb2463f85
Add and commonize encoder support for all immediates.
...
Stub out some dummy fixups to make things work.
We can now emit fixups like this:
subl $20, %esp ## encoding: [0x83,0xec,A]
## fixup A - offset: 2, value: 20, kind: fixup_1byte_imm
Emitting $20 as a single-byte fixup to be later resolved
by the assembler is ridiculous of course (vs just emitting
the byte) but this is a failure of the matcher, which
should be producing an imm of 20, not an MCExpr of 20.
llvm-svn: 95860
2010-02-11 07:06:31 +00:00
167842f90b
generalize EmitDisplacementField to work with any size
...
and rename it to EmitImmediate.
llvm-svn: 95859
2010-02-11 06:54:23 +00:00
3555993312
eliminate the dead IsPCRel argument.
...
llvm-svn: 95858
2010-02-11 06:51:36 +00:00
5a40e6c95c
eliminate the dead "PCAdj" logic.
...
llvm-svn: 95857
2010-02-11 06:49:52 +00:00
c660b23075
Fix some of the memcheck errors found in the JIT unittests.
...
llvm-svn: 95856
2010-02-11 06:41:30 +00:00
Dan Gohman