Commit Graph

403558 Commits

Author SHA1 Message Date
Ted Woodward 1c05c52de2 [lldb-vscode] Fix coredump load source mapping for first file
SetSourceMapFromArguments is called after the core is loaded. This means
that the source file for the crashing code won't have the source map applied.
Move the call to SetSourceMapFromArguments in request_attach to just after
the call to RunInitCommands, matching request_launch behavior.

Reviewed By: clayborg, wallace

Differential Revision: https://reviews.llvm.org/D112834
2021-11-01 10:47:42 -05:00
Sanjay Patel 42c94bc1ab [InstCombine] allow vector splat matching for bitwise logic fold
Similar to 54e969cffd (and with cosmetic updates to hopefully
make that easier to read), this fold has been around since early
in LLVM history.

Intermediate folds have been added subsequently, so extra uses
are required to exercise this code.

The test example actually shows an unintended consequence with
extra uses - we end up with an extra instruction compared to what
we started with. But this at least makes scalar/vector consistent.

General proof:
https://alive2.llvm.org/ce/z/tmuBza
2021-11-01 11:39:48 -04:00
Sanjay Patel beb5396d52 [InstCombine] add tests for bitwise logic folds; NFC 2021-11-01 11:39:48 -04:00
Jinsong Ji bd932f7499 [NFC][PowerPC] Update testcases using script
For D106555.
2021-11-01 15:37:23 +00:00
Kazu Hirata d000431fb2 [X86] Remove X86ELFObjectWriter in X86AsmBackend.cpp (NFC)
Note that the identically named class is defined in an anonymous
namespace in X86ELFObjectWriter.cpp.
2021-11-01 08:31:54 -07:00
Jay Foad 7afef22926 [AMDGPU] Use MachineInstrBuilder::addReg. NFC. 2021-11-01 15:29:51 +00:00
Weiwei Li 3483fc5a31 [mlir][SPIRVToLLVM] Add shufflevector conversion
Add the shufflevector conversion. It only handles the static, i.e., IntegerAttr, index.

Co-authored: Xinyi Liu <xyliuhelen@gmail.com>

Reviewed by: antiagainst

Differential revision: https://reviews.llvm.org/D112161
2021-11-01 23:05:37 +08:00
Raphael Isemann 9e0a39f378 [lldb] Add a test for class loading via member typedefs
This is currently only tested indirectly in the huge stdlibc++ formatter tests.
2021-11-01 15:58:45 +01:00
Jay Foad b85995f6c4 [AMDGPU] Add tests for legacy multiply-add with immediate 2021-11-01 14:24:13 +00:00
Louis Dionne b889cbf366 [libc++] Refactor num_put::do_put to reduce duplication
I was going to make a change in that area of the code and I noticed that
we basically duplicated the same code 5 times to handle integral types
and floating point types. This commit simply pulls the duplication into
a function.

Differential Revision: https://reviews.llvm.org/D112830
2021-11-01 10:05:10 -04:00
Jay Foad 2b548b18c1 [AMDGPU] Shrink v_mac_legacy_f32 and v_fmac_legacy_f32
Differential Revision: https://reviews.llvm.org/D112917
2021-11-01 13:55:53 +00:00
Jinsong Ji 838d8d1e2b [AIX][NFC] Unsupported object-c test 2021-11-01 13:44:23 +00:00
Matt Morehouse 4d8b0aa5c0 [HWASan] Apply TagMaskByte to every global tag.
Previously we only applied it to the first one, which could allow
subsequent global tags to exceed the valid number of bits.

Reviewed By: hctim

Differential Revision: https://reviews.llvm.org/D112853
2021-11-01 06:31:44 -07:00
Matt Morehouse b298d6d162 [sanitizer] Disable posix_spawn.c test on Android. 2021-11-01 06:22:48 -07:00
Sanjay Patel 54e969cffd [InstCombine] allow vector splat matching for bitwise logic folds
This fold was added long ago (part of fixing PR4216),
and it matched scalars only. Intermediate folds have
been added subsequently, so extra uses are required
to exercise this code.

General proof:
https://alive2.llvm.org/ce/z/G6BBhB

One of the specific tests:
https://alive2.llvm.org/ce/z/t0JhEB
2021-11-01 08:26:42 -04:00
Sanjay Patel 511ee8759f [InstCombine] reduce code duplication with commutative matcher; NFC 2021-11-01 08:26:41 -04:00
Sanjay Patel 701923a60f [InstCombine] add tests for bitwise logic folds; NFC
The extra uses are needed to prevent intermediate folds.
Without that, there would be no coverage currently.
The vector tests show an artificial limitation in the code.
2021-11-01 08:26:41 -04:00
Dmitry Makogon ce12e68a49 [Test] Fix tests showing generation of already existent PHIs by GVN
This is a fix for tests added by 96591a14cd.
A function which was called in tests wasn't marked as 'readonly', and the
GVN performed PRE for the loads, but they were supposed to be non-local.
So added 'readonly' to the called function.
2021-11-01 18:56:11 +07:00
Mubashar Ahmad 0b83a18a2b [AArch64] Enablement of Cortex-X2
Enables support for Cortex-X2 cores.

Differential Revision: https://reviews.llvm.org/D112459
2021-11-01 11:55:24 +00:00
Simon Pilgrim 6fc50e531d [CostModel][X86] Remove old FIXME comments for AVX512F vector splitting
Similar to AVX1, the cost of splitting/merging 512-bit -> 256-bits vectors for arithmetic operations are typically hidden due to different used ports etc.
2021-11-01 11:11:11 +00:00
gbreynoo 2b841e4cb9 [llvm-dwarfdump] Improve testing of --summarize-types
Differential Revision: https://reviews.llvm.org/D112151
2021-11-01 11:07:15 +00:00
Simon Pilgrim fd485d8cda [X86][AVX] Prefer VINSERTF128 over VPERM2F128 for 128->256 subvector concatenations
The VINSERTF128 instruction is often much quicker, and never slower, than the more general VPERM2F128 instruction, so we should try to use that in more circumstances.

This requires a fallback to a commuted VPERM2F128 for the case where we need to fold the 256-bit vector source instead of the 128-bit subvector source.

There is one interesting side effect - DAGCombine's narrowExtractedVectorLoad combine gets called in a number of locations, this often creates an extracted subvector load without regard to other uses of the original wider load. I'm expecting AVX cpus to be capable of merging such aliased loads, but I do wonder whether narrowExtractedVectorLoad's call to X86TargetLowering::shouldReduceLoadWidth needs to be altered to check for more partial uses?

Noticed while investigating the quality of interleaved load/store codegen.

Differential Revision: https://reviews.llvm.org/D111960
2021-11-01 10:45:50 +00:00
David Sherwood 87a294d5eb [LoopVectorize] Change getRuntimeVFAsFloat to use unsigned int->FP conversion
We never expect the runtime VF to be negative so we should use
the uitofp instruction instead of sitofp.

Differential revision: https://reviews.llvm.org/D112610
2021-11-01 09:58:14 +00:00
Diana Picus 9df0ba599c [flang] Implement GET_ENVIRONMENT_VARIABLE(VALUE)
Implement the second entry point for GET_ENVIRONMENT_VARIABLE. Reuse
existing bits and pieces wherever possible.

This patch also increases CFI_* error codes in order to avoid conflicts.
GET_ENVIRONMENT_VARIABLE is required to return a status of 1 if an
environment variable does not exist and 2 if environment variables are
not supported. However, if we add status codes for that they will
conflict with CFI_ERROR_BASE_ADDR_NULL and CFI_ERROR_BASE_ADDR_NOT_NULL,
which are also 1 and 2 at the moment. We therefore move all CFI error
codes up (an arbitrary) 10 spots to make room. Hopefully this isn't
a problem, since we weren't matching the CFI error codes that gfortran
uses anyway. It may still be an issue if any other runtime functions
will need to return a status of 1 or 2, but we should probably deal with
that when/if it occurs.

Differential Revision: https://reviews.llvm.org/D112698
2021-11-01 09:19:20 +00:00
Yi Kong c060457ec6 Revert "[opt-viewer] Use safe yaml load_all"
This reverts commit 1123e03a9d.

Broken on the AIX platform.
2021-11-01 17:18:49 +08:00
Roman Lebedev b554e41e2d
[CVP] Canonicalize signed relational comparisons of scalar integers to unsigned comparison predicates
Now that the reasoning was added to ConstantRange in D90924,
this replicates IndVars variant of this transform (D111836)
in a pass that uses value range reasoning for the transform.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D112895
2021-11-01 12:16:05 +03:00
Esme-Yi 81441cf44c [XCOFF] [llvm-readobj] replace tests using binary as input
with tests generated by yaml2obj.

Summary: Because yaml2obj supports basic transforming for XCOFF,
         some of the binary inputs used in the tests of llvm-readobj
         can be replaced with yaml files.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D111699
2021-11-01 08:43:32 +00:00
Matthias Springer 0118a8044f [ADT] Add Compare template param to EquivalenceClasses
This makes the class usable with types that do not provide their own operator<.

Update MLIR Linalg ComprehensiveBufferize to take advantage of the new template param.

Differential Revision: https://reviews.llvm.org/D112052
2021-11-01 17:16:03 +09:00
Jun Ma 1f9fa54984 [Taildup] Don't tail-duplicate loop header with multiple successors as its latches
when Taildup hit loop with multiple latches like:
  //    1 -> 2 <-> 3                 |
  //          \  <-> 4               |
  //           \   <-> 5             |
  //            \---> rest           |
it may transform this loop into multiple loops by duplicate loop header.
However, this change may has little benefit while makes cfg much complex.
In some uncommon cases, it causes large compile time regression (offered by
@alexfh in D106056).

This patch disable tail-duplicate of such cases.

TestPlan: check-llvm

Differential Revision: https://reviews.llvm.org/D110613
2021-11-01 15:32:00 +08:00
Jun Ma f8833ba1ed [TailDup] Add testcase for interpreter switch loop, NFC. 2021-11-01 15:31:59 +08:00
Jun Ma c93f93b2e3 Revert "Revert "Recommit "Revert "[CVP] processSwitch: Remove default case when switch cover all possible values.""""
This reverts commit 3a998c06a8.
2021-11-01 15:31:59 +08:00
David Carlier b4fb42300e [sanitizer] msan build fix on non linux platforms 2021-11-01 07:18:43 +00:00
Kazu Hirata 476e1ee3da [AArch64] Remove unused declaration hasSwiftExtendedFrame (NFC) 2021-10-31 22:58:56 -07:00
Mogball e85827532b [mlir][arith] `traits` need to be passed to parent op
Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D112828
2021-11-01 05:12:47 +00:00
Max Kazantsev e512c5b166 [SCEV][NFC] Factor out common API for getting unique operands of a SCEV
This function is used at least in 2 places, to it makes sense to make it separate.

Differential Revision: https://reviews.llvm.org/D112516
Reviewed By: reames
2021-11-01 11:36:47 +07:00
Chen Zheng eeed1545b2 [PowerPC] turn off chain commoning by default. 2021-11-01 04:11:10 +00:00
Fangrui Song 2f7366c89d [ELF] Simplify R_DTPREL. NFC 2021-10-31 20:30:00 -07:00
Itay Bookstein 848812a55e [Verifier] Add verification logic for GlobalIFuncs
Verify that the resolver exists, that it is a defined
Function, and that its return type matches the ifunc's
type. Add corresponding check to BitcodeReader, change
clang to emit the correct type, and fix tests to comply.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D112349
2021-10-31 20:00:57 -07:00
Zi Xuan Wu cf78715cae [CSKY] First patch to construct codegen infra and generate first add instruction
Ooops. It constructs codegen infra and provide only basic code to generate first add instruction successfully.

Differential Revision: https://reviews.llvm.org/D112206
2021-11-01 10:06:56 +08:00
Shoaib Meenai 264d3b6d4e [MachO] Use error instead of fatal for missing -arch
`fatal` should only be used for malformed inputs according to
ErrorHandler.h; `error` is more appropriate for missing arguments,
accompanied by a check to bail out early in case of the error. Some
tests need to be adjusted accordingly.

Makes `lld/test/MachO/arch.s` pass with `LLD_IN_TEST=2`.

Reviewed By: #lld-macho, int3

Differential Revision: https://reviews.llvm.org/D112879
2021-10-31 16:31:21 -07:00
Shoaib Meenai 0cf624cad7 [TimeProfiler] Reset variable to nullptr
Otherwise we'll hit a spurious assert failure when we reset and then
reinitialize TimeProfiler on the same thread, as can happen when e.g.
using LLD as a library and running it multiple times in the same
process.

Makes `lld/test/MachO/time-trace.s` pass with `LLD_IN_TEST=2`, which
runs the linker twice in the same process and exposed the issue.

Reviewed By: MaskRay, mehdi_amini

Differential Revision: https://reviews.llvm.org/D112880
2021-10-31 16:14:30 -07:00
Shoaib Meenai 0f6d720f1f [MachO] Properly reset global state
We need to reset global state between runs, similar to the other ports.
There's some file-static state which needs to be reset as well and we
need to add some new helpers for that.

With this change, most LLD Mach-O tests pass with `LLD_IN_TEST=2` (which
runs the linker twice on each test). Some tests will be fixed by the
remainder of this stack, and the rest are fundamentally incompatible
with that mode (e.g. they intentionally throw fatal errors).

Fixes PR52070.

Reviewed By: #lld-macho, int3

Differential Revision: https://reviews.llvm.org/D112878
2021-10-31 16:14:29 -07:00
Nico Weber f964ca896f [lld/coff] Add parsing for /pdbpagesize: flag
It's not used for anything yet, but we now accept `/pdbpagesize:4096`
(the default behavior) and we give arguably more useful diagnostics
for other values.

It's plumbed through to the MSF layer, so just uncommenting out
the bit in DriverUtils.cpp that rejects args other than 4096 is enough
to try other values.

Differential Revision: https://reviews.llvm.org/D112871
2021-10-31 18:36:23 -04:00
Fangrui Song 9f8ffaaa0b [ELF] Replace "symbol '...' has no type" diagnostic with "relocation ... cannot be used against symbol '...'"
The "symbol 'foo' has no type" diagnostic tries to inform that copy
relocation/canonical PLT entry cannot be used, but the diagnostic is often
incorrect and confusing.
2021-10-31 13:12:26 -07:00
Roman Lebedev 03a4f1f3b8
[ConstantRange] Sign-flipping of signedness-invariant comparisons
For certain combination of LHS and RHS constant ranges,
the signedness of the relational comparison predicate is irrelevant.

This implements complete and precise model for all predicates,
as confirmed by the brute-force tests. I'm not sure if there are
some more cases that we can handle here.

In a follow-up, CVP will make use of this.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D90924
2021-10-31 22:53:17 +03:00
Fangrui Song 164194a5af [ELF] Untangle R_GOT style TLS IE and processRelocAux. NFC 2021-10-31 12:38:36 -07:00
Vitaly Buka 948b91a08e [NFC][sanitizer] Atomix relaxed in TwoLevelMap
This is NOOP in x86_64.
On arch64 it avoids Data Memory Barrier with visible improvements on micro benchmarks.

Reviewed By: dvyukov

Differential Revision: https://reviews.llvm.org/D112391
2021-10-31 12:18:03 -07:00
Vitaly Buka e1240745ef [sanitizer] Add posix_spawn interceptor
To make pid initialized for Msan.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D112784
2021-10-31 12:10:54 -07:00
Fangrui Song 55e69ece72 [ELF] Remove -Wl,-z,notext hint
The hint does not pull its weight:

* adding -Wl,-z,notext often won't work (relocation types other than `symbolRel`, e.g. `R_AARCH64_LDST32_ABS_LO12_NC`)
* for pure (no assembly) C/C++ projects, the "-fPIC" hint is sufficient
2021-10-31 12:10:43 -07:00
Lang Hames 81a6eabf71 [ORC-RT] Add missing file that was left out of ff846fcb64. 2021-10-31 10:53:17 -07:00