a2137d6e09
[X86] Add -flax-vector-conversions=none to all of the x86 vector intrinsic header tests.
2020-01-23 20:43:50 -08:00
689b3b71af
[X86] Remove mask parameter from vpshufbitqmb intrinsics. Change result to a vXi1 vector.
...
We'll do the scalar<->vXi1 conversions with bitcasts in IR.
Fixes PR40258
llvm-svn: 351029
2019-01-14 00:03:55 +00:00
3d9305f28b
[X86] Fix the names of a bunch of icelake intrinsics.
...
Mostly this fixes the names of all the 128-bit intrinsics to start with _mm_ instead of _mm128_ as is the convention and what the Intel docs say.
This also fixes the name of the bitshuffle intrinsics to say epi64 for 128 and 256 bit versions.
llvm-svn: 333497
2018-05-30 03:38:15 +00:00
2268576fa0
[x86][icelake][bitalg]
...
added bitalg feature recognition
added intrinsics support for bitalg instructions
_mm512_popcnt_epi16
_mm512_mask_popcnt_epi16
_mm512_maskz_popcnt_epi16
_mm512_popcnt_epi8
_mm512_mask_popcnt_epi8
_mm512_maskz_popcnt_epi8
_mm512_mask_bitshuffle_epi64_mask
_mm512_bitshuffle_epi64_mask
_mm256_popcnt_epi16
_mm256_mask_popcnt_epi16
_mm256_maskz_popcnt_epi16
_mm128_popcnt_epi16
_mm128_mask_popcnt_epi16
_mm128_maskz_popcnt_epi16
_mm256_popcnt_epi8
_mm256_mask_popcnt_epi8
_mm256_maskz_popcnt_epi8
_mm128_popcnt_epi8
_mm128_mask_popcnt_epi8
_mm128_maskz_popcnt_epi8
_mm256_mask_bitshuffle_epi32_mask
_mm256_bitshuffle_epi32_mask
_mm128_mask_bitshuffle_epi16_mask
_mm128_bitshuffle_epi16_mask
matching a similar work on the backend (D40222)
Differential Revision: https://reviews.llvm.org/D41564
llvm-svn: 321483
2017-12-27 10:01:00 +00:00
Craig Topper