5 Commits

Author	SHA1	Message	Date
Dan Gohman	a5b9645c4b	Split the Add, Sub, and Mul instruction opcodes into separate ... integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt llvm-svn: 72897	2009-06-04 22:49:04 +00:00
Eli Friedman	9030c35eb4	Fix for PR4235: to build a floating-point value from integer parts, ... build an integer and cast that to a float. This fixes a crash caused by trying to split an f32 into two f16's. This changes the behavior in test/CodeGen/XCore/fneg.ll because that testcase now triggers a DAGCombine which converts the fneg into an integer operation. If someone is interested, it's probably possible to tweak the test to generate an actual fneg. llvm-svn: 72162	2009-05-20 06:02:09 +00:00
Anton Korobeynikov	6de08cd093	Mark rotl/rotr as expand. This generates pretty ugly code, but this is better than nothing. ... llvm-svn: 71976	2009-05-17 10:16:28 +00:00
Anton Korobeynikov	6b5523aec2	Typo ... llvm-svn: 71975	2009-05-17 10:15:22 +00:00
Anton Korobeynikov	7706cb8d5d	Add MSP430 test for PR4136 ... llvm-svn: 71392	2009-05-10 14:48:36 +00:00