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79 Commits

Author SHA1 Message Date
Chris Lattner e32982cc52 Emit the string information for the asm writer as a single large string 
and index into it, instead of emitting it like this:

  static const char * const OpStrs[] = {
    "PHINODE\n",        // PHI
    0,  // INLINEASM
    "adc ",     // ADC32mi
    "adc ",     // ADC32mi8
   ...

The old way required thousands of relocations that slows down link time and
dynamic load times.

This also cuts about 10K off each of the X86 asmprinters, and should shrink
the others as well.

llvm-svn: 29152
 2006-07-14 22:59:11 +00:00
Chris Lattner 017b93dd7c instructions can be in different namespaces. Make sure to use the right 
one for each instruction.

llvm-svn: 28038
 2006-05-01 17:01:17 +00:00
Chris Lattner 5c76b499aa Add support for modifier strings in machine instr descriptions. This allows 
us to avoid creating lots of "Operand" types with different printers, instead
we can fold several together and use modifiers.  For example, we can now use:

${target:call} to say that the operand should be printed like a 'call' operand.

llvm-svn: 26024
 2006-02-06 23:40:48 +00:00
Chris Lattner 033e32e5d9 Simplify the variant handling code, no functionality change. 
llvm-svn: 26023
 2006-02-06 22:43:28 +00:00
Chris Lattner 244e800c19 add a note, ya knoe 
llvm-svn: 25880
 2006-02-01 19:12:23 +00:00
Chris Lattner 4d5a93ed28 Use printInlineAsm to, well, print inline asm's. 
llvm-svn: 25677
 2006-01-27 02:10:50 +00:00
Nate Begeman 6f8c1ace6e No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.

llvm-svn: 24541
 2005-11-30 18:54:35 +00:00
Jeff Cohen 5f4ef3c5a8 Eliminate all remaining tabs and trailing spaces. 
llvm-svn: 22523
 2005-07-27 06:12:32 +00:00
Chris Lattner 3a6a4d3707 Fix PR595: These error messages should not be looking at CGI.Name, they 
should be looking at CGI.TheDef->getName().

llvm-svn: 22445
 2005-07-15 22:43:04 +00:00
Nate Begeman 4f229d5197 Add support for a TODO; instructions in .td files can now have arguments 
printed as part of the opcode.  This allows something like
cmp${cc}ss in the x86 backed to be printed as cmpltss, cmpless, etc.
depending on what the value of $cc is.

llvm-svn: 22439
 2005-07-14 22:50:30 +00:00
Misha Brukman 650ba8eb56 Remove trailing whitespace 
llvm-svn: 21428
 2005-04-22 00:00:37 +00:00
Chris Lattner 97cf8fd4a9 Minor fix. 
llvm-svn: 19761
 2005-01-22 20:59:38 +00:00
Chris Lattner 59a7f5c2f3 This is the final big of factoring. This shares cases in suboperand 
differences, which means that identical instructions (after stripping off
the first literal string) do not run any different code at all.  On the X86,
this turns this code:

    switch (MI->getOpcode()) {
    case X86::ADC32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::ADC32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::ADC32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::ADD32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::ADD32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::ADD32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::AND32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::AND32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::AND32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::CMP32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::CMP32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::MOV32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::MOV32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::OR32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::OR32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::OR32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::ROL32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::ROR32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SAR32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SBB32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::SBB32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::SBB32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::SHL32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SHLD32mrCL: printOperand(MI, 4, MVT::i32); break;
    case X86::SHR32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SHRD32mrCL: printOperand(MI, 4, MVT::i32); break;
    case X86::SUB32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::SUB32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::SUB32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::TEST32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::TEST32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::TEST8mi: printOperand(MI, 4, MVT::i8); break;
    case X86::XCHG32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::XOR32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break;
    }

into this:

    switch (MI->getOpcode()) {
    case X86::ADC32mi:
    case X86::ADC32mr:
    case X86::ADD32mi:
    case X86::ADD32mr:
    case X86::AND32mi:
    case X86::AND32mr:
    case X86::CMP32mi:
    case X86::CMP32mr:
    case X86::MOV32mi:
    case X86::MOV32mr:
    case X86::OR32mi:
    case X86::OR32mr:
    case X86::SBB32mi:
    case X86::SBB32mr:
    case X86::SHLD32mrCL:
    case X86::SHRD32mrCL:
    case X86::SUB32mi:
    case X86::SUB32mr:
    case X86::TEST32mi:
    case X86::TEST32mr:
    case X86::XCHG32mr:
    case X86::XOR32mi:
    case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::ADC32mi8:
    case X86::ADD32mi8:
    case X86::AND32mi8:
    case X86::OR32mi8:
    case X86::ROL32mi:
    case X86::ROR32mi:
    case X86::SAR32mi:
    case X86::SBB32mi8:
    case X86::SHL32mi:
    case X86::SHR32mi:
    case X86::SUB32mi8:
    case X86::TEST8mi:
    case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break;
    }

After this, the generated asmwriters look pretty much as though they were
generated by hand.  This shrinks the X86 asmwriter.inc files from 55101->39669
and 55429->39551 bytes each, and PPC from 16766->12859 bytes.

llvm-svn: 19760
 2005-01-22 20:31:17 +00:00
Chris Lattner 92275bb6bb Implement *even more* factoring. In particular, if all of the instruction 
strings starts out with a constant string, we emit the string first, using
a table lookup (instead of a switch statement).

Because this is usually the opcode portion of the asm string, the differences
between the instructions have now been greatly reduced.  This allows many
more case statements to be grouped together.

This patch also allows instruction cases to be grouped together when the
instruction patterns are exactly identical (common after the opcode string
has been ripped off), and when the differing operand is a MachineInstr
operand that needs to be formatted.

The end result of this is a mean and lean generated AsmPrinter!

llvm-svn: 19759
 2005-01-22 19:22:23 +00:00
Jeff Cohen da636b3783 Fix VC++ compilation error 
llvm-svn: 19757
 2005-01-22 18:50:10 +00:00
Chris Lattner 9ceb7c8f23 Implement factoring of instruction pattern strings. In particular, instead of 
emitting code like this:

  case PPC::ADD: O  << "add ";  printOperand(MI, 0, MVT::i64); O  << ", ";  prin
tOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '\n
'; break;
  case PPC::ADDC: O  << "addc ";  printOperand(MI, 0, MVT::i64); O  << ", ";  pr
intOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '
\n'; break;
  case PPC::ADDE: O  << "adde ";  printOperand(MI, 0, MVT::i64); O  << ", ";  pr
intOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '
\n'; break;
...

Emit code like this:

  case PPC::ADD:
  case PPC::ADDC:
  case PPC::ADDE:
  ...
    switch (MI->getOpcode()) {
    case PPC::ADD: O << "add "; break;
    case PPC::ADDC: O << "addc "; break;
    case PPC::ADDE: O << "adde "; break;
    ...
    }
    printOperand(MI, 0, MVT::i64);
    O << ", ";
    printOperand(MI, 1, MVT::i64);
    O << ", ";
    printOperand(MI, 2, MVT::i64);
    O << "\n";
    break;

This shrinks the PPC asm writer from 24785->15205 bytes (even though the new
asmwriter has much more whitespace than the old one), and the X86 printers shrink
quite a bit too.  The important implication of this is that GCC no longer hits swap
when building the PPC backend in optimized mode.  Thus this fixes PR448.

-Chris

llvm-svn: 19755
 2005-01-22 18:38:13 +00:00
Chris Lattner b6f5d9a82a Fix the ::: problem 
llvm-svn: 19754
 2005-01-22 18:18:59 +00:00
Chris Lattner 3baf682110 Minor refactoring, no functionality change. 
llvm-svn: 19753
 2005-01-22 17:40:38 +00:00
Chris Lattner 0c23ba5c0f Seperate asmstring parsing from emission. This allows the code to be simpler 
and more understandable.  It also allows us to do simple things like fold
consequtive literal strings together.  For example, instead of emitting this
for the X86 backend:

  O  << "adc" << "l" << " ";

we now generate this:

  O << "adcl ";

*whoa* :)

This shrinks the X86 asmwriters from 62729->58267 and 65176->58644 bytes
for the intel/att asm writers respectively.

llvm-svn: 19749
 2005-01-22 17:32:42 +00:00
Andrew Lenharth 67e2e21353 make double-dollar properly escape asmstrings 
llvm-svn: 19740
 2005-01-22 00:35:22 +00:00
Chris Lattner 5499551206 Don't emit the method into the llvm namespace, let the #includer decide where it goes 
llvm-svn: 16934
 2004-10-12 16:21:18 +00:00
Chris Lattner 72770f5877 Correctly parse variant notation 
llvm-svn: 16637
 2004-10-03 20:19:02 +00:00
Chris Lattner c9d99efdd3 Do not #include files into the llvm namespace 
llvm-svn: 15849
 2004-08-17 03:08:28 +00:00
Chris Lattner 6ffa501d9f Make the AsmWriter a first-class tblgen object. Allow targets to specify 
name of the generated asmwriter class, and the name of the format string.

llvm-svn: 15747
 2004-08-14 22:50:53 +00:00
Chris Lattner baa2ecb798 Fix minor bug in previous checkin 
llvm-svn: 15649
 2004-08-11 04:08:36 +00:00
Chris Lattner c1904dd38f change how we invoke the printer. Instead of passing in the MO directly, 
pass in the MI, operand number, and the type of the operand.

llvm-svn: 15645
 2004-08-11 02:23:23 +00:00
Chris Lattner f40e4ebf19 Be picky 
llvm-svn: 15400
 2004-08-01 08:55:34 +00:00
Chris Lattner 65512a0c49 Add support for asm printing machine instructions that have operands. 
llvm-svn: 15391
 2004-08-01 07:43:02 +00:00
Chris Lattner 1c4ae85035 Initial cut at an asm writer emitter. So far, this only handles emission of 
instructions, and only instructions that take no operands at that!

llvm-svn: 15386
 2004-08-01 05:59:33 +00:00