Summary:
Bug pointed out by Benjamin Kramer in r264008. I think the bug is
benign because by the time this is called, we should only have at most
two overloads to consider (either a host and a device overload, or a
host+device overload, but not all three).
Reviewers: tra
Subscribers: cfe-commits, bkramer
Differential Revision: http://reviews.llvm.org/D21914
llvm-svn: 275233
Summary:
Specifically, this patch adds testcases for all three calls to
EraseUnwantedCUDAMatches. The addr-of-overloaded-fn test I accidentally
neutered in r264207, which moved much of
CodeGenCUDA/function-overload.cu into SemaCUDA/function-overload.cu.
The coverage from overloaded-delete test is new.
Reviewers: tra
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D21913
llvm-svn: 275232
Summary:
You can overload a destructor in CUDA, and SemaOverload needs to be
tweaked not to crash when it sees an explicit call to an overloaded
destructor.
Reviewers: rsmith
Subscribers: cfe-commits, tra
Differential Revision: http://reviews.llvm.org/D21912
llvm-svn: 275231
New pass manager for LICM.
Summary: Port LICM to the new pass manager.
Reviewers: davidxl, silvas
Subscribers: krasin, vitalybuka, silvas, davide, sanjoy, llvm-commits, mehdi_amini
Differential Revision: http://reviews.llvm.org/D21772
llvm-svn: 275224
The lookup tables can get out of date during the lifetime of the object so we
need to preserve LLDB's ability to answer questions about TagDecls' contents.
<rdar://problem/20751935>
llvm-svn: 275223
We can freeze the registers after the MachineFrameInfo has been configured (by
telling it about calls, inline asm, ...). This doesn't happen at all yet, but
will be part of IR translation.
Fixes -verify-machineinstrs assertion.
llvm-svn: 275221
The LCSSA pass itself will not generate several redundant PHI nodes in a single
exit block. However, such redundant PHI nodes don't violate LCSSA form, and may
be introduced by passes that preserve LCSSA, and/or preserved by the LCSSA pass
itself. So, assuming a single PHI node per exit block is not safe.
llvm-svn: 275217
Summary:
Refactored the profitability analysis out of the IC promotion pass and
into lib/Analysis so that it can be accessed by the summary index
builder in a follow-on patch to enable IC promotion in ThinLTO (D21932).
Reviewers: davidxl, xur
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D22182
llvm-svn: 275216
This patch corresponds to review:
http://reviews.llvm.org/D20239
It adds exploitation of XXINSERTW and XXEXTRACTUW instructions that
are useful in some cases for inserting and extracting vector elements of
v4[if]32 vectors.
llvm-svn: 275215
The thread registry test was failing to allocate 25 threads with stack
size 134MB, which is pretty reasonable.
Also print the error code in our pthread wrappers in case this happens
again.
llvm-svn: 275209
mov edi,edi is _not_ NOP in 64-bit, use 66,90h instead.
This bug was causing interception unittest to crash on
Windows64 (windows 8 and windows 10).
Credits to etienneb for finding the root cause.
Patch by: Wei Wang
Differential Revision: http://reviews.llvm.org/D22274
llvm-svn: 275207
With r274952 and r275201 in place there are no cases left where a
forward liveness analysis yields different results than a backward one.
So we can remove the forward stepping logic.
Differential Revision: http://reviews.llvm.org/D22083
llvm-svn: 275204
Use LivePhysRegs with a backwards walking algorithm to update live in
lists, this way the results do not depend on the presence of kill flags
anymore.
This patch also reduces the number of registers added as live-in.
Previously all pristine registers as well as all sub registers of a
super register were added resulting in unnecessarily large live in
lists. This fixed https://llvm.org/PR25263.
Differential Revision: http://reviews.llvm.org/D22027
llvm-svn: 275201
A BuiltinTemplateDecl has no underlying templated decl and as such they
cannot be relied upon for mangling. The ItaniumMangler had some bugs
here which lead to crashes.
This fixes PR28519.
llvm-svn: 275190
Check not only that the compiler is not crashing, but also whether the
probablematic part (The sequence of instructions simplified to '4') is reflected
in the output.
Thanks to Tobias for the hint.
llvm-svn: 275189
Loading a dynamic library can take quite a long time, since it triggers a number of
shared-library-event stops for dependent libraries. This is especially true for remote targets
due to communication latency. Increase the default 500ms timeout to account for that.
Committing as obvious.
llvm-svn: 275185
I am not sure exactly which test breakage Martin was trying to fix in
r273694. For now, fix the behavior for top-level conditionals, which
(surprisingly) are actually used somewhat commonly.
llvm-svn: 275183
Rui Ueyama