Commit Graph

347529 Commits

Author SHA1 Message Date
Igor Kudrin 35819ff3cf [DebugInfo] Fix reading range lists of v5 units in DWP.
In package files, the base offset provided by index sections should be
used to find the contribution of a unit. The patch adds that base
offset when reading range list tables.

Differential revision: https://reviews.llvm.org/D77401
2020-04-06 13:28:06 +07:00
Igor Kudrin a93b77b97f [DebugInfo] Fix reading location tables headers of v5 units in DWP.
This fixes the reading of location lists headers for compilation units
in package files by adjusting the reading offset according to the
corresponding record in the unit index. This is required for
DW_FORM_loclistx to work.

Differential revision: https://reviews.llvm.org/D77146
2020-04-06 13:28:06 +07:00
Igor Kudrin 49737df767 [DebugInfo] Fix reading location tables of v5 units in DWP.
Without the patch, all version 5 compile units in a DWP file read
location tables from the beginning of a .debug_loclists.dwo section.
The patch fixes that by adjusting the reading offset the same way as
for pre-v5 units. The section identifier to find the contribution
entry corresponds to the version of the unit.

Differential revision: https://reviews.llvm.org/D77145
2020-04-06 13:28:06 +07:00
Igor Kudrin 714324b79a [DebugInfo] Support DWARFv5 index sections.
DWARFv5 defines index sections in package files in a slightly different
way than the pre-standard GNU proposal, see Section 7.3.5 in the DWARF
standard and https://gcc.gnu.org/wiki/DebugFissionDWP for GNU proposal.
The main concern here is values for section identifiers, which are
partially overlapped with changed meanings. The patch adds support for
v5 index sections and resolves that difficulty by defining a set of
identifiers for internal use which can represent and distinct values
of both standards.

Differential Revision: https://reviews.llvm.org/D75929
2020-04-06 13:28:06 +07:00
Igor Kudrin a0249fe91c [DebugInfo] Rename section identifiers which are deprecated in DWARFv5. NFC.
This is a preparation for an upcoming patch which adds support for
DWARFv5 unit index sections. The patch adds tag "_EXT_" to identifiers
which reference sections that are deprecated in the DWARFv5 standard.
See D75929 for the discussion.

Differential Revision: https://reviews.llvm.org/D77141
2020-04-06 13:28:06 +07:00
Igor Kudrin f9cd90837b [llvm-dwp] Refactor handling of section identifiers. NFCI.
There is a number of places in llvm-dwp.cpp where a section identifier
is translated into an index of an internal array of section
contributions, and another place where the index is converted to an
on-disk value. All these places use direct expressions like
"<id> - DW_SECT_INFO" or "<index> + DW_SECT_INFO", exploiting the fact
that DW_SECT_INFO is the minimum valid value of that kind.

The patch adds distinct functions for that translation. The goal is to
make the code more readable and to prepare it to support index sections
of new versions, where the numeric scheme of section indexes is changed.

Differential Revision: https://reviews.llvm.org/D76067
2020-04-06 13:28:05 +07:00
Richard Smith 6163aa9679 PR45239: Don't deallocate TemplateIdAnnotations if they might still be
in the token stream.

Previously we deleted all template-id annotations at the end of each
top-level declaration. That doesn't work: we can do some lookahead and
form a template-id annotation, and then roll back that lookahead, parse,
and decide that we're missing a semicolon at the end of a top-level
declaration, before we reach the annotation token. In that situation,
we'd end up parsing the annotation token after deleting its associated
data, leading to various forms of badness.

We now only delete template-id annotations if the preprocessor can
assure us that there are no annotation tokens left in the token stream
(or if we're already at EOF). This lets us delete the annotation tokens
earlier in a lot of cases; we now clean them up at the end of each
statement and class member, not just after each top-level declaration.
This also permitted some simplification of the delay-parsed templates
cleanup code.
2020-04-05 23:23:20 -07:00
Craig Topper 97e57f3b24 [DAGCombiner] Use getAnyExtOrTrunc instead of getSExtOrTrunc in the zext(setcc) combine.
We're ANDing with 1 right after which will cause the SIGN_EXTEND to
be combined to ANY_EXTEND later. Might as well just start with an
ANY_EXTEND.

While there replace create the AND using the getZeroExtendInReg
helper to remove the need to explicitly create the VecOnes constant.
2020-04-05 22:44:45 -07:00
Johannes Doerfert 931c0cd713 [OpenMP][NFC] Move and simplify directive -> allowed clause mapping
Move the listing of allowed clauses per OpenMP directive to the new
macro file in `llvm/Frontend/OpenMP`. Also, use a single generic macro
that specifies the directive and one allowed clause explicitly instead
of a dedicated macro per directive.

We save 800 loc and boilerplate for all new directives/clauses with no
functional change. We also need to include the macro file only once and
not once per directive.

Depends on D77112.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D77113
2020-04-06 00:04:08 -05:00
Johannes Doerfert 8ea07f62a6 [OpenMP] Add extra qualification to OpenMP clause id
Forgot to adjust this use in 419a559c5a.
2020-04-05 23:10:58 -05:00
Craig Topper 586c051a27 [DAGCombiner] Replace a hardcoded constant in visitZERO_EXTEND with a proper check for the condition its trying to protect.
This code is replacing a shift with a new shift on an extended type.
If the shift amount type can't represent the maximum shift amount
for the new type, the amount needs to be extended to a type that
can.

Previously, the code just hardcoded a check for 256 bits which
seems to have been an assumption that the original shift amount
was MVT::i8. But that seems more catered to a specific target
like X86 that uses i8 as its legal shift amount type. Other
targets may use different types.

This commit changes the code to look at the real type of the shift
amount and makes sure it has enough bits for the Log2 of the
new type. There are similar checks to this in SelectionDAGBuilder
and LegalizeIntegerTypes.
2020-04-05 20:35:57 -07:00
Nathan Ridge 8b3b7556e9 [clang] Persist Attr::IsPackExpansion into the PCH
Summary: Fixes https://github.com/clangd/clangd/issues/309

Subscribers: ilya-biryukov, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77194
2020-04-05 23:32:03 -04:00
Johannes Doerfert 419a559c5a [OpenMP][NFCI] Move OpenMP clause information to `lib/Frontend/OpenMP`
This is a cleanup and normalization patch that also enables reuse with
Flang later on. A follow up will clean up and move the directive ->
clauses mapping.

Reviewed By: fghanim

Differential Revision: https://reviews.llvm.org/D77112
2020-04-05 22:30:29 -05:00
Tarindu Jayatilaka b43b59fcc0 Expose `attributor-disable` to the new and old pass managers
The new and old pass managers (PassManagerBuilder.cpp and
PassBuilder.cpp) are exposed to an `extern` declaration of
`attributor-disable` option which will guard the addition of the
attributor passes to the pass pipelines.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D76871
2020-04-05 22:29:34 -05:00
Lang Hames 1b39c6f62c [ORC] Add MachO universal binary support to StaticLibraryDefinitionGenerator.
Add a new overload of StaticLibraryDefinitionGenerator::Load that takes a triple
argument and supports loading archives from MachO universal binaries in addition
to regular archives.

The LLI tool is updated to use this overload.
2020-04-05 20:21:05 -07:00
Lei Zhang 322c235a52 [mlir][spirv] NFC: remove uncessary return after llvm_unreachable 2020-04-05 20:00:56 -04:00
David Blaikie e9644e6f4f DebugInfo: Fix default template parameter computation for dependent non-type template parameters
This addresses the immediate bug, though in theory we could still
produce a default parameter for the DWARF in this test case - but other
cases will be definitely unachievable (you could have a default
parameter that cannot be evaluated - so long as the user overrode it
with another value rather than relying on that default)
2020-04-05 16:31:30 -07:00
River Riddle 74d44c43e8 [mlir] Refactor and cleanup the translation facilities.
Summary:
This revision performs several cleanups on the translation infra:
* Removes the TranslateCLParser library and consolidates into Translation
  - This was a weird library that existed in Support, and didn't really justify being a standalone library.
* Cleans up the internal registration and consolidates all of the translation functions within one registry.

Differential Revision: https://reviews.llvm.org/D77514
2020-04-05 16:21:21 -07:00
River Riddle c9da04d660 [mlir] Only number the parent operation in Block::printAsOperand
Summary: Blocks are numbered locally within a region, so numbering above the parent region is unnecessary.

Differential Revision: https://reviews.llvm.org/D77510
2020-04-05 16:17:13 -07:00
Richard Smith 944db8a433 Permit constant evaluation of mixed __builtin_memcmp between char and
char8_t.
2020-04-05 15:35:32 -07:00
Richard Smith 7f24db0175 Add documentation and testing for
2c88a485c7.

Also extend it to cover memchr for consistency.
2020-04-05 15:24:49 -07:00
Simon Pilgrim a43e233606 Remove unused function 'isInRange'. NFCI. 2020-04-05 23:11:24 +01:00
Simon Pilgrim 4431a29c60 [X86][SSE] Combine unary shuffle(HORIZOP,HORIZOP) -> HORIZOP
We had previously limited the shuffle(HORIZOP,HORIZOP) combine to binary shuffles, but we can often merge unary shuffles just as well, folding in UNDEF/ZERO values into the 64-bit half lanes.

For the (P)HADD/HSUB cases this is limited to fast-horizontal cases but PACKSS/PACKUS combines under all cases.
2020-04-05 22:49:46 +01:00
Uday Bondhugula 34392b518f [MLIR][NFC] Make AsmPrinter messages on null structures consistent
Make AsmPrinter messages on null structures consistent: use <<NULL ...>>.

Differential Revision: https://reviews.llvm.org/D77509
2020-04-06 01:14:36 +05:30
River Riddle 8d0bc03482 [mlir] Update the documentation on Canonicalization
Summary: This updates the canonicalization documentation, and properly documents the different ways of canonicalizing operations.

Differential Revision: https://reviews.llvm.org/D77490
2020-04-05 12:12:25 -07:00
River Riddle c7b83a4fe5 [mlir][Pass] Add documentation for the declarative pass specification
Summary:
This revision adds a section to WritingAPass to document the declarative specification, and how to use it.

Differential Revision: https://reviews.llvm.org/D77102
2020-04-05 11:52:00 -07:00
Anna Thomas 1d0f757904 [InlineFunction] Update metadata on loads that are return values
This patch builds upon D76140 by updating metadata on pointer typed
loads in inlined functions, when the load is the return value, and the
callsite contains return attributes which can be updated as metadata on
the load.
Added test cases show this for nonnull, dereferenceable,
dereferenceable_or_null

Reviewed-By: jdoerfert

Differential Revision: https://reviews.llvm.org/D76792
2020-04-05 14:50:10 -04:00
Sourabh Singh Tomar 0d71782f4e [DebugInfo]: Allow DwarfCompileUnit to have line table symbol
Previously line table symbol was represented as `DIE::value_iterator`
inside `DwarfCompileUnit` and subsequent function `intStmtList`
was used to create a local `MCSymbol` to initialize it.

This patch removes `DIE::value_iterator` from `DwarfCompileUnit`
and intoduce `MCSymbol` for representing this units symbol for
`debug_line` section. As a result `applyStmtList` is also modified
 to utilize this. Further more a helper function `getLineTableStartSym`
is also introduced to get this symbol, this would be used by clients
which need to access this line table, i.e `debug_macro`.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D77489
2020-04-06 00:14:29 +05:30
Mehdi Amini 96eb38418b Make the AsmPrinter print "<<NULL TYPE>>" instead of crashing on null types
Even if this indicates in general a problem at call sites, the printer
is used for debugging and avoiding crashing is friendlier for example
when used in diagnostics or other printer.

Differential Revision: https://reviews.llvm.org/D77481
2020-04-05 18:36:18 +00:00
Fangrui Song 26e6880434 [ELF][test] Reorganize warn-backrefs.s 2020-04-05 10:28:32 -07:00
Nico Weber e01ec11882 make ccabe93298 more robust 2020-04-05 13:07:50 -04:00
Nico Weber ccabe93298 clang: Make tests using symlinks more consistent.
Instead of checking if each symlink exists before removing it,
remove the whole temp dir housing the symlinks before recreating it.
This is a bit shorter, conceptually simpler (in that the first
and consecutive test runs have more similar behavior), it's what we're
already doing in almost all places where we do it, and it works if the
symlink exists but is a dead link (e.g. when it points into the build
dir but the build dir is renamed).

No intended behavior change.
2020-04-05 12:56:41 -04:00
Zuojian Lin a58c8a7866 Remove the additional constant which requires an extra register for statepoint lowering.
The newly-created constant zero will need an extra register to hold it
in the current statepoint lowering implementation. Remove it if there
exists one.
2020-04-05 11:22:09 -04:00
Apelete Seketeli 8aadb442d1 [scan-build] fix dead store warnings emitted on LLVM AMDGPU code base
This fixes dead store warnings of the type "dead assignment" reported
by Clang Static Analyzer.
2020-04-05 11:19:03 -04:00
Muhammad Omair Javaid b6cd964ac7 Fix typo in xfail decorator for lldb thread plan list tests 2020-04-05 20:16:46 +05:00
Matt Arsenault 9620fe02df AMDGPU/GlobalISel: Add some G_INSERT/G_EXTRACT select tests 2020-04-05 10:54:24 -04:00
Oliver Stannard cb6aeb2239 [ARM] Add data gathering hint instruction
Summary:
This patch upstreams support the optional ARMv8.0 Data Gathering Hint (DGH)
extension, which adds the Data Gathering Hint instruction to the hint
space.

See ARMv8.0-DGH in the Arm Architecture Reference Manual Armv8 for more
information.

Reviewers: t.p.northover, rengolin, SjoerdMeijer, ab, danielkiss, samparker

Reviewed By: SjoerdMeijer

Subscribers: LukeGeeson, ostannard, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77097
2020-04-05 15:21:00 +01:00
Oliver Stannard 6f60eb4a3c [ARM] Add enhanced counter virtualization system registers
Summary:
This patch upstreams support for the ARMv8.6A Enhanced Counter Virtualization
(ECV) extension, which adds 6 new system registers.

See ARMv8.6-ECV in the Arm Architecture Reference Manual Armv8 for more
information.

Reviewers: t.p.northover, rengolin, SjoerdMeijer, pcc, ab, chill

Reviewed By: SjoerdMeijer

Subscribers: LukeGeeson, ostannard, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77094
2020-04-05 15:18:35 +01:00
Uday Bondhugula 3f9cdd44d7 [MLIR] Add pattern rewriter util to erase block; remove dead else
Add a pattern rewriter utility to erase blocks (while notifying the
pattern rewriting driver of the erased ops). Use this to remove trivial
else blocks in affine.if ops.

Differential Revision: https://reviews.llvm.org/D77083
2020-04-05 19:24:43 +05:30
Sanjay Patel 538a8f0227 [InstCombine] convert bitcast-shuffle to vector trunc
As discussed in D76983, that patch can turn a chain of insert/extract
with scalar trunc ops into bitcast+extract and existing instcombine
vector transforms end up creating a shuffle out of that (see the
PhaseOrdering test for an example). Currently, that process requires
at least this sequence: -instcombine -early-cse -instcombine.

Before D76983, the sequence of insert/extract would reach the SLP
vectorizer and become a vector trunc there.

Based on a small sampling of public targets/types, converting the
shuffle to a trunc is better for codegen in most cases (and a
regression of that form is the reason this was noticed). The trunc is
clearly better for IR-level analysis as well.

This means that we can induce "spontaneous vectorization" without
invoking any explicit vectorizer passes (at least a vector cast op
may be created out of scalar casts), but that seems to be the right
choice given that we started with a chain of insert/extract, and the
backend would expand back to that chain if a target does not support
the op.

Differential Revision: https://reviews.llvm.org/D77299
2020-04-05 09:48:02 -04:00
Uday Bondhugula cc6738949d [MLIR][NFC] fix name operand -> userOp
The wrong name was confusing to read. value.getUsers() yields
Operation *s.

Differential Revision: https://reviews.llvm.org/D77486
2020-04-05 19:17:15 +05:30
Uday Bondhugula f875e55ba9 [MLIR] fix greedy pattern rewrite driver iteration on change
Removing dead ops should make the outer loop of the pattern rewriting
driver run again. Although its operands are added to the worklist, if no
changes happenned to them or remaining ops in the worklist, the driver
wouldn't run once again - but it should be.

Differential Revision: https://reviews.llvm.org/D77483
2020-04-05 19:15:46 +05:30
Oliver Stannard 9e1455dc23 [ARM] Add ARMv8.6 Fine Grain Traps system registers
Summary:
This patch upstreams support for the ARMv8.6A Fine Grain Traps (FGT)
extension, which adds 5 new system registers.

See ARMv8.6-FGT in the Arm Architecture Reference Manual Armv8 for more
information.

Reviewers: t.p.northover, rengolin, SjoerdMeijer, ab, momchil.velikov

Reviewed By: SjoerdMeijer

Subscribers: LukeGeeson, ostannard, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76991
2020-04-05 14:28:18 +01:00
Sanjay Patel 4036a0af24 [InstCombine] enhance freelyNegateValue() by handling 'not'
This patch extends D77230. If we have a 'not' instruction inside a
negated expression, we can ignore extra uses of that op because the
negation has a one-to-one replacement: negate becomes increment.

Alive2 examples of the test cases:
http://volta.cs.utah.edu:8080/z/T5-u9P
http://volta.cs.utah.edu:8080/z/eT89L6

Differential Revision: https://reviews.llvm.org/D77459
2020-04-05 09:16:19 -04:00
Sanjay Patel 867f0c3c4d [ValueTracking] enhance matching of smin/smax with 'not' operands
The cmyk tests are based on the known regression that resulted from:
rGf2fbdf76d8d0

So this improvement in analysis might be enough to restore that commit.
2020-04-05 08:54:12 -04:00
Diogo Sampaio 59d10dc703 [ARM] add ARMv8.6-A Activity monitors virtualization extension
Summary:
This patch upstreams v8.6A activity monitors virtualization
assembler support, which consists of 32 new system
registers (two groups, each with 16 numbered registers).

See ARMv8.6-AMU in the Arm Architecture Reference Manual Armv8 for more
information.

Reviewers: t.p.northover, rengolin, SjoerdMeijer, ab, john.brawn, ostannard

Reviewed By: ostannard

Subscribers: LukeGeeson, dnsampaio, ostannard, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76998
2020-04-05 13:31:06 +01:00
Benjamin Kramer ff889df356 [X86] Roll some loops. NFCI. 2020-04-05 13:59:50 +02:00
Florian Hahn 47ee404075 [ValueTracking] Use Inst::comesBefore in isValidAssumeForCtx (NFC).
D51664 added Instruction::comesBefore which should provide better
performance than the manual check.

Reviewers: rnk, nikic, spatel

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D76228
2020-04-05 12:38:04 +01:00
David Zarzycki 168503773d Revert "[libc++] Enable the new libc++ testing format by default"
This reverts commit 1580c76c4a.

This causes libcxx/selftest/newformat/sh.cpp/substitutions.sh.cpp to
fail with a linker error on Fedora 31 (x86-64) release (no assert)
builds.
2020-04-05 07:16:47 -04:00
David Zarzycki 2c88a485c7 [clang] Make libcxx test suite pass again after memcmp changes 2020-04-05 07:16:47 -04:00