ad77681253
rename InstructionInfo -> MatchableInfo since it now
...
represents InstAliases as well. Rename
isAssemblerInstruction -> Validate since that is what
it does (modulo the ARM $lane hack).
llvm-svn: 117899
2010-11-01 05:06:45 +00:00
ba465f9a8a
refactor initialization of InstructionInfo to be sharable between
...
instructions and InstAliases. Start creating InstructionInfo's
for Aliases.
llvm-svn: 117898
2010-11-01 04:53:48 +00:00
178f4bb62d
make the asm matcher emitter reject instructions that have comments
...
in their asmstring. Fix the two x86 "NOREX" instructions that have them.
If these comments are important, the instlowering stuff can print them.
llvm-svn: 117897
2010-11-01 04:44:29 +00:00
39bc53b33a
refactor InstructionInfo to not have a pointer to CodeGenInstruction
...
member, and make isAssemblerInstruction() a method (pushing some code
around inside it).
llvm-svn: 117895
2010-11-01 04:34:44 +00:00
488c201bb7
define a new CodeGenInstAlias. It has an asmstring and operand list for now,
...
todo: the result field.
llvm-svn: 117894
2010-11-01 04:05:41 +00:00
d8adec70f3
factor the operand list (and related fields/operations) out of
...
CodeGenInstruction into its own helper class. No functionality change.
llvm-svn: 117893
2010-11-01 04:03:32 +00:00
86e1c9484f
avoid needless throw/catch/rethrow, stringref'ize some simple stuff.
...
llvm-svn: 117892
2010-11-01 03:19:09 +00:00
a397716081
eliminate the old InstFormatName which is always "AsmString",
...
simplify CodeGenInstruction. No functionality change.
llvm-svn: 117891
2010-11-01 02:15:23 +00:00
517dc95d47
all predicates on an MnemonicAlias must be AssemblerPredicates.
...
llvm-svn: 117890
2010-11-01 02:09:21 +00:00
f7a01e9f46
change the singleton register handling code to be based on Record*'s
...
instead of strings, simplifying it.
llvm-svn: 117889
2010-11-01 01:47:07 +00:00
b80ab36179
Give AsmMatcherInfo a CodeGenTarget, which simplifies a bunch of
...
argument passing. Consolidate all SingletonRegister detection
and handling into a new
InstructionInfo::getSingletonRegisterForToken method instead of
having it scattered about. No change in generated .inc files.
llvm-svn: 117888
2010-11-01 01:37:30 +00:00
25d9c7fa2e
move FlattenVariants out of AsmMatcherEmitter into a shared
...
CodeGenInstruction::FlattenAsmStringVariants method. Use it
to simplify the code in AsmWriterInst, which now no longer
needs to worry about variants.
llvm-svn: 117886
2010-11-01 01:07:14 +00:00
40dd3f0939
add a FIXME, $lane in ARM is an issue that needs to be resolved before
...
this can start rejecting instructions.
llvm-svn: 117885
2010-11-01 00:51:32 +00:00
941c19b7ba
reject instructions that contain a \n in their asmstring. Mark
...
various X86 and ARM instructions that are bitten by this as isCodeGenOnly,
as they are.
llvm-svn: 117884
2010-11-01 00:46:16 +00:00
d689026899
fix a crash on:
...
let Constraints = "$val = $dst", Defs = [EFLAGS] in, isCodeGenOnly = 1 {
we now get:
X86InstrCompiler.td:653:52: error: Expected class, def, defm, multiclass or let definition
let Constraints = "$val = $dst", Defs = [EFLAGS] in, isCodeGenOnly = 1 {
^
llvm-svn: 117863
2010-10-31 19:27:15 +00:00
7ff334687d
fix the !eq operator in tblgen to return a bit instead of an int.
...
Use this to make the X86 and ARM targets set isCodeGenOnly=1
automatically for their instructions that have Format=Pseudo,
resolving a hack in tblgen.
llvm-svn: 117862
2010-10-31 19:22:57 +00:00
9492c17baf
two changes: make the asmmatcher generator ignore ARM pseudos properly,
...
and make it a hard error for instructions to not have an asm string.
These instructions should be marked isCodeGenOnly.
llvm-svn: 117861
2010-10-31 19:15:18 +00:00
33fc3e095b
reapply r117858 with apparent editor malfunction fixed (somehow I
...
got a dulicated line).
llvm-svn: 117860
2010-10-31 19:10:56 +00:00
e59eef3dd1
revert r117858 while I check out a failure I missed.
...
llvm-svn: 117859
2010-10-31 19:05:32 +00:00
9293008e90
the asm matcher can't handle operands with modifiers (like ${foo:bar}).
...
Instead of silently ignoring these instructions, emit a hard error and
force the target author to either refactor the target or mark the
instruction 'isCodeGenOnly'.
Mark a few instructions in ARM and MBlaze as isCodeGenOnly the are
doing this.
llvm-svn: 117858
2010-10-31 18:48:12 +00:00
43690071cf
have GetAliasRequiredFeatures get its features from
...
AsmMatcherInfo so we don't have two places that know the
feature -> enum mapping. No functionality change.
llvm-svn: 117845
2010-10-30 20:15:02 +00:00
a0e871901b
simplify code that creates SubtargetFeatureInfo, ensuring that features
...
that are only used by MnemonicAliases will be found.
llvm-svn: 117844
2010-10-30 20:07:57 +00:00
25896af4bb
fix a fixme in stringmatcher, having it generate nice looking code if the
...
'tomatch' code contains \n's.
llvm-svn: 117843
2010-10-30 19:57:17 +00:00
f9ec2fb34a
fix typos and some serious bugs in feature handling (but not for
...
cases that are currently exercised). Thanks to Frits van Bommel for
the great review!
llvm-svn: 117840
2010-10-30 19:47:49 +00:00
aac142cc06
Resolve a terrible hack in tblgen: instead of hardcoding
...
"In32BitMode" and "In64BitMode" into tblgen, allow any
predicate that inherits from AssemblerPredicate.
llvm-svn: 117831
2010-10-30 19:38:20 +00:00
2cb092dc55
Implement (and document!) support for MnemonicAlias's to have Requires
...
directives, allowing things like this:
def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>;
Move the rest of the X86 MnemonicAliases over to the .td file.
llvm-svn: 117830
2010-10-30 19:23:13 +00:00
ec56397eb4
fix build problem
...
llvm-svn: 117828
2010-10-30 18:57:07 +00:00
cf9b6e3107
diagnose targets that define two alises with the same 'from' mnemonic
...
with a useful error message instead of having tblgen explode with an
assert.
llvm-svn: 117827
2010-10-30 18:56:12 +00:00
477fba4f54
emit the mnemonic aliases in their own helper function instead of
...
inline into MatchInstructionImpl.
llvm-svn: 117826
2010-10-30 18:48:18 +00:00
ba7b4fea97
implement (and document!) the first kind of MC assembler alias, which
...
just remaps one mnemonic to another. Convert a few of the X86 aliases
from .cpp to .td code.
llvm-svn: 117815
2010-10-30 17:36:36 +00:00
96f54c9d3e
Apply a patch from Frits van Bommel to fix the CMake build.
...
llvm-svn: 117731
2010-10-29 22:36:50 +00:00
0eccfc2693
trailing whitespace
...
llvm-svn: 117724
2010-10-29 22:13:48 +00:00
b75ce4f816
not is testing for a normal exit with a non-zero value. It shouldn't
...
return success if the child process is killed with a signal.
llvm-svn: 117701
2010-10-29 20:20:29 +00:00
1be0697ab9
fix the asmmatcher generator to handle targets with no RegisterPrefix
...
(like ARM) correctly. With this change, we can now match "bx lr"
because we recognize lr as a register.
llvm-svn: 117606
2010-10-28 21:28:42 +00:00
59bbc545e0
Shifter ops are not always free. Do not fold them (especially to form
...
complex load / store addressing mode) when they have higher cost and
when they have more than one use.
llvm-svn: 117509
2010-10-27 23:41:30 +00:00
fadb951e5b
Provide correct encodings for NEON vcvt, which has its own special immediate encoding
...
for specifying fractional bits for fixed point conversions.
llvm-svn: 117501
2010-10-27 22:49:00 +00:00
5e7cb5fc27
Added the x86 instruction ud2b (2nd official undefined instruction).
...
llvm-svn: 117485
2010-10-27 20:46:49 +00:00
5faac39061
Enable clang autocompletion by default.
...
llvm-svn: 117415
2010-10-26 23:24:54 +00:00
1e4d9a17c2
First part of refactoring ARM addrmode2 (load/store) instructions to be more
...
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.
llvm-svn: 117409
2010-10-26 22:37:02 +00:00
34402c4fe4
Constify another 2 disassembler tables.
...
llvm-svn: 117208
2010-10-23 09:28:42 +00:00
de0a4fbf3b
Make the disassembler tables const so they end up in read-only memory.
...
llvm-svn: 117206
2010-10-23 09:10:44 +00:00
f4a6809231
Remove -llvmc-temp-hack from tblgen.
...
llvm-svn: 117197
2010-10-23 07:32:53 +00:00
e9b78186d4
Syntax tweak in llvmc: (something [a,b,c]) -> (something a, b, c).
...
llvm-svn: 117196
2010-10-23 07:32:46 +00:00
de68389cd3
Trailing whitespace.
...
llvm-svn: 117195
2010-10-23 07:32:37 +00:00
dbb77154dc
Do not install libBugpointPasses.dylib for Apple builds. Radar 8585383.
...
llvm-svn: 117172
2010-10-22 23:04:17 +00:00
1eaa381789
Fix the name of libLLVMHello.dylib so that it does not get installed for
...
Apple builds. Radar 8585383.
llvm-svn: 117164
2010-10-22 22:10:57 +00:00
9192e7ab12
Make some symbols static, move classes into anonymous namespaces.
...
llvm-svn: 117111
2010-10-22 17:35:07 +00:00
83123a47ce
Add a way to emit StringSwitch of clang attribute spellings.
...
llvm-svn: 116899
2010-10-20 01:21:53 +00:00
713460114d
Fix VC2010 build.
...
llvm-svn: 116833
2010-10-19 18:04:06 +00:00
889c1e7d80
Build with RTTI and exceptions disabled. Only in GCC for now.
...
llvm-svn: 116682
2010-10-17 02:26:16 +00:00
c46e8cb258
KillTheDoctor: Fix 2008 build. I'm actually surprised 2010 defines all of these, many are non-standard posix/unix extensions.
...
llvm-svn: 116597
2010-10-15 18:13:02 +00:00
eba55822d7
Teach FileCheck to handle trailing CHECK-NOT patterns.
...
A CHECK-NOT pattern without a following CHECK pattern simply checks that the
pattern doesn't match before the end of the input file.
You can even have only CHECK-NOT patterns to check that strings appear nowhere
in the input file.
llvm-svn: 116592
2010-10-15 17:47:12 +00:00
68a335e185
ARM mode encoding information for UBFX and SBFX instructions.
...
llvm-svn: 116588
2010-10-15 17:15:16 +00:00
dba47755a0
Teach PerfectShuffle to not generate files with embedded tab characters.
...
llvm-svn: 116458
2010-10-14 00:12:49 +00:00
7e72ec6626
Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern
...
and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.
llvm-svn: 116432
2010-10-13 21:00:04 +00:00
1e7db68774
Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.
...
llvm-svn: 116421
2010-10-13 19:56:10 +00:00
51a12eb11d
Allow targets to optionally specify custom binary encoder functions for
...
operand values. This is useful for operands which require additional trickery
to encode into the instruction. For example, the ARM shifted immediate and
shifted register operands.
llvm-svn: 116353
2010-10-12 22:21:57 +00:00
65c1c43c13
KillTheDoctor: Fix VS2008 build.
...
llvm-svn: 116330
2010-10-12 19:27:44 +00:00
a48349f596
Fix spelling error.
...
llvm-svn: 116282
2010-10-12 00:21:05 +00:00
e61de930bc
The assert() should reference to machine instr operand number, too.
...
llvm-svn: 116243
2010-10-11 21:41:31 +00:00
11ced671be
Make sure to use the machine instruction operand number. It doesn't always
...
map one-to-one with the CodeGenInstruction operand number.
llvm-svn: 116238
2010-10-11 21:31:22 +00:00
279362dd5a
Add KillTheDoctor.
...
llvm-svn: 116216
2010-10-11 19:55:38 +00:00
806b139bbc
trailing whitespace cleanup
...
llvm-svn: 116215
2010-10-11 19:38:01 +00:00
191ad7c473
When figuring out which operands match which encoding fields in an instruction,
...
try to match them by name first. If there is no by-name match, fall back to
assuming they are in order (this was the previous behavior).
llvm-svn: 116211
2010-10-11 18:25:51 +00:00
1ef5e84c31
Per discussion with Sanjiv, remove the PIC16 target from mainline. When/if
...
it comes back, it will be largely a rewrite, so keeping the old codebase
in tree isn't helping anyone.
llvm-svn: 116190
2010-10-11 05:44:40 +00:00
9cc3fcc8ec
syntax-highlighting: Fix module asm keyword.
...
llvm-svn: 116152
2010-10-09 15:44:36 +00:00
3431778a2b
Add Kate syntax highlighting files.
...
llvm-svn: 116146
2010-10-09 07:11:04 +00:00
b75d0ca38e
A few 80 column cleanups
...
llvm-svn: 116069
2010-10-08 18:13:57 +00:00
2f0be8f404
trailing whitespace
...
llvm-svn: 116068
2010-10-08 18:09:59 +00:00
ba66a81017
Fix -Asserts warning.
...
llvm-svn: 116030
2010-10-08 02:07:22 +00:00
a7b6d58f45
Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.
...
llvm-svn: 116018
2010-10-08 00:21:28 +00:00
33c1eb16e8
Move checking for t2MOVCCi16 to the right place.
...
llvm-svn: 115994
2010-10-07 22:14:01 +00:00
1e00173d20
Fix typo in comment.
...
llvm-svn: 115986
2010-10-07 21:55:16 +00:00
0df7ea4c24
Move tool_output_file into its own file.
...
llvm-svn: 115973
2010-10-07 20:32:40 +00:00
d4b62765a7
gtest: Fix warnings on MinGW.
...
llvm-svn: 115945
2010-10-07 18:29:44 +00:00
33a390e2ca
CMake: Fix warning in gtest.
...
llvm-svn: 115935
2010-10-07 18:12:54 +00:00
daab660fb1
trailing whitespace
...
llvm-svn: 115923
2010-10-07 16:56:28 +00:00
5b255c2dd6
Allow use of the 16-bit literal move instruction in CMOVs for Thumb2 mode.
...
llvm-svn: 115890
2010-10-07 00:53:56 +00:00
742adc328a
Allow use of the 16-bit literal move instruction in CMOVs for ARM mode.
...
llvm-svn: 115884
2010-10-07 00:42:42 +00:00
b270f28c1a
Now that VDUPfqf and VDUPfdfare properly pseudos, nuke the special handling.
...
llvm-svn: 115841
2010-10-06 21:17:07 +00:00
28f034c21a
Generalize tblgen's dag parsing logic to handle arbitrary expressions
...
as the operator of the dag. Specifically, this allows parsing things
like (F.x 4) in addition to just (a 4).
Unfortunately, this runs afoul of an idiom being used by llvmc. It
is using dags like (foo [1,2,3]) to represent a list of stuff being
passed into foo. With this change, this is parsed as a [1,2,3]
subscript on foo instead of being the first argument to the dag.
Cope with this in the short term by requiring a "-llvmc-temp-hack"
argument to tblgen to get the old parsing behavior.
llvm-svn: 115742
2010-10-06 04:55:48 +00:00
e76cfcf8a8
cleanups
...
llvm-svn: 115739
2010-10-06 04:31:40 +00:00
9402633637
remove the !nameconcat tblgen feature. It "shorthand" and only used in 4 places
...
where !cast is just as short.
llvm-svn: 115722
2010-10-06 00:19:21 +00:00
61ea00b494
allow !strconcat to take more than two operands to eliminate
...
!strconcat(!strconcat(!strconcat(!strconcat
Simplify some x86 td files to use it.
llvm-svn: 115719
2010-10-05 23:58:18 +00:00
b8ff8f0cb6
when david added support for #NAME# he didn't update the comments and
...
tried (but failed) to artificially constrain it to working with #NAME#.
Just allow any # in identifiers, and update the comments.
llvm-svn: 115704
2010-10-05 22:59:29 +00:00
7538ed80a9
enhance tblgen to support anonymous defm's, use this to
...
simplify the X86 CMOVmr's.
llvm-svn: 115702
2010-10-05 22:51:56 +00:00
c1526595b3
trailing whitespace
...
llvm-svn: 115664
2010-10-05 20:35:57 +00:00
c4abc7036d
Update attribute reading for the changed source location code.
...
llvm-svn: 115624
2010-10-05 15:59:36 +00:00
9ddb678d45
Properly deserialize Clang types that are used as attribute arguments
...
llvm-svn: 115616
2010-10-05 14:51:48 +00:00
8d302b2e71
Fixed the disassembler to handle two new X86
...
instruction forms. Now the ENTER instruction
disassembles correctly.
llvm-svn: 115573
2010-10-04 22:45:51 +00:00
50774e8fa7
remove reference to dead script.
...
llvm-svn: 115413
2010-10-02 18:49:27 +00:00
250ecf0e00
nuke an old script
...
llvm-svn: 115412
2010-10-02 18:44:23 +00:00
8cbc86e912
Fix MSVC release mode compilation error.
...
llvm-svn: 115407
2010-10-02 03:26:54 +00:00
77339c7c98
Fix typo
...
llvm-svn: 115348
2010-10-01 21:20:39 +00:00
dd224d2333
Massive rewrite of MMX:
...
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.
Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics.
MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces. Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.
The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.
llvm-svn: 115243
2010-09-30 23:57:10 +00:00
4a57b76eea
Let a target specify whether it wants an assembly printer to be the MC version
...
or not. TableGen needs to generate the printInstruction() function as taking
an MCInstr* or a MachineInstr*, depending. Default to the old non-MC
version so that everything not yet using MC continues to just work without
fidding.
llvm-svn: 115126
2010-09-30 01:29:54 +00:00
4a010fd1ea
Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP
...
pipeline forwarding path.
llvm-svn: 115098
2010-09-29 22:42:35 +00:00
a5497345ad
trailing whitespace
...
llvm-svn: 115096
2010-09-29 22:32:50 +00:00
e9da6db67f
Convert a bunch of uses of 'bytecode' into 'bitcode'. This
...
is not everything, but the remaining cases are less trivial.
llvm-svn: 115080
2010-09-29 20:09:55 +00:00
8211d31055
GetSourceVersion: Strip off svninfo extra markers, which aren't really part of the version.
...
llvm-svn: 115074
2010-09-29 19:30:17 +00:00
afd363e65b
utils: Add GetRepositoryPath script, patch by Jonathan Mulder!
...
- Also, fix indention in GetSourceVersion while in the area.
llvm-svn: 115048
2010-09-29 17:57:01 +00:00
a9dd1998cc
lit: Fix a subtle resource usage bug when executing tests using the internal
...
shell runner.
We would inadvertently end up holding on to handles to the temporary files
longer than we should have been. On Win32, where open handles lock some file
operations, this caused problems in tests which would try to move temporary
files around (as Clang does by default now).
Many thanks to Francois Pichet for the excellent detective work on this.
llvm-svn: 115040
2010-09-29 15:59:37 +00:00
f60062fd55
add basic avx support to the disassembler, also teach it about ssmem/sdmem
...
operands.
With this done, we can remove the _Int suffixes from the round instructions
without the disassembler blowing up. This allows the assembler to support
them, implementing rdar://8456376 - llvm-mc rejects 'roundss'
llvm-svn: 115019
2010-09-29 02:57:56 +00:00
0097dd0d5a
Add support to model pipeline bypass / forwarding.
...
llvm-svn: 115005
2010-09-28 23:50:49 +00:00
c758311025
Push twines deeper into SourceMgr's error handling methods.
...
llvm-svn: 114847
2010-09-27 17:42:11 +00:00
46d8a93005
Reverting "CMake: Don't include tools, unittets, or examples as
...
available targets unless LLVM_INCLUDE_X is ON. LLVM_BUILD_X implies
LLVM_INCLUDE_X"
It breaks the configuration phase when cmake is invoked without
parameters, it is too complex for the purpose and introduces an
incovenience for the user (as both LLVM_BUILD_X and LLVM_INCLUDE_X
must set to OFF for not including X on the build)
llvm-svn: 114795
2010-09-25 20:25:25 +00:00
299479020a
Add ret instruction to PTX backend
...
llvm-svn: 114788
2010-09-25 07:46:17 +00:00
ded5f66813
Get rid of pop_macro warnings on MSVC.
...
llvm-svn: 114750
2010-09-24 19:48:47 +00:00
e35a611aa5
CMake: Don't include tools, unittets, or examples as available targets
...
unless LLVM_INCLUDE_X is ON. LLVM_BUILD_X implies LLVM_INCLUDE_X
llvm-svn: 114747
2010-09-24 19:10:51 +00:00
55581b3336
Fix line endings from my last commit.
...
llvm-svn: 114728
2010-09-24 09:10:21 +00:00
d8010d6456
unittests: Support Windows.
...
llvm-svn: 114727
2010-09-24 09:01:34 +00:00
5d28c8428f
Test unittests built with CMake.
...
llvm-svn: 114726
2010-09-24 09:01:22 +00:00
10d274d874
CMake: Build unittests.
...
llvm-svn: 114725
2010-09-24 09:01:13 +00:00
1444f47deb
Fix whitespace.
...
llvm-svn: 114724
2010-09-24 09:00:56 +00:00
2c5df619c4
Revert r114703 and r114702, removing the isConditionalMove flag from instructions. After further
...
reflection, this isn't going to achieve the purpose I intended it for. Back to the drawing board!
llvm-svn: 114710
2010-09-23 23:45:25 +00:00
6e0e8d7d64
Add an TargetInstrDesc bit to indicate that a given instruction is a conditional move.
...
Not intended functionality change, as nothing uses this yet.
llvm-svn: 114702
2010-09-23 22:44:10 +00:00
b4e0cc0212
Revert r114596, it's breaking a few tests.
...
llvm-svn: 114659
2010-09-23 16:49:17 +00:00
e9e9c08ce2
<rdar://problem/8228022> Wvector-conversions warnings in arm_neon.h
...
Explicitly cast arguments to the type the builtin expects, which is <vN x i8>
llvm-svn: 114596
2010-09-22 22:28:42 +00:00
a9e57e0eff
Rework passing parent pointers into complexpatterns, I forgot
...
that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.
llvm-svn: 114489
2010-09-21 22:00:25 +00:00
dd83548fea
just like they can opt into getting the root of the pattern being
...
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.
llvm-svn: 114472
2010-09-21 20:37:12 +00:00
0e023ea02a
fix a long standing wart: all the ComplexPattern's were being
...
passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel
like detangling). Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.
llvm-svn: 114471
2010-09-21 20:31:19 +00:00
5be6764363
Trailing whitespace, 80-col violations.
...
llvm-svn: 114435
2010-09-21 14:59:50 +00:00
ed79d5f24d
llvmc: Allow multiple output languages.
...
llvm-svn: 114433
2010-09-21 14:59:42 +00:00
81b7899bc8
Using regexp-opt for keyword regex declarations makes the word lists more
...
readable and easier to edit.
llvm-svn: 114308
2010-09-19 03:44:22 +00:00
a573d19662
Handle the odd case where we only have one instruction.
...
llvm-svn: 114293
2010-09-18 18:50:27 +00:00
c4f3990f01
lit: Bump version to 0.2.0dev, for no apparent reason.
...
llvm-svn: 114262
2010-09-18 02:28:15 +00:00
196024ce1b
lit: Tweak setup.py.
...
llvm-svn: 114261
2010-09-18 02:28:12 +00:00
07cc4f6b33
lit: These TODOs are done(ish).
...
llvm-svn: 114260
2010-09-18 02:28:09 +00:00
922563cc6d
Some of the tests build an executable with llvm-gcc. For this to work, llvm-gcc
...
needs to find some libraries, which may require searching the directories given
by LIBRARY_PATH on curiously configured systems. So pass on LIBRARY_PATH.
llvm-svn: 114186
2010-09-17 17:05:27 +00:00
b8e87d81bf
Release-Asserts no longer exists.
...
llvm-svn: 113965
2010-09-15 12:30:35 +00:00
3b2ad1d045
lit: Expose FileBasedTest object and Test module via 'lit' object that gets
...
exposed to config files.
llvm-svn: 113923
2010-09-15 03:52:38 +00:00
2c11b449e0
lit: Rename main lit module to main.py, lit/lit/lit.py was a bit too, err,
...
alliterate.
llvm-svn: 113922
2010-09-15 03:52:31 +00:00
02d6467291
Use float64 instead of int64 vector elements for NEON vget_low and vget_high
...
functions, since int64 is not a legal type and using it leads to inefficient
code. PR8036.
llvm-svn: 113919
2010-09-15 01:52:33 +00:00
86ac3fc9af
Tidy whitespace in generated arm_neon.h.
...
llvm-svn: 113865
2010-09-14 21:52:34 +00:00
511dce004e
CBackend: Fix MSVC build.
...
This may produce warnings on MSVS, but it's better than failures.
llvm-svn: 113834
2010-09-14 04:27:38 +00:00
42be03b4a0
Fix typo in temp. script file name.
...
llvm-svn: 113787
2010-09-13 21:23:17 +00:00
ddc68dd3a1
Add little test script to check debug info.
...
llvm-svn: 113779
2010-09-13 20:42:15 +00:00
885611b42b
CMake: Add llvm-lit to CMake build.
...
llvm-svn: 113762
2010-09-13 17:52:38 +00:00
17cd907b6b
Nowadays a release build has assertions off.
...
llvm-svn: 113747
2010-09-13 13:45:33 +00:00
3a12890338
Add x86mmx to TableGen.
...
llvm-svn: 113671
2010-09-11 00:16:46 +00:00
367a5df8cf
For each instruction itinerary class, specify the number of micro-ops each
...
instruction in the class would be decoded to. Or zero if the number of
uOPs must be determined dynamically.
This will be used to determine the cost-effectiveness of predicating a
micro-coded instruction.
llvm-svn: 113513
2010-09-09 18:18:55 +00:00
269f322110
This script is executable.
...
llvm-svn: 113479
2010-09-09 09:37:54 +00:00
8ead237758
fix bugs in push/pop segment support, rdar://8407242
...
llvm-svn: 113422
2010-09-08 22:13:08 +00:00
d0419d1d6f
Remove --with-gxx-include-dir option because it's causing problems on non-Darwin platforms.
...
llvm-svn: 113401
2010-09-08 20:21:11 +00:00
6277ecca4e
Add an option to not test ObjC for those platforms which don't support it.
...
llvm-svn: 113398
2010-09-08 20:09:14 +00:00
22658bc0b7
Correct variable name.
...
llvm-svn: 113395
2010-09-08 19:58:15 +00:00
274090a6c4
Move the number of cpus logic to somewhere more logical.
...
llvm-svn: 113393
2010-09-08 19:50:25 +00:00
cedf3a278d
A script that tests a certain release candidate in several modes. It does a
...
2-phase build of llvm and llvm-gcc, similar to what the buildbots do, and runs
the regression testsuite.
Things to do:
- Work out some bugs with llvm-gcc flags.
- Not all platforms support ObjC.
- Run the test-suite.
llvm-svn: 113382
2010-09-08 18:32:31 +00:00
353802114f
Add an MVT::x86mmx type. It will take the place of all current MMX vector types.
...
llvm-svn: 113261
2010-09-07 20:03:56 +00:00
02b701f558
Fix whitespace, because I'm OCD.
...
llvm-svn: 113250
2010-09-07 18:49:14 +00:00
605acfe533
Add patterns for MMX that use the new intrinsics.
...
Enable palignr intrinsic.
These may need adjustment for a new VT in due course.
llvm-svn: 113233
2010-09-07 18:10:56 +00:00
6282336772
attempt to appease msvc
...
llvm-svn: 113198
2010-09-07 06:10:48 +00:00
7f3ce25e6e
fix comment typos
...
llvm-svn: 113197
2010-09-07 06:06:06 +00:00
abfe4223c2
generalize my previous operand loc info hack. If the same operand
...
is busted for all variants, report it as the location. This allows
us to get the operand right for bugs like:
t.s:3:12: error: invalid operand for instruction
outb %al, %gs
^
Even though there are reg/imm and reg/reg forms of this instruction.
llvm-svn: 113183
2010-09-06 23:37:39 +00:00
339cc7bfef
in the case where an instruction only has one implementation
...
of a mneumonic, report operand errors with better location
info. For example, we now report:
t.s:6:14: error: invalid operand for instruction
cwtl $1
^
but we fail for common cases like:
t.s:11:4: error: invalid operand for instruction
addl $1, $1
^
because we don't know if this is supposed to be the reg/imm or imm/reg
form.
llvm-svn: 113178
2010-09-06 22:11:18 +00:00
628fbecf4f
Now that we know if we had a total fail on the instruction mnemonic,
...
give a more detailed error. Before:
t.s:11:4: error: unrecognized instruction
addl $1, $1
^
t.s:12:4: error: unrecognized instruction
f2efqefa $1
^
After:
t.s:11:4: error: invalid operand for instruction
addl $1, $1
^
t.s:12:4: error: invalid instruction mnemonic 'f2efqefa'
f2efqefa $1
^
This fixes rdar://8017912 - llvm-mc says "unrecognized instruction" when it means "invalid operands"
llvm-svn: 113176
2010-09-06 21:54:15 +00:00
c0658cbd16
simplify DEBUG_WITH_TYPE usage
...
llvm-svn: 113174
2010-09-06 21:28:52 +00:00
c4521d1b5f
this if can now be an assert.
...
llvm-svn: 113173
2010-09-06 21:25:43 +00:00
9026ac0edd
;
...
llvm-svn: 113172
2010-09-06 21:23:43 +00:00
8130197937
now that the opcode is trivially exposed, start matching instructions
...
by doing a binary search over the mnemonic instead of doing a linear
search through all possible instructions. This implements rdar://7785064
llvm-svn: 113171
2010-09-06 21:22:45 +00:00
6b6f3dd994
emit the match table at global scope instead of within the
...
MatchInstructionImpl. This makes it easier to read/understand
MatchInstructionImpl.
llvm-svn: 113170
2010-09-06 21:08:38 +00:00
82d88ced92
special case the mnemonic operand of the instruction in the
...
generated matcher, emiting it as a column in the MatchEntry
table instead of forcing it to go through classification and
everything else. Making it be classified caused tblgen to
produce a ton of one-off classes for each mneumonic. This
should reduce the size of the generated matcher significantly
while paving the way for future improvements.
llvm-svn: 113169
2010-09-06 21:01:37 +00:00
fdb7decfaf
The "ambiguous instructions" check only produces anything with -debug,
...
so only do the N^2 loop with debug mode.
llvm-svn: 113168
2010-09-06 20:21:47 +00:00
b4be28f33d
have tblgen detect when an instruction would have matched, but
...
failed because a subtarget feature was not enabled. Use this to
remove a bunch of hacks from the X86AsmParser for rejecting things
like popfl in 64-bit mode. Previously these hacks weren't needed,
but were important to get a message better than "invalid instruction"
when used in the wrong mode.
This also fixes bugs where pushal would not be rejected correctly in
32-bit mode (just pusha).
llvm-svn: 113166
2010-09-06 20:08:02 +00:00
a22a368e7c
change MatchInstructionImpl to return an enum instead of bool.
...
llvm-svn: 113165
2010-09-06 19:22:17 +00:00
3e4582ada5
have AsmMatcherEmitter.cpp produce the hunk of code that gets included
...
into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.
llvm-svn: 113163
2010-09-06 19:11:01 +00:00
07b332f0a0
emit the LLVM intrinsic name -> intrinsic number mapping table with
...
StringMatcher instead of a linear sequence of memcmps.
llvm-svn: 113145
2010-09-06 03:58:45 +00:00
96fe532c67
allow specifying an indentation level for the string matcher.
...
llvm-svn: 113143
2010-09-06 03:50:59 +00:00
497d13e82b
emit the __builtin -> intrinsic map with StringMatcher instead of a
...
copy of a close relative of it.
llvm-svn: 113142
2010-09-06 03:14:45 +00:00
6dcaa42540
same bug, another place.
...
llvm-svn: 113141
2010-09-06 03:12:27 +00:00
9bb3bf1b59
fix a critical bug where the generated table would say
...
"1 strings to match" in a comment, which isn't gramatic.
llvm-svn: 113140
2010-09-06 03:11:10 +00:00
69b5913500
update cmake
...
llvm-svn: 113139
2010-09-06 02:58:25 +00:00
ca5a3554b5
factor the snazzy string matcher code that Daniel hates
...
out of AsmMatcherEmitter.cpp into its own class.
llvm-svn: 113137
2010-09-06 02:01:51 +00:00
fb43da66b5
slightly improve the runtime and code size of the Intrinsics info table by not
...
comparing the "llvm." prefix in the memcmp, and not storing it in the string literal.
llvm-svn: 113136
2010-09-06 01:44:44 +00:00
2f095c636a
delete dead code.
...
llvm-svn: 113075
2010-09-04 18:17:16 +00:00
b1951ea1fe
zap dead code.
...
llvm-svn: 113071
2010-09-04 17:45:58 +00:00
2a9de4d828
Generalize getFieldType to work on all TypedInits. Add a couple of testcases from
...
Amaury Pouly.
llvm-svn: 113010
2010-09-03 21:00:49 +00:00
39dadbac5c
Remove a TODO comment; this is now filed in bugzilla (PR8005).
...
llvm-svn: 112982
2010-09-03 18:06:11 +00:00
99d82f2e8b
Stop emitting predicate functions. They are no longer used.
...
llvm-svn: 112924
2010-09-03 00:39:50 +00:00
ec8724f250
remove dead code.
...
llvm-svn: 112707
2010-09-01 15:39:31 +00:00
a2233f2801
Make tool_output_file's raw_ostream instance a member variable instead
...
of a base class.
This makes it possible to unregister the file from FilesToRemove when
the file is done. Also, this eliminates the need for
formatted_tool_output_file.
llvm-svn: 112706
2010-09-01 14:20:41 +00:00
dfbed53a84
Don't worry about union types.
...
llvm-svn: 112427
2010-08-29 14:50:21 +00:00
d13b1a3581
Remove obsolete keywords which are no longer relevant.
...
llvm-svn: 112382
2010-08-28 20:14:05 +00:00
5458b9ddc6
Remove unions from the vim syntax highlighting.
...
llvm-svn: 112381
2010-08-28 20:11:28 +00:00
2c9e253ca9
more dead thing zapping.
...
llvm-svn: 112353
2010-08-28 03:43:50 +00:00
d069114613
zap dead method
...
llvm-svn: 112352
2010-08-28 03:42:45 +00:00
aaff8f539a
Fix a comment typo.
...
llvm-svn: 112302
2010-08-27 21:56:59 +00:00
ca15841394
Clarify a comment.
...
llvm-svn: 112266
2010-08-27 15:16:40 +00:00
fa4a4705f9
Parse " (Hidden)" and cope with it.
...
llvm-svn: 112265
2010-08-27 15:16:09 +00:00
7e64c985fb
Default to looking for clang++ in the PATH, rather than trying to
...
guess a path that will work.
llvm-svn: 112264
2010-08-27 15:15:31 +00:00
f34728a95c
Experimental clang-based code-completion support for vim. This currently
...
depends on some clang patches which are not yet upstream.
llvm-svn: 112204
2010-08-26 18:12:22 +00:00
6490bf6072
Allow strict subclasses of register classes, this way we can handle
...
ARM instructions with:
foo GPR, rGPR
which happens a lot.
llvm-svn: 112025
2010-08-25 04:58:56 +00:00
e854192364
buildbot/valgrind: Ignore leaks in /usr/bin/as.
...
llvm-svn: 112022
2010-08-25 03:40:20 +00:00
b97a5e358e
Split out register class subclassing to a separate function and clean up
...
accordingly. No functional change.
llvm-svn: 112008
2010-08-25 00:41:18 +00:00
98f0ea6ade
Fix comment.
...
llvm-svn: 111996
2010-08-24 23:21:59 +00:00
acf9d5e380
llvmc: Improve error handling in EmitEdgeClasses().
...
llvm-svn: 111886
2010-08-24 01:10:22 +00:00
aaed5ea9b7
llvmc: Make syntax more consistent.
...
CompilationGraph and LanguageMap definitions do not use special syntax anymore.
llvm-svn: 111862
2010-08-23 23:21:23 +00:00
1a90528e63
llvmc: Allow multiple LanguageMaps.
...
llvm-svn: 111829
2010-08-23 19:24:16 +00:00
bf38e0749d
llvmc: Properly handle (error) in edge properties.
...
llvm-svn: 111827
2010-08-23 19:24:08 +00:00
0e6cfd7491
llvmc: Do not mention plugins in the code.
...
llvm-svn: 111826
2010-08-23 19:24:00 +00:00
191c4f73b2
Fix some GCC warnings by providing a virtual destructor in the base of a class
...
hierarchy with virtual methods and using llvm_unreachable to properly indicate
unreachable states which would otherwise leave variables uninitialized.
llvm-svn: 111803
2010-08-23 08:25:07 +00:00
18277eafb0
llvmc: Fix alias generation.
...
llvm-svn: 111662
2010-08-20 18:16:26 +00:00
defcda2e61
Trailing whitespace.
...
llvm-svn: 111656
2010-08-20 17:38:38 +00:00
2fb75f0455
Diagnose attempts to update standard output.
...
llvm-svn: 111649
2010-08-20 16:56:11 +00:00
fe99020b47
Convert FileUpdate to use tool_output_file, and to use
...
errs() instead of outs() for its verbose messages.
llvm-svn: 111648
2010-08-20 16:54:27 +00:00
2189d1a9f3
Convert tablegen to use tool_output_file.
...
llvm-svn: 111644
2010-08-20 16:45:58 +00:00
3eab653285
llvmc: Do not prefix option names with AutoGenerated.
...
Since they now live in the namespace 'autogenerated'.
llvm-svn: 111620
2010-08-20 11:24:51 +00:00
024ec17332
llvmc: Cut global namespace pollution.
...
llvm-svn: 111619
2010-08-20 11:24:44 +00:00
b2ca0d19f2
llvmc: Update examples.
...
llvm-svn: 111553
2010-08-19 20:04:19 +00:00
9262abdd8f
buildbot/valgrind: Update RegisterPass false positive suppression for API
...
changes.
llvm-svn: 111529
2010-08-19 17:21:21 +00:00
c1e296ed40
buildbot/valgrind: Suppress warnings about leaks in /bin/grep.
...
llvm-svn: 111528
2010-08-19 17:21:17 +00:00
33087a7fe4
Use std::string instead of StringRef in ClangAttrEmitter.cpp; per report on
...
cfe-dev, fixes an error compiling with MSVC. Using a StringRef here doesn't
look safe in any case.
llvm-svn: 111513
2010-08-19 06:11:05 +00:00
27b91a7410
lit/GoogleTest: Add .exe to the suffix when looking for tests.
...
llvm-svn: 111487
2010-08-19 00:22:45 +00:00
db5382093d
Add include missing for VC build.
...
llvm-svn: 111484
2010-08-19 00:19:03 +00:00
fa9fd03e2d
Remove three spurious semicolons
...
llvm-svn: 111480
2010-08-19 00:03:05 +00:00
1d2b159882
Finish full attribute class emission for clang.
...
For more information, see the accompanying clang patch.
llvm-svn: 111454
2010-08-18 23:23:09 +00:00
d84dbb5caf
Remove predicate workaround, we're going to require that predicate
...
and optional def operands are handled in the backend support.
llvm-svn: 111220
2010-08-17 01:18:37 +00:00
481d7a9ab4
Rename sat_shift operand to shift_imm, in preparation for using it for other
...
instructions besides saturate instructions. No functional changes.
llvm-svn: 111168
2010-08-16 18:27:34 +00:00
57825eea36
Install Embedded builds into usr/local. Radar 8313723.
...
llvm-svn: 111149
2010-08-16 16:39:59 +00:00
d0fcc9a818
Revert r111082. No warnings for this common pattern.
...
llvm-svn: 111102
2010-08-15 10:27:23 +00:00
938e976b90
llvmc: remove dynamic plugins.
...
llvm-svn: 111094
2010-08-15 07:07:12 +00:00
7c09ddf0ae
Add ATTRIBUTE_UNUSED to methods that are not supposed to be used.
...
llvm-svn: 111082
2010-08-14 21:35:10 +00:00
b990d970f1
Revert r111007.
...
Apparently, this is now fixed in Clang.
llvm-svn: 111032
2010-08-13 20:08:53 +00:00
8bdfce97a8
Add a workaround for building with Clang.
...
llvm-svn: 111007
2010-08-13 06:02:45 +00:00
d2cc5fb971
llvmc: fix two tests, remove XFAILs.
...
Tested on Linux and Darwin; please add platform-specific XFAILs/mail me a bug
report if this still fails.
llvm-svn: 110998
2010-08-13 02:29:24 +00:00
8e8f1c133a
Cleaned up the for-disassembly-only entries in the arm instruction table so that
...
the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.
llvm-svn: 110951
2010-08-12 20:46:17 +00:00
167b9d7f30
tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl',
...
target specific parsers can adapt the TargetAsmParser to this.
llvm-svn: 110888
2010-08-12 00:55:32 +00:00
add513112a
Move the ARM SSAT and USAT optional shift amount operand out of the
...
instruction opcode. This also fixes part of PR7792.
llvm-svn: 110875
2010-08-11 23:10:46 +00:00
69f024b855
tblgen/AsmMatcher: Treat '.' in assembly strings as a token separator.
...
llvm-svn: 110789
2010-08-11 06:36:59 +00:00
1326056108
tblgen/AsmMatcher: Downgrade instructions with tied operands to a debug-only warning, for now.
...
llvm-svn: 110779
2010-08-11 04:46:08 +00:00
9664984be8
Add a separate ARM instruction format for Saturate instructions.
...
(I discovered 2 more copies of the ARM instruction format list, bringing the
total to 4!! Two of them were already out of sync. I haven't yet gotten into
the disassembler enough to know the best way to fix this, but something needs
to be done.) Add support for encoding these instructions.
llvm-svn: 110754
2010-08-11 00:01:18 +00:00
e264e092bf
We already have this as OperandNode.
...
llvm-svn: 110748
2010-08-10 23:46:20 +00:00
407e76995b
Install llvmCore_Sim to the simulator SDK directory. Radar 8282845.
...
llvm-svn: 110687
2010-08-10 17:13:58 +00:00
ac6a3c4c66
Expand uses of python 2.6's "A if B else C" syntax into regular
...
if-else statements, to hopefully support older pythons (PR7850).
llvm-svn: 110638
2010-08-10 01:03:34 +00:00
18e853f458
Add back in r109901, which adds a Compare flag to the target instructions. It's
...
useful after all.
llvm-svn: 110531
2010-08-08 01:49:35 +00:00
027d5bcf89
Fix eabi calling convention when a 64 bit value shadows r3.
...
Without this what was happening was:
* R3 is not marked as "used"
* ARM backend thinks it has to save it to the stack because of vaarg
* Offset computation correctly ignores it
* Offsets are wrong
llvm-svn: 110446
2010-08-06 15:35:32 +00:00
e8bb340203
Revert r109901. The implementation of <rdar://problem/7405933> (r110423) doesn't
...
need the Compare flag after all.
--- Reverse-merging r109901 into '.':
U include/llvm/Target/TargetInstrDesc.h
U include/llvm/Target/Target.td
U utils/TableGen/InstrInfoEmitter.cpp
U utils/TableGen/CodeGenInstruction.cpp
U utils/TableGen/CodeGenInstruction.h
llvm-svn: 110424
2010-08-06 01:36:09 +00:00
957fc3df52
Moar words!
...
llvm-svn: 110422
2010-08-06 01:30:54 +00:00
a59132e329
Add tablegen support for vdup_lane
...
llvm-svn: 110419
2010-08-06 01:24:11 +00:00
ddb2d65c50
Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMem
...
to IntrReadWriteArgMem, as it's for reading as well as writing.
llvm-svn: 110395
2010-08-05 23:36:21 +00:00
1bcc697c2a
Update the polygen grammar for linker_private and linker_private_weak,
...
and add comments about major implemented features.
llvm-svn: 110215
2010-08-04 17:01:59 +00:00
988bfce174
Print a message when a test failure is due to stderr output
...
alone, rather than just an exit code.
llvm-svn: 110208
2010-08-04 16:42:38 +00:00
ccb6156a0f
Remove CVS artifacts.
...
llvm-svn: 110206
2010-08-04 16:11:24 +00:00
1a41e6e0ce
Delete scripts which haven't noticed that CVS has gone away.
...
llvm-svn: 110205
2010-08-04 16:10:42 +00:00
b3f5c6e795
cvsupdate is gone.
...
llvm-svn: 110204
2010-08-04 16:09:01 +00:00
67c0212353
Delete mkpatch. Everything it does is already done by svn diff by default.
...
llvm-svn: 110203
2010-08-04 16:07:22 +00:00
4f9c40c521
Change the logic which interprets output on stderr as an error so that
...
it doesn't modify the exit code or the stdout contents, and so that it
doesn't clutter the output with "Command has output on stderr!".
llvm-svn: 110171
2010-08-04 00:12:31 +00:00
794172ca9c
Don't print "Command output (stdout):" when the command has no output,
...
and same for stderr, to avoid clutter in the output.
llvm-svn: 110169
2010-08-04 00:05:16 +00:00
c70c6b144a
Use the regular conditional operator syntax instead of a clever hack.
...
llvm-svn: 110168
2010-08-04 00:00:13 +00:00
1390d189f3
build: Fix a dependency.
...
llvm-svn: 110001
2010-08-02 00:45:41 +00:00
a19db3594f
tests: Add an 'llvm-lit' tool (script), which gets generated as part of the
...
build and has the object build directory baked into it. This allows 'llvm-lit'
to properly find the information needed to run the test suite in all cases,
without requiring the user to have LLVM or 'lit' available in their PATH, for
example.
llvm-svn: 110000
2010-08-02 00:39:42 +00:00
38a867aca6
lit: Allow clients to define predefined parameters.
...
llvm-svn: 109999
2010-08-02 00:39:38 +00:00
9b8d586039
Add a "Compare" flag to the target instruction descriptor. This will be used
...
later to identify and possibly remove superfluous compare instructions -- those
that are testing for and setting a status flag that should already be set.
llvm-svn: 109901
2010-07-30 22:48:39 +00:00
f9d5fe7fbd
Tweak suppressions.
...
llvm-svn: 109858
2010-07-30 12:18:36 +00:00
d343166a0b
Many Thumb2 instructions can reference the full ARM register set (i.e.,
...
have 4 bits per register in the operand encoding), but have undefined
behavior when the operand value is 13 or 15 (SP and PC, respectively).
The trivial coalescer in linear scan sometimes will merge a copy from
SP into a subsequent instruction which uses the copy, and if that
instruction cannot legally reference SP, we get bad code such as:
mls r0,r9,r0,sp
instead of:
mov r2, sp
mls r0, r9, r0, r2
This patch adds a new register class for use by Thumb2 that excludes
the problematic registers (SP and PC) and is used instead of GPR
for those operands which cannot legally reference PC or SP. The
trivial coalescer explicitly requires that the register class
of the destination for the COPY instruction contain the source
register for the COPY to be considered for coalescing. This prevents
errant instructions like that above.
PR7499
llvm-svn: 109842
2010-07-30 02:41:01 +00:00
2e357b62bb
Supress valgrind errors from python.
...
llvm-svn: 109818
2010-07-29 23:15:04 +00:00
b2c657c618
Make un-named values legible in certain vim configurations.
...
llvm-svn: 109772
2010-07-29 17:57:57 +00:00
59fba9d2b9
Fix a warning from gcc-4.0 (from the ppc buildbot).
...
llvm-svn: 109605
2010-07-28 18:21:10 +00:00
e1270c64e3
Filter out patterns that have PredicateOperands.
...
llvm-svn: 109572
2010-07-28 01:52:23 +00:00
d359cf2e44
Return -1 only on failure to execute a program.
...
Also fix some comments.
llvm-svn: 109499
2010-07-27 11:19:36 +00:00
62ac5ca22d
80-col.
...
llvm-svn: 109407
2010-07-26 17:53:07 +00:00
1e5d7c6e82
Get rid of exceptions in llvmc.
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llvmc can be now compiled with llvm-gcc on Windows.
llvm-svn: 109215
2010-07-23 03:42:55 +00:00
c3b40da379
Add an explicit -sdk option to xcrun command.
...
llvm-svn: 109196
2010-07-22 23:33:00 +00:00
29dc45b650
lit: Add some example tests for previous commit.
...
llvm-svn: 109071
2010-07-22 00:40:19 +00:00
cfa3896d98
lit: Add support for 'REQUIRES: feature-one, feature-two, ...' in the
...
integrated-test formats (sh and tcl style). The particular features which get
recognized are up to the test suite itself to define.
llvm-svn: 109062
2010-07-21 23:39:57 +00:00
bebb8c5f86
Hack around extracts that aren't easy to process.
...
llvm-svn: 109043
2010-07-21 22:07:19 +00:00
ebcaddee44
Add support for a new Apple-style build target, EmbeddedSim, that builds
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llvmCore for the iOS Simulator.
llvm-svn: 108922
2010-07-20 20:44:02 +00:00
394f1c2a27
remove option from tablegen for building static header.
...
llvm-svn: 108893
2010-07-20 19:45:21 +00:00
9de0ca73d4
Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!
...
llvm-svn: 108769
2010-07-19 23:32:44 +00:00
a7d44a1ab6
Save a copy of the unstripped libLTO.dylib in $SYM_DIR. Clean up the code
...
for dealing with libLTO.dylib to put it all in one place and to allow
use of DISABLE_USR_LINKS.
llvm-svn: 108753
2010-07-19 21:33:07 +00:00
1432699cb2
Remove code duplication.
...
llvm-svn: 108718
2010-07-19 17:17:22 +00:00
4fc84a0dcd
Better error reporting for switch_list.
...
llvm-svn: 108714
2010-07-19 17:17:10 +00:00
eefe8616be
TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> attributes as part of the matcher.
...
- Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86.
llvm-svn: 108677
2010-07-19 05:44:09 +00:00
303838d69f
llvmc: Add a new option type (switch_list).
...
llvm-svn: 108673
2010-07-19 03:16:25 +00:00
004d772558
Update comment.
...
llvm-svn: 108571
2010-07-16 23:10:00 +00:00
499f797cdd
Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
...
thus is a much more meaningful name.
llvm-svn: 108563
2010-07-16 22:20:36 +00:00
5d2c1218f1
Remove the entire docs directory from Apple-style builds.
...
This fixes a "usr_junk" verification failure when installing into /usr.
llvm-svn: 108384
2010-07-14 23:49:18 +00:00
6f4f3612cc
Try to get embedded build of llvmCore to pass verification.
...
Simplify some things in the process.
llvm-svn: 108382
2010-07-14 23:41:58 +00:00
f059642c50
Silence a warning.
...
llvm-svn: 108169
2010-07-12 18:17:47 +00:00
41b4a6b36a
Convert some tab stops into spaces.
...
llvm-svn: 108130
2010-07-12 08:16:59 +00:00
4a52e2f6a7
Replace copyRegToReg with COPY in FastISelEmitter.
...
llvm-svn: 108071
2010-07-11 03:53:50 +00:00
d7b5ce3312
Reapply bottom-up fast-isel, with several fixes for x86-32:
...
- Check getBytesToPopOnReturn().
- Eschew ST0 and ST1 for return values.
- Fix the PIC base register initialization so that it doesn't ever
fail to end up the top of the entry block.
llvm-svn: 108039
2010-07-10 09:00:22 +00:00
792e906bef
Start the support for AVX instructions with 256-bit %ymm registers. A couple of
...
notes:
- The instructions are being added with dummy placeholder patterns using some 256
specifiers, this is not meant to work now, but since there are some multiclasses
generic enough to accept them, when we go for codegen, the stuff will be already
there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
file.
llvm-svn: 107996
2010-07-09 18:27:43 +00:00
6586e9b203
--- Reverse-merging r107947 into '.':
...
U utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U test/CodeGen/X86/fast-isel.ll
U test/CodeGen/X86/fast-isel-loads.ll
U include/llvm/Target/TargetLowering.h
U include/llvm/Support/PassNameParser.h
U include/llvm/CodeGen/FunctionLoweringInfo.h
U include/llvm/CodeGen/CallingConvLower.h
U include/llvm/CodeGen/FastISel.h
U include/llvm/CodeGen/SelectionDAGISel.h
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/CallingConvLower.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U lib/CodeGen/SelectionDAG/FastISel.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
U lib/Target/XCore/XCoreISelLowering.cpp
U lib/Target/XCore/XCoreISelLowering.h
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86ISelLowering.h
llvm-svn: 107987
2010-07-09 16:37:18 +00:00
cc40c76382
These changes should have accompanied r107943.
...
llvm-svn: 107947
2010-07-09 00:59:16 +00:00
e2289285ae
Changes to ARM tail calls, mostly cosmetic.
...
Add explicit testcases for tail calls within the same module.
Duplicate some code to humor those who think .w doesn't apply on ARM.
Leave this disabled on Thumb1, and add some comments explaining why it's hard
and won't gain much.
llvm-svn: 107851
2010-07-08 01:18:23 +00:00
e75704369d
Revert 107840 107839 107813 107804 107800 107797 107791.
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Debug info intrinsics win for now.
llvm-svn: 107850
2010-07-08 01:00:56 +00:00
ac5881295c
Implement the major chunk of PR7195: support for 'callw'
...
in the integrated assembler. Still some discussion to be
done.
llvm-svn: 107825
2010-07-07 22:27:31 +00:00
ffe64b1ee5
Give FunctionLoweringInfo an MBB member, avoiding the need to pass it
...
around everywhere, and also give it an InsertPt member, to enable isel
to operate at an arbitrary position within a block, rather than just
appending to a block.
llvm-svn: 107791
2010-07-07 16:47:08 +00:00
408bb192de
Rename "Release" builds as "Release+Asserts"; rename "Release-Asserts"
...
builds to "Release". The default build is unchanged (optimization on,
assertions on), however it is now called Release+Asserts. The intent
is that future LLVM releases released via llvm.org will be Release builds
in the new sense, i.e. will have assertions disabled (currently they have
assertions enabled, for a more than 20% slowdown). This will bring them
in line with MacOS releases, which ship with assertions disabled. It also
means that "Release" now means the same things in make and cmake builds:
cmake already disables assertions for "Release" builds AFAICS.
llvm-svn: 107758
2010-07-07 07:48:00 +00:00
676a15bdf5
Add a new target independent COPY instruction and code to lower it.
...
The COPY instruction is intended to replace the target specific copy
instructions for virtual registers as well as the EXTRACT_SUBREG and
INSERT_SUBREG instructions in MachineFunctions. It won't we used in a selection
DAG.
COPY is lowered to native register copies by LowerSubregs.
llvm-svn: 107529
2010-07-02 22:29:50 +00:00
3b1657b777
Clean up TargetOpcodes.h a bit, and limit the number of places where the full
...
list of predefined instructions appear. Add some consistency checks.
Ideally, TargetOpcodes.h should be produced by TableGen from Target.td, but it
is hardly worth the effort.
llvm-svn: 107520
2010-07-02 21:44:22 +00:00
7839c493e8
Use -l option to remove symbols from i386.
...
llvm-svn: 107212
2010-06-29 22:17:37 +00:00
9a925bec36
Strip resulting binaries.
...
llvm-svn: 107112
2010-06-29 01:08:57 +00:00
cfdaac1cb0
Remove unused variables.
...
llvm-svn: 106834
2010-06-25 09:35:33 +00:00
99f28dad6e
Change array references to match my previous change to use the public type
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names for the array fields.
llvm-svn: 106803
2010-06-24 22:21:19 +00:00
e26d710335
Fix up some comments.
...
llvm-svn: 106795
2010-06-24 22:04:30 +00:00
3808684055
Use the struct tags mandated by ARM's ABI. Also use the public type names for
...
the array fields in these structs.
llvm-svn: 106794
2010-06-24 22:03:41 +00:00
337e8db712
Add support for the x86 instructions "pusha" and "popa".
...
llvm-svn: 106671
2010-06-23 20:00:58 +00:00
30a28d6588
Fix a tblgen bug.
...
Given the pattern below as an example:
list<dag> Pattern = [(set RC:$dst, (v4f32 (shufp:src3 RC:$src1,
(mem_frag addr:$src2))))];
The right reference resolving should lead to:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp:src3 VR128:$src1,
(mem_frag addr:$src2))))];
But was yielding:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp VR128:$src1,
(mem_frag addr:$src2))))];
Fix this by passing the right name when creating a new DagInit node.
llvm-svn: 106670
2010-06-23 19:50:39 +00:00
99d71d1e7a
Don't link against libm and libpthread which don't exist in BeOS/Haiku. Also,
...
Haiku like Linux provides <regex.h>, so use it. Patch by Paul Davey!
llvm-svn: 106620
2010-06-23 06:48:34 +00:00
8d87a1f30a
Generate DWARF information during Apple-style build. They'll be stripped out
...
later on. But we need them saved in the symbols directory.
llvm-svn: 106604
2010-06-22 23:44:15 +00:00
dc883cf45a
Fix a subtle multiclass bug: when using class inheritance on
...
a toplevel 'defm', make sure to properly resolve references.
llvm-svn: 106570
2010-06-22 20:30:50 +00:00
75d4ecb9c3
Remove isTwoAddress from llvm.
...
llvm-svn: 106470
2010-06-21 20:35:09 +00:00
4713628816
Add support for returning multiple vectors via sret, which is how the ARM target expects the intrinsics to work.
...
llvm-svn: 106406
2010-06-20 21:09:52 +00:00
a06c2f79fc
An attempt to fix the problem Anton reported with
...
ARM tail calls. Don't know if it works, but it
doesn't break Darwin.
llvm-svn: 106309
2010-06-18 20:44:28 +00:00
23f8321cbc
Teach tablegen how to inherit from classes in 'defm' definitions.
...
The rule is simple: only inherit from a class list if they come
in the end, after the last multiclass.
llvm-svn: 106305
2010-06-18 19:53:41 +00:00
882bb2984e
Start TargetRegisterClass indices at 0 instead of 1, so that
...
MachineRegisterInfo doesn't have to confusingly allocate an extra
entry.
llvm-svn: 106296
2010-06-18 18:13:55 +00:00
deb2002cee
In case Rec is a definition and not a class, do the proper comparison!
...
llvm-svn: 106246
2010-06-17 23:00:16 +00:00
256b5a2bff
Modify tablegen to support generating all NEON code used by clang at once.
...
llvm-svn: 106207
2010-06-17 04:15:13 +00:00
7f4235d1ba
Fix the handling of !if result, avoiding null results for non 'int'.
...
llvm-svn: 106201
2010-06-17 01:50:39 +00:00
4d1d798736
For a tablegen expression such as !if(a,b,c), let 'a'
...
be evaluated for 'bit' operators
llvm-svn: 106185
2010-06-17 00:31:36 +00:00
0f184c0328
Fix the typo in my previous one-line commit.
...
llvm-svn: 106179
2010-06-17 00:10:16 +00:00
873f7aff62
Make sure CMake can build the files added by my previous commit.
...
llvm-svn: 106178
2010-06-16 23:52:37 +00:00
842eb0905e
Add preliminary clang attribute generation support.
...
The attribute class generation support is still somewhat limited.
See the accompanying clang commit for more details.
llvm-svn: 106174
2010-06-16 23:45:50 +00:00
77a4a56251
let the '!eq' expression support 'int' and 'bit' types
...
llvm-svn: 106171
2010-06-16 23:24:12 +00:00
26cefa5e11
Make VC++ happy
...
llvm-svn: 106054
2010-06-15 22:10:31 +00:00
44f9dfc9cf
Next round of tail call changes. Register used in a tail
...
call must not be callee-saved; following x86, add a new
regclass to represent this. Also fixes a couple of bugs.
Still disabled by default; Thumb doesn't work yet.
llvm-svn: 106053
2010-06-15 22:08:33 +00:00
24fdd22766
generate better code in CheckComplexPattern
...
llvm-svn: 105970
2010-06-14 22:33:34 +00:00
e42d72309b
Honor the SDKROOT setting when building llvm.
...
Radar 7894069.
llvm-svn: 105938
2010-06-14 17:56:25 +00:00
ac2aac1860
Add the last of the SemaChecking-gen code.
...
llvm-svn: 105929
2010-06-14 05:17:23 +00:00
444e9f0a35
Add a helping of comments
...
Add code for generating bits of semachecking
llvm-svn: 105907
2010-06-13 04:47:03 +00:00
0892ee503a
lit: Replace /dev/null in scripts with temporary files on Windows.
...
llvm-svn: 105888
2010-06-12 16:00:10 +00:00
05466ef7eb
declare a class with 'class' instead of struct to avoid tag mismatch
...
warnings, and don't shift by a bool. Patch by Rizky Herucakra!
llvm-svn: 105886
2010-06-12 15:46:56 +00:00
b90b010a2d
Add generic vector support for bitselect & element byteswap
...
llvm-svn: 105874
2010-06-12 03:09:49 +00:00
fd5458d4bd
More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm)
...
Introduce the VEX_X field
llvm-svn: 105859
2010-06-11 23:50:47 +00:00
c85504540e
lit: Add a forgotten default argument.
...
llvm-svn: 105858
2010-06-11 23:47:36 +00:00
43c2cb63ae
lit: When running Tcl style tests on Windows, substitute slashes to avoid Tcl
...
quoting problems. Not particularly ideal, but should work ok. Based on a patch by
Michael Spencer!
llvm-svn: 105855
2010-06-11 23:27:45 +00:00
6eae520de9
Add instruction encoding for the Neon VMOV immediate instruction. This changes
...
the machine instruction representation of the immediate value to be encoded
into an integer with similar fields as the actual VMOV instruction. This makes
things easier for the disassembler, since it can just stuff the bits into the
immediate operand, but harder for the asm printer since it has to decode the
value to be printed. Testcase for the encoding will follow later when MC has
more support for ARM.
llvm-svn: 105836
2010-06-11 21:34:50 +00:00
0e915300e3
Add support for polynomial type, for polynomial multiply
...
llvm-svn: 105792
2010-06-10 18:06:07 +00:00
5f2adccc1b
Teach tablegen to allow "let" expressions inside multiclasses,
...
providing more ways to factor out commonality from the records.
llvm-svn: 105776
2010-06-10 02:42:59 +00:00
46e9dc4e6b
NEON support for _lane ops, and multiplies by scalar.
...
llvm-svn: 105769
2010-06-10 00:16:56 +00:00
add2aa009c
Further refine types for operations which take scalars.
...
This will be used primarily by NEON shift intrinsics.
llvm-svn: 105733
2010-06-09 18:02:26 +00:00
223c481b1c
How about ULL...
...
llvm-svn: 105726
2010-06-09 16:16:48 +00:00
8fc7823e4d
Specialize I-Class instructions better so that we have less work to do in codegen.
...
Parenthesize macro args
llvm-svn: 105682
2010-06-09 05:11:55 +00:00
86a67bb573
Handle instructions which need to be #defines for the purpose of capturing constant arguments
...
Handle extract hi/lo with common code
llvm-svn: 105666
2010-06-09 01:09:00 +00:00
c2f87b7bb2
Reapply r105521, this time appending "LLU" to 64 bit
...
immediates to avoid breaking the build.
llvm-svn: 105652
2010-06-08 22:51:23 +00:00
d80ce4f861
Fix a valgrind error.
...
llvm-svn: 105600
2010-06-08 07:11:17 +00:00
8615667bac
Refine BuiltinsARM.def types a bit, we should do a better job of this to save some c++ code in CGBuiltins.
...
llvm-svn: 105598
2010-06-08 06:01:16 +00:00
fe123268a9
ARM NEON:
...
fix vcvt naming
handle vdup, vcombine with generic vector code
llvm-svn: 105588
2010-06-08 00:14:42 +00:00
12d1f62f6c
clang codegen support
...
llvm-svn: 105531
2010-06-07 16:00:37 +00:00
fdd2614330
revert r105521, which is breaking the buildbots with stuff like this:
...
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type
llvm-svn: 105524
2010-06-05 04:17:30 +00:00
594fa26317
Initial AVX support for some instructions. No patterns matched
...
yet, only assembly encoding support.
llvm-svn: 105521
2010-06-05 03:53:24 +00:00
c4f614870f
Teach tablegen to support 'defm' inside multiclasses.
...
llvm-svn: 105519
2010-06-05 02:11:52 +00:00
7090e5be2b
Handle multi-vector returns and args.
...
llvm-svn: 105496
2010-06-04 22:53:30 +00:00
0d081df3f2
Additional fixes to BuiltinsARM.def generator, on to clang codegen.
...
llvm-svn: 105488
2010-06-04 21:36:00 +00:00
878bdccea6
Progress on generating BuiltinsARM.def, still some duplicates to work out.
...
llvm-svn: 105461
2010-06-04 07:11:25 +00:00
1ca8dba557
BuiltinsARM.def emitter, still needs a substantial bit of tweaking to lighten the load on clang.
...
llvm-svn: 105456
2010-06-04 01:26:15 +00:00
03d6e4961c
Mangle __builtin_neon_* names appropriately.
...
Add skeleton of support for emitting the list of prototypes for BuiltinsARM.def
llvm-svn: 105443
2010-06-04 00:21:41 +00:00
64b76bd4f7
Add some additional capabilities to the neon emitter
...
llvm-svn: 105416
2010-06-03 21:35:22 +00:00
d679ff7330
Early implementation of tail call for ARM.
...
A temporary flag -arm-tail-calls defaults to off,
so there is no functional change by default.
Intrepid users may try this; simple cases work
but there are bugs.
llvm-svn: 105413
2010-06-03 21:09:53 +00:00
9f4ab44fe4
Forgot to update the most important part of the gtest modifications readme.
...
llvm-svn: 105396
2010-06-03 17:11:49 +00:00
7cd082a7a3
Disable pthread support in googletest if llvm was configured without threads.
...
llvm-svn: 105390
2010-06-03 15:17:04 +00:00
1add5f378d
Turns out gtest still prefers the system <tr1/tuple> over it's own
...
implementation. Force the internal one to unbreak clang selfhost on linux.
llvm-svn: 105386
2010-06-03 07:51:58 +00:00
11d56c55c4
arm_neon.h now makes it through clang and generates appropriate code for those functions which can use
...
generic vector operators rather than __builtin_neon_*
llvm-svn: 105380
2010-06-03 04:04:09 +00:00
9cb0274182
Update Readme and Makefiles for the new gtest.
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llvm-svn: 105355
2010-06-02 22:02:57 +00:00
bfb492d6c8
Merge gtest-1.5.0.
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llvm-svn: 105354
2010-06-02 22:02:30 +00:00
78b6a290cb
Merge gtest-1.4.0.
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llvm-svn: 105353
2010-06-02 22:02:11 +00:00
f2f402059f
Merge gtest-1.3.0.
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OSX users: make sure that CrashReporter is disabled when running unit tests.
Death tests are enabled now so you'll get a ton of message boxes.
llvm-svn: 105352
2010-06-02 22:01:25 +00:00
7db953e396
arm_neon.h emitter now mostly complete for the purposes of initial testing.
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llvm-svn: 105349
2010-06-02 21:53:00 +00:00
9242162bb1
Pacify recent gcc: remove a pointless const qualifier.
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llvm-svn: 105318
2010-06-02 08:37:30 +00:00
68d0518b92
Checkpoint; handle 'int' and 'void' correctly
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llvm-svn: 105316
2010-06-02 07:14:28 +00:00
d86d60f91d
Emit full function prototypes. Definitions & typedefs to come.
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llvm-svn: 105315
2010-06-02 06:17:19 +00:00
469bb2be2c
Checkpoint arm_neon.h generation with tablegen
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llvm-svn: 105307
2010-06-02 00:34:55 +00:00
6e1690bdd8
Fix comment
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llvm-svn: 105297
2010-06-01 23:29:39 +00:00
88337a95ca
Fix extra fread after EOF, non-wires-crossed version.
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llvm-svn: 105270
2010-06-01 14:09:29 +00:00
bf17d0f62c
revert r105223 which broke all my testing.
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llvm-svn: 105225
2010-05-31 17:10:45 +00:00
ad2259ec4c
Fix count so that it doesn't make an extra fread call after
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EOF is detected.
llvm-svn: 105223
2010-05-31 16:13:45 +00:00
c943c52073
Allow for creation of clang DeclNodes tables.
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The StmtNodes generator has been generalized to allow for the
creation of DeclNodes tables as well, and another emitter was
added for DeclContexts.
llvm-svn: 105164
2010-05-30 07:21:42 +00:00
417fc5e434
Emit TargetRegisterInfo::composeSubRegIndices().
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Also verify that all subregister indices compose unambiguously.
llvm-svn: 105064
2010-05-28 23:48:31 +00:00
2c3a196d16
Comment out some code in prep for actual .td file checkpoint.
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llvm-svn: 104927
2010-05-28 02:19:08 +00:00
48be842592
Fix build breakage.
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llvm-svn: 104912
2010-05-28 01:15:28 +00:00
dd5904687f
Add support to tablegen for auto-generating arm_neon.h from a tablegen description
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of the intrinsics. The goal is to auto-generate both support for GCC-style (vector)
and ARM-style (struct of vector) intrinsics.
This is work in progress, but will be completed soon.
llvm-svn: 104910
2010-05-28 01:08:32 +00:00
7559394270
When handling raw_ostream errors manually, use clear_error() so that
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raw_ostream doesn't try to do its own error handling.
llvm-svn: 104881
2010-05-27 20:17:28 +00:00
c6e5a4c68f
Simplify raw_ostream usage.
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llvm-svn: 104874
2010-05-27 19:48:08 +00:00
388fa73f03
Minor code simplification.
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llvm-svn: 104845
2010-05-27 16:25:05 +00:00
97ac3afac2
AsmMatcher: Ensure classes are totally ordered, so we can std::sort them reliably.
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llvm-svn: 104806
2010-05-27 05:31:32 +00:00
731440b62b
Check that inherited subregisters all have a direct SubRegIndex.
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llvm-svn: 104755
2010-05-26 22:15:07 +00:00
d1d7ed63ff
Add StringRef::compare_numeric and use it to sort TableGen register records.
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This means that our Registers are now ordered R7, R8, R9, R10, R12, ...
Not R1, R10, R11, R12, R2, R3, ...
llvm-svn: 104745
2010-05-26 21:47:28 +00:00
3113970675
Suppress emmission of empty subreg/superreg/alias sets.
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llvm-svn: 104741
2010-05-26 21:35:55 +00:00
7de379467e
Replace the SubRegSet tablegen class with a less error-prone mechanism.
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A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.
CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.
It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.
llvm-svn: 104704
2010-05-26 17:27:12 +00:00
50eec620f4
Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."
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This reverts commit 104654.
llvm-svn: 104660
2010-05-26 01:21:14 +00:00
0b0274524c
Replace the SubRegSet tablegen class with a less error-prone mechanism.
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A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.
CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.
It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.
llvm-svn: 104654
2010-05-26 00:28:19 +00:00
66c939a2ca
Drop the SuperregHashTable. It is essentially the same as SubregHashTable.
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llvm-svn: 104650
2010-05-25 23:43:18 +00:00
1ad0d5e25b
Print symbolic SubRegIndex names on machine operands.
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llvm-svn: 104628
2010-05-25 19:49:38 +00:00
3b59e0601e
Ignore NumberHack and give each SubRegIndex instance a unique enum value instead.
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This passes lit tests, but I'll give it a go through the buildbots to smoke out
any remaining places that depend on the old SubRegIndex numbering.
Then I'll remove NumberHack entirely.
llvm-svn: 104615
2010-05-25 17:21:04 +00:00
fdb25de17e
Switch SubRegSet to using symbolic SubRegIndices
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llvm-svn: 104571
2010-05-24 23:03:18 +00:00
76b3de92f2
diaggroup categories should take precedence over diag-specific groups.
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llvm-svn: 104567
2010-05-24 21:55:47 +00:00
edab242488
Replace the tablegen RegisterClass field SubRegClassList with an alist-like data
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structure that represents a mapping without any dependencies on SubRegIndex
numbering.
This brings us closer to being able to remove the explicit SubRegIndex
numbering, and it is now possible to specify any mapping without inventing
*_INVALID register classes.
llvm-svn: 104563
2010-05-24 21:46:58 +00:00
1c69646e99
Add the SubRegIndex TableGen class.
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This is the beginning of purely symbolic subregister indices, but we need a bit
of jiggling before the explicit numeric indices can be completely removed.
llvm-svn: 104492
2010-05-24 14:48:12 +00:00
346782c12c
tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses instead of just one.
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llvm-svn: 104452
2010-05-22 21:02:29 +00:00
5661c0c755
tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor
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it.
llvm-svn: 104270
2010-05-20 20:20:32 +00:00
04c4a399aa
lit: Add another place to look for bash.
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llvm-svn: 104189
2010-05-19 23:56:09 +00:00
7dfbb1faf1
Replace FIRST_* and LAST_* macros with a generic STMT_RANGE macro
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Also rename ABSTRACT to ABSTRACT_STMT
llvm-svn: 104018
2010-05-18 06:22:50 +00:00
cd67c21407
Added a QQQQ register file to model 4-consecutive Q registers.
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llvm-svn: 103760
2010-05-14 02:13:41 +00:00
670a4104a9
Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.
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llvm-svn: 103746
2010-05-13 23:55:47 +00:00
89e5635a7c
Update tablegen to generate shorts instead of chars for subgroup arrays.
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llvm-svn: 103704
2010-05-13 07:43:47 +00:00
12a78f502a
lit: Fix a sh lexing bug which caused annotate-token.m to fail when run with the
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internal shell parser; we weren't lexing the quotes in a command like::
clang -DFOO='hello'
correctly.
llvm-svn: 103652
2010-05-12 21:47:58 +00:00
cf925cb272
lit: Fix OneCommandPerFileTest format when tests are specified directly.
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llvm-svn: 103626
2010-05-12 17:56:44 +00:00
6b3b0a405e
lit: Add support for 'lit ... @foo', which reads a list of tests to run from
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foo.
llvm-svn: 103625
2010-05-12 17:56:42 +00:00
Chris Lattner