1347715644
Some cleanup and bulletproofing for node replacement in LegalizeDAG. To maintain LegalizeDAG invariants, whenever we a node is replaced, we must attempt to delete it, and if it still
...
has uses after it is replaced (which can happen in rare cases due to CSE), we must revisit it.
llvm-svn: 144432
2011-11-11 23:58:27 +00:00
155763b630
Oops. Missed the isel half of this. revert while I sort that out.
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llvm-svn: 144431
2011-11-11 23:51:31 +00:00
28f721a2b4
ARM assembly parsing for VST1 two-register encoding.
...
llvm-svn: 144430
2011-11-11 23:45:47 +00:00
609d113874
ARM optional size suffix for VLDR/VSTR syntax.
...
llvm-svn: 144427
2011-11-11 23:34:43 +00:00
a7ebc5617d
Add support in fast-isel for selecting memset/memcpy/memmove intrinsics.
...
llvm-svn: 144426
2011-11-11 23:31:03 +00:00
ab1a4a2301
Loosen test by using REs. Approved by Devang.
...
llvm-svn: 144425
2011-11-11 23:25:38 +00:00
7f89f4c91c
CMake: Fix CMake build for new Mips tblgen file.
...
llvm-svn: 144423
2011-11-11 23:12:56 +00:00
12952fef71
ARM vldm and vstm VFP instructions can take a data type suffix.
...
It's ignored by the assembler when present, but is legal syntax. Other
instructions have something similar, but for some mnemonics it's
only sometimes not significant, so this quick check in the parser will
need refactored into something more robust soon-ish. This gets some
basics working in the meantime.
Partial for rdar://10435264
llvm-svn: 144422
2011-11-11 23:08:10 +00:00
dbcfb9987c
build/Make: Change llvm-config-2 to be compiled as a build tool.
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llvm-svn: 144421
2011-11-11 22:59:49 +00:00
b102d5cb66
llvm-config-2: Detect when we are running out of a BuildTools development tree, so that we can always provide library/include information for the real build directory.
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llvm-svn: 144420
2011-11-11 22:59:47 +00:00
94f3c5402d
cross-build/Make: Update cross build to properly forward ARCH and
...
TARGETS_TO_BUILD variables to build tools submake, and also tweak echo command
to indicate when we are compiling/etc build tools.
llvm-svn: 144419
2011-11-11 22:59:45 +00:00
823256b3a9
build/Make: Eliminate BUILD_COMPONENT variable, which is unused.
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llvm-svn: 144418
2011-11-11 22:59:42 +00:00
57fb3ae997
LLVMBuild: Add description files for the LLVM tools.
...
llvm-svn: 144417
2011-11-11 22:59:39 +00:00
2f39f72703
LLVMBuild: Alphabetize required_libraries lists.
...
llvm-svn: 144416
2011-11-11 22:59:23 +00:00
b8a9c43d07
Target/LLVMBuild: Order components alphabetically.
...
llvm-svn: 144415
2011-11-11 22:59:16 +00:00
c85e3ff334
Mips MC object code emission improvements:
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"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter
llvm-svn: 144414
2011-11-11 22:58:42 +00:00
1094ded6f3
Add an option '--enable-libcpp' that will have the compiler pass on
...
options to use libc++ as the default c++ library.
llvm-svn: 144413
2011-11-11 22:51:42 +00:00
b68eeb3852
Nuke no longer accurate comment.
...
llvm-svn: 144411
2011-11-11 22:30:06 +00:00
28c1d18434
Preserve MachineMemOperands in ARMLoadStoreOptimizer.
...
Fixes PR8113.
llvm-svn: 144409
2011-11-11 22:18:09 +00:00
85a2343b01
ARM allow Q registers in vldm/vstm register lists.
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rdar://9672822
llvm-svn: 144407
2011-11-11 21:27:40 +00:00
5dcd025036
build/Make: Switch back to llvm-config for now, I foolishly forgot to think
...
about cross compiles.
llvm-svn: 144406
2011-11-11 20:41:06 +00:00
26c328d734
Add a custom safepoint method, in order for language implementers to decide which machine instruction gets to be a safepoint.
...
llvm-svn: 144399
2011-11-11 18:32:52 +00:00
a90cb76489
Move X86 specific test in X86 directory.
...
llvm-svn: 144395
2011-11-11 18:13:19 +00:00
a39794b029
Move X86 specific test in X86 directory.
...
llvm-svn: 144394
2011-11-11 18:10:38 +00:00
c391f7ff64
Remove FIXME comment that should have been removed with r144351.
...
llvm-svn: 144392
2011-11-11 17:34:14 +00:00
089cc53232
allow non-device function calls in PTX when natively handling device-side printf
...
llvm-svn: 144388
2011-11-11 14:45:12 +00:00
80cd65bfa9
add rules in tabgen for PTX COPY_ADDRESS of frameindex
...
llvm-svn: 144387
2011-11-11 14:45:06 +00:00
f554228d82
Clients are responsible for initializing the targets, remove it from the disassembler API.
...
This will break users of the LLVMCreateDisasm API (not that I know of any). They have to call the
LLVMInitializeAll* functions from llvm-c/Target.h themselves now. edis' C API in all its horribleness
should be unaffected.
llvm-svn: 144385
2011-11-11 13:20:40 +00:00
48b5bbffed
Remove the unnecessary dependency on libARMCodeGen from libARMDisassembler.
...
llvm-svn: 144384
2011-11-11 12:39:41 +00:00
1cc805c058
Remove the unnecessary dependency on libMBlazeCodeGen from libMBlazeDisassembler.
...
llvm-svn: 144383
2011-11-11 12:39:35 +00:00
ea28a34c43
Add lowering for AVX2 shift instructions.
...
llvm-svn: 144380
2011-11-11 07:39:23 +00:00
e19b0a9eb8
Rename variables to avoid confusion. No functionallity change intended.
...
llvm-svn: 144377
2011-11-11 06:27:41 +00:00
7ddd63ce4e
Add support for using immediates with select instructions.
...
rdar://10412592
llvm-svn: 144376
2011-11-11 06:20:39 +00:00
4a63d1c0f0
Do not try to detect DAG combine patterns for integer multiply-add/sub if value
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type is not i32. MIPS does not have 64-bit integer multiply-add/sub
instructions.
llvm-svn: 144373
2011-11-11 04:18:21 +00:00
21cbc25bbb
64-bit atomic instructions.
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llvm-svn: 144372
2011-11-11 04:14:30 +00:00
9189d7127f
Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64.
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llvm-svn: 144371
2011-11-11 04:11:56 +00:00
4bdfec57ba
Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC.
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llvm-svn: 144370
2011-11-11 04:06:38 +00:00
0009dc2088
64-bit versions of jal, jalr and bal.
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llvm-svn: 144368
2011-11-11 04:03:54 +00:00
11521863da
Emit Mips64's sequence of instructions that set global register in prologue.
...
llvm-svn: 144367
2011-11-11 04:00:29 +00:00
aa1f4c7986
Fix printing of MCSymbolRegExpr. Needs three closing parentheses for
...
VK_Mips_GPOFF_HI/LO.
llvm-svn: 144366
2011-11-11 03:58:36 +00:00
c4a001478c
Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.
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llvm-svn: 144361
2011-11-11 03:16:38 +00:00
0a917b7ad4
Initialize variable.
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llvm-svn: 144360
2011-11-11 03:16:32 +00:00
023ede5649
When loading a value, treat an i1 as an i8.
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llvm-svn: 144356
2011-11-11 02:38:59 +00:00
c12c211c44
If we have a DIE with an AT_specification use that instead of the normal
...
addr DIE when adding to the dwarf accelerator tables.
llvm-svn: 144354
2011-11-11 01:55:22 +00:00
0a309292c4
Get rid of an optimization in SCCP which appears to have many issues. Specifically, it doesn't handle many cases involving undef correctly, and it is missing other checks which
...
lead to it trying to re-mark a value marked as a constant with a different value. It also appears to trigger very rarely.
Fixes PR11357.
llvm-svn: 144352
2011-11-11 01:16:15 +00:00
70976ad9c2
Reenable compact unwinding now that <rdar://problem/10430076> is fixed.
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llvm-svn: 144351
2011-11-11 01:03:50 +00:00
8df8204554
If we have to reset the calculation of the compact encoding, then also reset the
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"saved register" index.
<rdar://problem/10430076>
llvm-svn: 144350
2011-11-11 00:59:14 +00:00
2a3503e061
Add support for using MVN to materialize negative constants.
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rdar://10412592
llvm-svn: 144348
2011-11-11 00:36:21 +00:00
f311655e3f
Disable compact unwind generation until I can solve the codegen problems.
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llvm-svn: 144346
2011-11-11 00:28:42 +00:00
f258ad81c0
llvm-build: Add --configure-target-def-file option.
...
- Can be used to generate the substitution values we currently use for the various target related .def files.
llvm-svn: 144345
2011-11-11 00:24:00 +00:00
6d617b48c7
LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler.
...
llvm-svn: 144344
2011-11-11 00:23:56 +00:00
d9a9be269c
Thumb2 ldm/stm updating w/ one register in the list are LDR/STR.
...
rdar://10429490
llvm-svn: 144338
2011-11-10 23:58:34 +00:00
afad053141
ARM let processInstruction() tranforms chain.
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llvm-svn: 144337
2011-11-10 23:42:14 +00:00
5e515797b6
Add blurb for VMKit.
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llvm-svn: 144336
2011-11-10 23:37:56 +00:00
a2193ab418
build/Make: llvm-config-2 needs to use EXEEXT, since it is an actual executable
...
now.
llvm-svn: 144335
2011-11-10 23:33:20 +00:00
eb3179e57a
Fix typo.
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llvm-svn: 144334
2011-11-10 23:33:18 +00:00
9bded9dc24
Thumb2 parsing for push/pop w/ hi registers in the reglist.
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rdar://10130228.
llvm-svn: 144331
2011-11-10 23:17:11 +00:00
a113eb0205
Thumb1 diagnostics for reglist on PUSH/POP fix.
...
Was not checking the first register in the register list.
llvm-svn: 144329
2011-11-10 23:01:27 +00:00
105c7edf7c
git: Add tools/lldb to the ignore list.
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llvm-svn: 144328
2011-11-10 22:55:50 +00:00
79278365d3
Check in getOrCreateSubprogramDIE if a declaration exists and if so output
...
it first.
This is a more general fix to pr11300.
llvm-svn: 144324
2011-11-10 22:34:29 +00:00
86660ab0b0
build/Make: Try to switch over to llvm-config-2 again, now that I've cleaned up
...
some more of the explicit dependencies. I'm staging things more slowly this time
in case there is more unanticipated fallout.
llvm-svn: 144323
2011-11-10 22:11:04 +00:00
5a5ce63742
Thumb MUL assembly parsing for 3-operand form.
...
Get the source register that isn't tied to the destination register correct,
even when the assembly source operand order is backwards.
rdar://10428630
llvm-svn: 144322
2011-11-10 22:10:12 +00:00
085f6f2af1
build/MBlazeDisassembler: Some compilers may generate an MBlaze disassembler
...
that depends on MBlazeCodeGen. This is a layering violation that should really
be fixed.
llvm-svn: 144321
2011-11-10 22:00:37 +00:00
b27317f7dd
build/MCDisassembler: Fix required libraries list of MCDisassembler to use
...
all-targets instead of an explicit list.
llvm-svn: 144320
2011-11-10 22:00:34 +00:00
66b37db641
Make types and namespaces take multiple DIEs for the accelerator tables
...
as well.
llvm-svn: 144319
2011-11-10 21:47:55 +00:00
9304ea4306
Remove a really ancient line from the default 'make clean' rule that attempts
...
to delete core files. This causes a warning in clang/lib/StaticAnalyzer on
case insensitive filesystems, since it contains a "Core" directory. Since this
is pointless anyway, just zap it.
llvm-svn: 144317
2011-11-10 21:12:28 +00:00
d1762e00e2
When in ARM mode, LDRH/STRH require special handling of negative offsets.
...
For correctness, disable this for now.
rdar://10418009
llvm-svn: 144316
2011-11-10 21:09:49 +00:00
42ba6286b6
ARM .thumb_func directive for quoted symbol names.
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Use the getIdentifier() method of the token, not getString(), otherwise
we keep the quotes as part of the symbol name, which we don't want.
rdar://10428015
llvm-svn: 144315
2011-11-10 20:48:53 +00:00
3a9d77f4c1
test commit undo
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llvm-svn: 144314
2011-11-10 20:39:51 +00:00
1aff5b237b
test commit redux
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llvm-svn: 144313
2011-11-10 20:23:28 +00:00
a4237c380e
Fixed bug in DeadStoreElimination commit r144239
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Size of data being pointed to wasn't always being checked so some small writes were killing big writes
Fixes <rdar://problem/10426753>
llvm-svn: 144312
2011-11-10 20:22:08 +00:00
6d3eeec068
random notes, llvm-gcc is gone, fix a few broken tags.
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llvm-svn: 144311
2011-11-10 20:15:40 +00:00
933b43f188
Revert r144300 "llvm-config: Replace with C++ version (was llvm-config-2).",
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which didn't appear ready for prime time.
llvm-svn: 144309
2011-11-10 19:59:35 +00:00
b9848b2115
undo test commit
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llvm-svn: 144308
2011-11-10 19:58:22 +00:00
f0f05dfaf6
test commit
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llvm-svn: 144307
2011-11-10 19:58:03 +00:00
e288793e44
Move type handling to make sure we get all created types that aren't
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forward decls and have names into the dwarf accelerator types table.
llvm-svn: 144306
2011-11-10 19:52:58 +00:00
d9843b34e6
Rework adding function names to the dwarf accelerator tables, allow
...
multiple dies per function and support C++ basenames.
llvm-svn: 144304
2011-11-10 19:25:34 +00:00
c5c49466a1
Add additional checking to ensure that MachineMemOperands are never set to null, which can happen in weird circumstances where target intrinsic hooks are implemented incorrectly.
...
llvm-svn: 144303
2011-11-10 19:25:09 +00:00
c14871cc67
ARM assembly parsing for LSR/LSL/ROR(immediate).
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More of rdar://9704684
llvm-svn: 144301
2011-11-10 19:18:01 +00:00
166c804893
llvm-config: Replace with C++ version (was llvm-config-2).
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llvm-svn: 144300
2011-11-10 18:49:59 +00:00
f5b9658a25
llvm-config-2: Use USEDLIBS directly instead of LINK_COMPONENTS, which will
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require this tool to resolve (currently).
llvm-svn: 144299
2011-11-10 18:49:50 +00:00
a294c549ca
Release notes for DragonEgg.
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llvm-svn: 144298
2011-11-10 18:44:29 +00:00
61db5a59f7
ARM assembly parsing for ASR(immediate).
...
Start of rdar://9704684
llvm-svn: 144293
2011-11-10 16:44:55 +00:00
b538095011
build: Rename CBackend and CppBackend libraries to have CodeGen suffix, for
...
consistency with other targets.
llvm-svn: 144292
2011-11-10 15:35:14 +00:00
fe999b4799
llvm-config-2: Fix thinko in maintenance of visited component set.
...
llvm-svn: 144291
2011-11-10 14:53:23 +00:00
270354100a
test/CodeGen/X86/lsr-loop-exit-cond.ll: Try to appease linux and freebsd bots to specify explicit -mtriple=x86_64-darwin.
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I guess it expects -relocation-model=pic.
llvm-svn: 144290
2011-11-10 14:18:59 +00:00
d33b2d6b7a
Use a bigger hammer to fix PR11314 by disabling the "forcing two-address
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instruction lower optimization" in the pre-RA scheduler.
The optimization, rather the hack, was done before MI use-list was available.
Now we should be able to implement it in a better way, perhaps in the
two-address pass until a MI scheduler is available.
Now that the scheduler has to backtrack to handle call sequences. Adding
artificial scheduling constraints is just not safe. Furthermore, the hack
is not taking all the other scheduling decisions into consideration so it's just
as likely to pessimize code. So I view disabling this optimization goodness
regardless of PR11314.
llvm-svn: 144267
2011-11-10 07:43:16 +00:00
0a2f797dec
AVX2: Add variable shift from memory.
...
Note: These patterns only works in some cases because
many times the load sd node is bitcasted from a load
node of a different type.
llvm-svn: 144266
2011-11-10 06:54:20 +00:00
3fbd094ad9
For immediate encodings of icmp, zero or sign extend first. Then
...
determine if the value is negative and flip the sign accordingly.
rdar://10422026
llvm-svn: 144258
2011-11-10 01:30:39 +00:00
807c6e4e5f
build/Make & CMake: Pass the appropriate --native-target and --enable-targets
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options to llvm-build, so the all-targets etc. components are defined properly.
llvm-svn: 144255
2011-11-10 01:16:48 +00:00
233c9304a8
llvm-build: Add --native-target and --enable-targets options, and add logic to
...
handle defining the "magic" target related components (like native,
nativecodegen, and engine).
- We still require these components to be in the project (currently in
lib/Target) so that we have a place to document them and hopefully make it
more obvious that they are "magic".
llvm-svn: 144253
2011-11-10 00:50:07 +00:00
79fa1e8891
llvm-build: Split out the validation logic.
...
llvm-svn: 144252
2011-11-10 00:49:58 +00:00
1c04e14447
llvm-build: Change CBackend and CppBackend to not use library_name. This will
...
change the generated library .a file name once we fully switch over, but
simplifies how we treat these targets without requiring more special casing
(since their library group name and the codegen library name currently map to
the same "llvm-config" style component name).
llvm-svn: 144251
2011-11-10 00:49:55 +00:00
82219ad4dc
llvm-build: Add an explicit component type to represent targets.
...
- Gives us a place to hang target specific metadata (like whether the target has a JIT).
llvm-svn: 144250
2011-11-10 00:49:51 +00:00
c83a459937
llvm-build: Tidy up options.
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llvm-svn: 144249
2011-11-10 00:49:42 +00:00
eef48b6938
Strip old implicit operands after foldMemoryOperand.
...
The TII.foldMemoryOperand hook preserves implicit operands from the
original instruction. This is not what we want when those implicit
operands refer to the register being spilled.
Implicit operands referring to other registers are preserved.
This fixes PR11347.
llvm-svn: 144247
2011-11-10 00:17:03 +00:00
133ccfcc22
Remove this from the CMake build since I erased the file.
...
llvm-svn: 144245
2011-11-10 00:07:22 +00:00
a48485a37f
Tidy up.
...
llvm-svn: 144244
2011-11-10 00:02:33 +00:00
efc349af6c
Remove the old-style ARM disassembler, which is no longer used.
...
llvm-svn: 144243
2011-11-09 23:56:06 +00:00
25bc090170
Thumb2 assembly parsing STMDB w/ optional .w suffix.
...
rdar://10422955
llvm-svn: 144242
2011-11-09 23:44:23 +00:00
Eli Friedman