Commit Graph

151505 Commits

Author SHA1 Message Date
Davide Italiano b8ad3eebca [IPO] Temporarily rollback r307215.
[GlobalOpt] Remove unreachable blocks before optimizing a function.
While the change is presumably correct, it exposes a latent bug
in DI which breaks on of the CFI checks. I'll analyze it further
and try to understand what's going on.

llvm-svn: 307729
2017-07-11 23:10:17 +00:00
Jakub Kuderski b5567ca77d [Dominators] Use a custom DFS implementation
Summary:
Custom DFS implementation allows us to skip over certain nodes without adding them to the visited map, which is not easily doable with llvm's dfs iterators. What's more, caching predecessors becomes easy.

This patch implements a single DFS function (template) for both forward and reverse DFS, which should be easier to maintain then separate two ones.

Skipping over nodes based on a predicate will be necessary later to implement incremental updates.

There also seems to be a very slight performance improved when bootstrapping clang with this patch on my machine (3:28s -> 3:26s) .

Reviewers: dberlin, sanjoy, davide, grosser

Reviewed By: dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34651

llvm-svn: 307727
2017-07-11 22:55:04 +00:00
Reid Kleckner 447f677133 [codeview] Fix type index discovery for four symbol records
I encountered these when linking LLD, which uses atls.lib. Those objects
appear to use these uncommon symbol records:

  0x115E S_HEAPALLOCSITE
  0x113D S_ENVBLOCK
  0x1113 S_GTHREAD32
  0x1153 S_FILESTATIC

llvm-svn: 307725
2017-07-11 22:37:25 +00:00
Konstantin Zhuravlyov bb80d3e1d3 Enhance synchscope representation
OpenCL 2.0 introduces the notion of memory scopes in atomic operations to
  global and local memory. These scopes restrict how synchronization is
  achieved, which can result in improved performance.

  This change extends existing notion of synchronization scopes in LLVM to
  support arbitrary scopes expressed as target-specific strings, in addition to
  the already defined scopes (single thread, system).

  The LLVM IR and MIR syntax for expressing synchronization scopes has changed
  to use *syncscope("<scope>")*, where <scope> can be "singlethread" (this
  replaces *singlethread* keyword), or a target-specific name. As before, if
  the scope is not specified, it defaults to CrossThread/System scope.

  Implementation details:
    - Mapping from synchronization scope name/string to synchronization scope id
      is stored in LLVM context;
    - CrossThread/System and SingleThread scopes are pre-defined to efficiently
      check for known scopes without comparing strings;
    - Synchronization scope names are stored in SYNC_SCOPE_NAMES_BLOCK in
      the bitcode.

Differential Revision: https://reviews.llvm.org/D21723

llvm-svn: 307722
2017-07-11 22:23:00 +00:00
Evandro Menezes 0cd23f5642 [CodeGen] Rename DEBUG_TYPE to match passnames
Rename missing DEBUG_TYPE "machine-scheduler" from backend files, which were
absent from https://reviews.llvm.org/rL303921.

Differential revision: https://reviews.llvm.org/D35231

llvm-svn: 307719
2017-07-11 22:08:28 +00:00
Sanjay Patel 7c026cb1af [x86] auto-generate full checks; NFC
llvm-svn: 307718
2017-07-11 22:04:36 +00:00
Simon Dardis d961192870 [mips][mt] Correct spelling error in comment. NFCI.
llvm-svn: 307717
2017-07-11 21:36:58 +00:00
Simon Dardis 805f1e03b8 [mips][mt][2/7] Implement .module and .set directives for the MT ASE.
This patch implements the .module and .set directives for the MT ASE,
notably that .module sets the relevant flags in .MIPS.abiflags and .set
doesn't.

Reviewers: slthakur, atanasyan

Differential Revision: https://reviews.llvm.org/D35249

llvm-svn: 307716
2017-07-11 21:28:36 +00:00
Martin Storsjo 0e83e85f63 [ARM, ELF] Don't shift movt relocation offsets
For ELF, a movw+movt pair is handled as two separate relocations.
If an offset should be applied to the symbol address, this offset is
stored as an immediate in the instruction (as opposed to stored as an
offset in the relocation itself).

Even though the actual value stored in the movt immediate after linking
is the top half of the value, we need to store the unshifted offset
prior to linking. When the relocation is made during linking, the offset
gets added to the target symbol value, and the upper half of the value
is stored in the instruction.

This makes sure that movw+movt with offset symbols get properly
handled, in case the offset addition in the lower half should be
carried over to the upper half.

This makes the output from the additions to the test case match
the output from GNU binutils.

For COFF and MachO, the movw/movt relocations are handled as a pair,
and the overflow from the lower half gets carried over to the movt,
so they should keep the shifted offset just as before.

Differential Revision: https://reviews.llvm.org/D35242

llvm-svn: 307713
2017-07-11 21:07:10 +00:00
Florian Hahn 93cf9b4f91 [AArch64] Remove unused IsDarwin & IsNotDarwin predicates (NFCI).
Reviewers: t.p.northover, rengolin

Reviewed By: t.p.northover

Subscribers: aemerson, javed.absar, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D35266

llvm-svn: 307706
2017-07-11 20:56:24 +00:00
Anna Thomas bafe766f5d [LoopUnrollRuntime] NFC: Add some debugging trace messages for why loop wasn't unrolled.
llvm-svn: 307705
2017-07-11 20:44:37 +00:00
Xinliang David Li 801b5319c5 [ProfileData] Add new option to dump topn hottest functions
Differential Revision: http://reviews.llvm.org/D35155

llvm-svn: 307702
2017-07-11 20:30:43 +00:00
Davide Italiano ee1c82112e [NewGVN] Check for congruency of memory accesses.
This is fine as nothing in the code relies on leader and memory
leader being the same for a given congruency class. Ack'ed by
Dan.

Fixes PR33720.

llvm-svn: 307699
2017-07-11 19:49:12 +00:00
Michael Zuckerman 1fe5628aa0 reverting 307677.
llvm-svn: 307698
2017-07-11 19:46:11 +00:00
Davide Italiano 67b0e53dc1 [NewGVN] Fix an innocent typo I found while debugging PR33720.
llvm-svn: 307694
2017-07-11 19:19:45 +00:00
Davide Italiano fb4544cd15 [NewGVN] Clarify the function invariants formatting them properly.
llvm-svn: 307692
2017-07-11 19:15:36 +00:00
Tony Jiang 892f8c42dc [PPC] Fix one test case regression for patch https://reviews.llvm.org/D34337.
llvm-svn: 307691
2017-07-11 19:07:10 +00:00
Dan Liew 368d8a7351 [LibFuzzer] Fix `-Wcomment` warning emitted by GCC.
```
./FuzzerIOWindows.cpp:185:1: warning: multi-line comment [-Wcomment]
 // Parse a directory ending in separator, like: SomeDir\
 ^
./FuzzerIOWindows.cpp:200:1: warning: multi-line comment [-Wcomment]
 // Parse a servername and share, like: SomeServer\SomeShare\
 ^
```

Differential Revision: https://reviews.llvm.org/D35244

llvm-svn: 307687
2017-07-11 18:27:52 +00:00
Dan Liew 2d06d7e512 [LibFuzzer] Fix `-Wpedantic` warning reported by Eric Christopher.
The warning is reproducible with GCC 4.8. Thanks to David Blaikie for
the suggested fix.

The reported warning was

```
/usr/local/google/home/echristo/sources/llvm/lib/Fuzzer/FuzzerExtFunctions.def:29:10: warning: ISO C++ forbids casting between pointer-to-function and pointer-to-object [-Wpedantic]
 EXT_FUNC(__lsan_enable, void, (), false);
          ^
/usr/local/google/home/echristo/sources/llvm/lib/Fuzzer/FuzzerExtFunctionsWeak.cpp:44:24: note: in definition of macro ‘EXT_FUNC’
   CheckFnPtr((void *)::NAME, #NAME, WARN);
                        ^
```

Differential Revision: https://reviews.llvm.org/D35243

llvm-svn: 307686
2017-07-11 18:27:48 +00:00
Evgeniy Stepanov 3d5ea713f7 [msan] Only check shadow memory for operands that are sized.
Fixes PR33347: https://bugs.llvm.org/show_bug.cgi?id=33347.

Differential Revision: https://reviews.llvm.org/D35160

Patch by Matt Morehouse.

llvm-svn: 307684
2017-07-11 18:13:52 +00:00
Simon Dardis ae719c5a17 [mips][mt][1/7] Add the MT ASE as a subtarget feature.
Preparatory work for adding the MIPS MT (multi-threading) ASE instructions.

Reviewers: slthakur, atanasyan

Differential Revision: https://reviews.llvm.org/D35247

llvm-svn: 307679
2017-07-11 18:03:20 +00:00
Konstantin Zhuravlyov 94b3b47c73 Revert "AMDGPU: Do not test for SI in getIsaVersion"
This reverts commit r307573.

This breaks downstream test.

llvm-svn: 307678
2017-07-11 17:57:41 +00:00
Michael Zuckerman 4b6d01a008 [X86][LLVM]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess.
Base test for avx512
adding new base test to trunk befor commit change on the test

llvm-svn: 307677
2017-07-11 17:17:49 +00:00
Anna Thomas 5526a33f4f [LoopUnrollRuntime] Avoid multi-exit nested loop with epilog generation
The loop structure for the outer loop does not contain the epilog
preheader when we try to unroll inner loop with multiple exits and
epilog code is generated. For now, we just bail out in such cases.
Added a test case that shows the problem. Without this bailout, we would
trip on assert saying LCSSA form is incorrect for outer loop.

llvm-svn: 307676
2017-07-11 17:16:33 +00:00
Krzysztof Parzyszek f67cd8259d [Hexagon] Do not rely on callee-saved info in hasFP
llvm-svn: 307675
2017-07-11 17:11:54 +00:00
Reid Kleckner ada8c398d0 [Support] - Add bad alloc error handler for handling allocation malfunctions
Summary:
Patch by Klaus Kretzschmar

We would like to introduce a new type of llvm error handler for handling
bad alloc fault situations.  LLVM already provides a fatal error handler
for serious non-recoverable error situations which by default writes
some error information to stderr and calls exit(1) at the end (functions
are marked as 'noreturn').

For long running processes (e.g. a server application), exiting the
process is not an acceptable option, especially not when the system is
in a temporary resource bottleneck with a good chance to recover from
this fault situation. In such a situation you would rather throw an
exception to stop the current compilation and try to overcome the
resource bottleneck. The user should be aware of the problem of throwing
an exception in bad alloc situations, e.g. you must not do any
allocations in the unwind chain. This is especially true when adding
exceptions in existing unfamiliar code (as already stated in the comment
of the current fatal error handler)

So the new handler can also be used to distinguish from general fatal
error situations where recovering is no option.  It should be used in
cases where a clean unwind after the allocation is guaranteed.

This patch contains:
- A report_bad_alloc function which calls a user defined bad alloc
  error handler. If no user handler is registered the
  report_fatal_error function is called. This function is not marked as
  'noreturn'.
- A install/restore_bad_alloc_error_handler to install/restore the bad
  alloc handler.
- An example (in Mutex.cpp) where the report_bad_alloc function is
  called in case of a malloc returns a nullptr.

If this patch gets accepted we would create similar patches to fix
corresponding malloc/calloc usages in the llvm code.

Reviewers: chandlerc, greened, baldrick, rnk

Reviewed By: rnk

Subscribers: llvm-commits, MatzeB

Differential Revision: https://reviews.llvm.org/D34753

llvm-svn: 307673
2017-07-11 16:45:30 +00:00
Tony Jiang d5acad053b [PPC] Fix two bugs in frame lowering.
1. The available program storage region of the red zone to compilers is 288
 bytes rather than 244 bytes.
2. The formula for negative number alignment calculation should be
y = x & ~(n-1) rather than y = (x + (n-1)) & ~(n-1).

Differential Revision: https://reviews.llvm.org/D34337

llvm-svn: 307672
2017-07-11 16:42:20 +00:00
Krzysztof Parzyszek c86e2ef3f5 [Hexagon] Add support for nontemporal loads and stores on HVX
Patch by Michael Wu.

Differential Revision: https://reviews.llvm.org/D35104

llvm-svn: 307671
2017-07-11 16:39:33 +00:00
Reid Kleckner f7d0d0fece [lit] Fix import StringIO errors in Python 3
Remove the cStringIO micro-optimization, as it isn't portable to Python
3.

llvm-svn: 307669
2017-07-11 16:12:53 +00:00
Reid Kleckner 14e1d55b0d [lit] Implement non-pipelined echo commands internally
Summary:
This speeds up the LLD test suite on Windows by 3x. Most of the time is
spent on lld/test/ELF/linkerscript/diagnostics.s, which repeatedly
constructs linker scripts with appending echo commands.

Reviewers: dlj, zturner, modocache

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35093

llvm-svn: 307668
2017-07-11 16:05:50 +00:00
Dinar Temirbulatov 09b6779709 [SLPVectorizer] Revert change in cancelScheduling with referencing to FirstInBundle, NFCI.
llvm-svn: 307667
2017-07-11 15:54:50 +00:00
Craig Topper 393ce69422 [IR] Remove unnecessary const_casts from ConstantDataSequential and it's subclasses.
llvm-svn: 307666
2017-07-11 15:52:21 +00:00
Hiroshi Inoue 4ba87d01bc fix formatting; NFC
llvm-svn: 307662
2017-07-11 15:41:31 +00:00
Daniel Sanders be9a2e2c84 [globalisel][tablegen] Change method of squashing unused variable warnings following post-commit comments.
llvm-svn: 307659
2017-07-11 14:23:14 +00:00
Jonas Paulsson 959de71249 [SystemZ] Minor fixing in SystemZScheduleZ13.td
Some minor corrections for the recently added instructions.

Review: Ulrich Weigand
llvm-svn: 307658
2017-07-11 14:07:55 +00:00
Diana Picus 1e33c9c166 [ARM] GlobalISel: Tighten G_FCMP selection test. NFC
Use CHECK-NEXT for the comparison sequence, to make sure we don't get
any unexpected instructions in the middle of our flag manipulation
efforts.

llvm-svn: 307656
2017-07-11 12:34:33 +00:00
George Rimar 0493e436ee [DWARF] - Add testcase for checking message about broken relocations.
Addresses comments for r306677, which fixed error message itself.

llvm-svn: 307655
2017-07-11 12:29:07 +00:00
Guy Blank 509d1b2a5a [X86][AVX512] regenerate avx512-insert-extract.ll
llvm-svn: 307654
2017-07-11 11:51:49 +00:00
Diana Picus 069da27f49 [ARM] GlobalISel: Add reg mapping for s64 G_FCMP
Map the result into GPR and the operands into FPR.

llvm-svn: 307653
2017-07-11 11:47:45 +00:00
Philip Pfaffe b4d500f1fb [PM] Another post-commit fix in NewPMDriver
There were two errors in the parsing of opt's command line options for
extension point pipelines. The EP callbacks are not supposed to return a
value. To check the pipeline text for correctness, I now try to parse it
into a temporary PM object, and print a message on failure. This solves
the compile time error for the lambda return type, as well as correctly
handles unparsable pipelines now.

llvm-svn: 307649
2017-07-11 11:17:44 +00:00
Diana Picus 84baba20db [ARM] GlobalISel: Tighten legalizer tests. NFC
Make sure that all the legalizer tests where the original instruction
needs to be removed check for the removal. We do this by adding
CHECK-NOT lines before and after the replacement sequence. This won't
catch pathological cases where the instruction remains somewhere in the
middle of the instruction sequence that's supposed to replace it, but
hopefully that won't occur in practice (since ideally we'd be setting
the insert point for the new instruction sequence either before or after
the original instruction and not fiddle with it while building the
sequence).

llvm-svn: 307647
2017-07-11 10:52:08 +00:00
Daniel Sanders 57938df813 [globalisel][tablegen] Fix an multi-insn match bug where ComplexPattern is used on multiple insns.
In each rule, each use of ComplexPattern is assigned an element in the Renderers
array. The matcher then collects renderer functions in this array and they are
used to render instructions. This works well for a single instruction but a
bug in the allocation mechanism causes the elements to be assigned on a
per-instruction basis rather than a per-rule basis.

So in the case of:
  (set GPR32:$dst, (Op complex:$src1, complex:$src2))
tablegen currently assigns elements 0 and 1 to $src1 and $src2 respectively,
but for:
  (set GPR32:$dst, (Op complex:$src1, (Op complex:$src2)))
it currently assigned both $src1 and $src2 the same element (0). This results in
one complex operand being rendered twice and the other being forgotten.
This patch corrects the allocation such that $src1 and $src2 are still allocated
different elements in this case.

llvm-svn: 307646
2017-07-11 10:40:18 +00:00
Peter Smith a2e5ecc1f3 [ARM] ldr pc,=expression should be allowed in Thumb2
This change allows the pc to be used as a destination register for the
pseudo instruction LDR pc,=expression . The pseudo instruction must not be
transformed into a MOV, but it can use the Thumb2 LDR (literal) instruction
to a constant pool entry. See (A7.7.43 from ARMv7M ARM ARM).

Differential Revision: https://reviews.llvm.org/D34751

llvm-svn: 307640
2017-07-11 09:47:12 +00:00
Diana Picus 443135c6eb [ARM] GlobalISel: Fix oversight in G_FCMP legalization
We used to forget to erase the original instruction when replacing a
G_FCMP true/false. Fix this bug and make sure the tests check for it.

llvm-svn: 307639
2017-07-11 09:43:51 +00:00
Daniel Sanders fe12c0fa56 [globalisel][tablegen] Correct matching of intrinsic ID's.
TreePatternNode considers them to be plain integers but MachineInstr considers
them to be a distinct kind of operand.

The tweak to AArch64InstrInfo.td to produce a simple test case is a NFC for
everything except GlobalISelEmitter (confirmed by diffing the tablegenerated
files). GlobalISelEmitter is currently unable to infer the type of operands in
the Dst pattern from the operands in the Src pattern.

llvm-svn: 307634
2017-07-11 08:57:29 +00:00
Diana Picus b57bba8316 [ARM] GlobalISel: Legalize s64 G_FCMP
Same as the s32 version, for both hard and soft float.

llvm-svn: 307633
2017-07-11 08:50:01 +00:00
Serguei Katkov 0e831c996c Revert Revert [MBP] do not rotate loop if it creates extra branch
This is a second attempt to land this patch.

The first one resulted in a crash of clang sanitizer buildbot.
The fix is here and regression test is added.

This is a last fix for the corner case of PR32214. Actually this is not really corner case in general.

We should not do a loop rotation if we create an additional branch due to it.
Consider the case where we have a loop chain H, M, B, C , where
H is header with viable fallthrough from pre-header and exit from the loop
M - some middle block
B - backedge to Header but with exit from the loop also.
C - some cold block of the loop.

Let's H is determined as a best exit. If we do a loop rotation M, B, C, H we can introduce the extra branch.
Let's compute the change in number of branches:
+1 branch from pre-header to header
-1 branch from header to exit
+1 branch from header to middle block if there is such
-1 branch from cold bock to header if there is one

So if C is not a predecessor of H then we introduce extra branch.

This change actually prohibits rotation of the loop if both true
  Best Exit has next element in chain as successor.
  Last element in chain is not a predecessor of first element of chain.

Reviewers: iteratee, xur, sammccall, chandlerc	
Reviewed By: iteratee
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34745

llvm-svn: 307631
2017-07-11 08:34:58 +00:00
Igor Breger 324d3791f8 [GlobalISel][X86] Use correct AND instructions.
AND8ri8 not supported in 64bit.

llvm-svn: 307630
2017-07-11 08:04:51 +00:00
Serguei Katkov 0b7b59ada3 [CGP] Relax a bit restriction for optimizeMemoryInst to extend scope
CodeGenPrepare::optimizeMemoryInst contains a check that we do nothing
if all instructions combining the address for memory instruction is in the same
block as memory instruction itself.

However if any of these instruction are placed after memory instruction then
address calculation will not be folded to memory instruction.

The added test case shows an example.

Reviewers: loladiro, spatel, efriedma
Reviewed By: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34862

llvm-svn: 307628
2017-07-11 06:24:44 +00:00
Hiroshi Inoue 0ca79dcf4b fix typos in comments; NFC
llvm-svn: 307626
2017-07-11 06:04:59 +00:00