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190 Commits

Author SHA1 Message Date
Chris Lattner 28a9c2f89a fix rdar://8407548, I missed the commuted form of xchg/test without a suffix. 
llvm-svn: 113427
 2010-09-08 22:27:05 +00:00
Chris Lattner 8ead237758 fix bugs in push/pop segment support, rdar://8407242 
llvm-svn: 113422
 2010-09-08 22:13:08 +00:00
Chris Lattner 2907d2e419 add support for the commuted form of the test instruction, rdar://8018260. 
llvm-svn: 113352
 2010-09-08 05:51:12 +00:00
Chris Lattner a9ca7837e4 implement proper support for sysret{,l,q}, rdar://8403907 
llvm-svn: 113350
 2010-09-08 05:45:34 +00:00
Chris Lattner 063363fa80 implement the iret suite of instructions properly, 
fixing rdar://8403974

llvm-svn: 113349
 2010-09-08 05:38:31 +00:00
Chris Lattner 086a83afb1 add support for instruction prefixes on the same line as the instruction, 
implementing rdar://8033482 and PR7254.

llvm-svn: 113348
 2010-09-08 05:17:37 +00:00
Chris Lattner 8caea68a4f gas accepts xchg <mem>, <reg> as a synonym for xchg <reg>, <mem>. 
Add this to the mc assembler, fixing PR8061

llvm-svn: 113346
 2010-09-08 04:53:27 +00:00
Chris Lattner 4703cb4a96 fix the encoding of the "jump on *cx" family of instructions, 
rdar://8061602

llvm-svn: 113343
 2010-09-08 04:30:51 +00:00
Chris Lattner 30bb384944 add missing cmov aliases, this resolves rdar://8208499 
llvm-svn: 113189
 2010-09-07 00:05:45 +00:00
Chris Lattner 7ece716da2 "sldt <mem>" is ambiguous in 64-bit mode, but should 
always be disambiguated as sldtw.  sldtw and sldtq with
a mem operands have the same effect, but sldtw is more
compact.  Force it to sldtw, resolving rdar://8017530

llvm-svn: 113186
 2010-09-06 23:51:44 +00:00
Chris Lattner 415e04fad2 fix rdar://8017621 - llvm-mc can't guess encoding for "push $(1000)" 
llvm-svn: 113184
 2010-09-06 23:40:56 +00:00
Chris Lattner 34e366b45c fix the operand constraints of the immediate form of in/out, 
allowing unsigned 8-bit operands.  This fixes rdar://8208481

llvm-svn: 113182
 2010-09-06 23:29:05 +00:00
Chris Lattner 112b6ee3f2 fixme accomplished 
llvm-svn: 112386
 2010-08-28 20:40:28 +00:00
Daniel Dunbar 3d148ac089 X86: Fix misencode of RI64mi8. This fixes OpenSSL / x86_64-apple-darwin10 / clang -O3. 
llvm-svn: 112089
 2010-08-25 21:11:02 +00:00
Daniel Dunbar 1c8d777c93 MC/X86: Tweak imul recognition, previous hack only applies for the imul form 
taking immediates.

llvm-svn: 111950
 2010-08-24 19:37:56 +00:00
Daniel Dunbar 09392785b4 MC/X86: Add custom hack for recognizing "imul $12, %eax" and friends. 
llvm-svn: 111947
 2010-08-24 19:24:18 +00:00
Daniel Dunbar 94b84a19b9 MC/X86: Warn on scale factors > 1 without index register, instead of erroring, 
for 'as' compatibility.

llvm-svn: 111945
 2010-08-24 19:13:38 +00:00
Chris Lattner f547740d3f fix PR7465, mishandling of lcall and ljmp: intersegment long 
call and jumps.

llvm-svn: 111496
 2010-08-19 01:18:43 +00:00
Daniel Dunbar 7d7b4d1b0f MC/X86/AsmParser: Give an explicit error message when we reject an instruction 
because it could have an ambiguous suffix.

llvm-svn: 110890
 2010-08-12 00:55:42 +00:00
Bruno Cardoso Lopes 306a1f9721 Support x86 "eiz" and "riz" pseudo index registers in the assembler. 
llvm-svn: 109295
 2010-07-24 00:06:39 +00:00
Bruno Cardoso Lopes 6f38011196 Move AVX encoding tests to different files 
llvm-svn: 109269
 2010-07-23 21:25:26 +00:00
Bruno Cardoso Lopes ea0e05a3ce Add AVX version of CLMUL instructions 
llvm-svn: 109248
 2010-07-23 18:41:12 +00:00
Bruno Cardoso Lopes acd9230b1b Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual 
llvm-svn: 109204
 2010-07-23 00:54:35 +00:00
Bruno Cardoso Lopes 0710c74f29 Add remaining AVX instructions (most of them dealing with GR64 destinations. This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step 
llvm-svn: 109168
 2010-07-22 21:18:49 +00:00
Bruno Cardoso Lopes e3acfd4d58 Add more 256-bit forms for a bunch of regular AVX instructions 
Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)

llvm-svn: 109063
 2010-07-21 23:53:50 +00:00
Bruno Cardoso Lopes 6238c1d102 Add missing AVX convert instructions. Those instructions are not described in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it 
llvm-svn: 109039
 2010-07-21 21:37:59 +00:00
Bruno Cardoso Lopes cdbec62510 Add AVX only vzeroall and vzeroupper instructions 
llvm-svn: 109002
 2010-07-21 08:56:24 +00:00
Bruno Cardoso Lopes 3499934da6 Add new AVX vpermilps, vpermilpd and vperm2f128 instructions 
llvm-svn: 108984
 2010-07-21 03:07:42 +00:00
Bruno Cardoso Lopes 3ceaf7a0a2 Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to support it 
llvm-svn: 108983
 2010-07-21 02:46:58 +00:00
Bruno Cardoso Lopes e706501975 Add new AVX vextractf128 instructions 
llvm-svn: 108964
 2010-07-20 23:19:02 +00:00
Bruno Cardoso Lopes 3b505848fd Add new AVX instruction vinsertf128 
llvm-svn: 108892
 2010-07-20 19:44:51 +00:00
Bruno Cardoso Lopes 6c8041ea34 x86_32 tests for vbroadcast 
llvm-svn: 108789
 2010-07-20 00:11:50 +00:00
Bruno Cardoso Lopes 14c5fd437c Add AVX vbroadcast new instruction 
llvm-svn: 108788
 2010-07-20 00:11:13 +00:00
Bruno Cardoso Lopes 9de0ca73d4 Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions! 
llvm-svn: 108769
 2010-07-19 23:32:44 +00:00
Daniel Dunbar 9db7d0addd X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the same 
instruction, we only want to allow the one for the current subtarget.
 - This also fixes suffix matching for jmp instructions, because it eliminates
   the ambiguity between 'jmpl' and 'jmpq'.

llvm-svn: 108746
 2010-07-19 20:44:16 +00:00
Daniel Dunbar 9aefb8ee4c X86-64: Mark WINCALL and more tail call instructions as code gen only. 
llvm-svn: 108685
 2010-07-19 07:21:07 +00:00
Daniel Dunbar b82cd9319b MC/X86: We now match instructions like "incl %eax" correctly for the arch we are 
assembling; remove crufty custom cleanup code.

llvm-svn: 108681
 2010-07-19 06:14:54 +00:00
Bruno Cardoso Lopes 6c6c14a55c Add AVX 256-bit compare instructions and a bunch of testcases 
llvm-svn: 108286
 2010-07-13 22:06:38 +00:00
Bruno Cardoso Lopes fd8bfcd6e1 AVX 256-bit conversion instructions 
Add the x86 VEX_L form to handle special cases where VEX_L must be set.

llvm-svn: 108274
 2010-07-13 21:07:28 +00:00
Bruno Cardoso Lopes dff283e146 Add AVX 256-bit packed logical forms 
llvm-svn: 108224
 2010-07-13 02:38:35 +00:00
Bruno Cardoso Lopes 36b32aeaa5 Add AVX 256-bit unop arithmetic instructions 
llvm-svn: 108223
 2010-07-13 01:53:31 +00:00
Bruno Cardoso Lopes 8e67a0482e Add AVX 256 binary arithmetic instructions 
llvm-svn: 108207
 2010-07-12 23:04:15 +00:00
Bruno Cardoso Lopes f9bcaad76d Add AVX 256-bit MOVMSK forms 
llvm-svn: 108184
 2010-07-12 20:06:32 +00:00
Bruno Cardoso Lopes 2419606bfb Add AVX 256-bit packed MOVNT variants 
llvm-svn: 108021
 2010-07-09 21:42:42 +00:00
Bruno Cardoso Lopes 6bc772eec7 Add AVX 256-bit unpack and interleave 
llvm-svn: 108017
 2010-07-09 21:20:35 +00:00
Bruno Cardoso Lopes 792e906bef Start the support for AVX instructions with 256-bit %ymm registers. A couple of 
notes:
- The instructions are being added with dummy placeholder patterns using some 256
  specifiers, this is not meant to work now, but since there are some multiclasses
  generic enough to accept them,  when we go for codegen, the stuff will be already
  there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
  file.

llvm-svn: 107996
 2010-07-09 18:27:43 +00:00
Chris Lattner 9f034c1e5d Rework segment prefix emission code to handle segments 
in memory operands at the same type as hard coded segments.
This fixes problems where we'd emit the segment override after
the REX prefix on instructions like:
mov %gs:(%rdi), %rax

This fixes rdar://8127102.  I have several cleanup patches coming
next.

llvm-svn: 107917
 2010-07-08 22:28:12 +00:00
Chris Lattner ac5881295c Implement the major chunk of PR7195: support for 'callw' 
in the integrated assembler.  Still some discussion to be
done.

llvm-svn: 107825
 2010-07-07 22:27:31 +00:00
Bruno Cardoso Lopes 6c61451011 Add more assembly opcodes for SSE compare instructions 
llvm-svn: 107823
 2010-07-07 22:24:03 +00:00
Bruno Cardoso Lopes fd8060335b Add AVX AES instructions 
llvm-svn: 107798
 2010-07-07 18:24:20 +00:00