Commit Graph

327287 Commits

Author SHA1 Message Date
Benjamin Kramer b88800d882 Clean out unused diagnostics. NFC.
llvm-svn: 372319
2019-09-19 13:35:27 +00:00
Michael Liao eb231d1582 [CUDA][HIP] Fix typo in `BestViableFunction`
Summary:
- Should consider viable ones only when checking SameSide candidates.
- Replace erasing with clearing viable flag to reduce data
  moving/copying.
- Add one and revise another one as the diagnostic message are more
  relevant compared to previous one.

Reviewers: tra

Subscribers: cfe-commits, yaxunl

Tags: #clang

Differential Revision: https://reviews.llvm.org/D67730

llvm-svn: 372318
2019-09-19 13:14:03 +00:00
Yitzhak Mandelbaum 57990b4be0 [clang-tidy] Fix bugprone-argument-comment-check to correctly ignore implicit constructors.
Summary:
After revision 370919, this check incorrectly flags certain cases of implicit
constructors. Specifically, if an argument is annotated with an
argument-comment and the argument expression triggers an implicit constructor,
then the argument comment is associated with argument of the implicit
constructor.

However, this only happens when the constructor has more than one argument.
This revision fixes the check for implicit constructors and adds a regression
test for this case.

Note: r370919 didn't cause this bug, it simply uncovered it by fixing another
bug that was masking the behavior.

Reviewers: gribozavr

Subscribers: xazax.hun, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D67744

llvm-svn: 372317
2019-09-19 13:12:05 +00:00
Simon Pilgrim c65dd89804 [DAG] Add SelectionDAG::MaxRecursionDepth constant
As commented on D67557 we have a lot of uses of depth checks all using magic numbers.

This patch adds the SelectionDAG::MaxRecursionDepth constant and moves over some general cases to use this explicitly.

Differential Revision: https://reviews.llvm.org/D67711

llvm-svn: 372315
2019-09-19 12:58:43 +00:00
Hans Wennborg 13bdae8541 Revert r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
This broke the Chromium build, causing it to fail with e.g.

  fatal error: error in backend: Cannot select: t362: v4i32 = X86ISD::VSHLI t392, Constant:i8<15>

See llvm-commits thread of r372285 for details.

This also reverts r372286, r372287, r372288, r372289, r372290, r372291,
r372292, r372293, r372296, and r372297, which seemed to depend on the
main commit.

> Encode them directly as an imm argument to G_INTRINSIC*.
>
> Since now intrinsics can now define what parameters are required to be
> immediates, avoid using registers for them. Intrinsics could
> potentially want a constant that isn't a legal register type. Also,
> since G_CONSTANT is subject to CSE and legalization, transforms could
> potentially obscure the value (and create extra work for the
> selector). The register bank of a G_CONSTANT is also meaningful, so
> this could throw off future folding and legalization logic for AMDGPU.
>
> This will be much more convenient to work with than needing to call
> getConstantVRegVal and checking if it may have failed for every
> constant intrinsic parameter. AMDGPU has quite a lot of intrinsics wth
> immarg operands, many of which need inspection during lowering. Having
> to find the value in a register is going to add a lot of boilerplate
> and waste compile time.
>
> SelectionDAG has always provided TargetConstant for constants which
> should not be legalized or materialized in a register. The distinction
> between Constant and TargetConstant was somewhat fuzzy, and there was
> no automatic way to force usage of TargetConstant for certain
> intrinsic parameters. They were both ultimately ConstantSDNode, and it
> was inconsistently used. It was quite easy to mis-select an
> instruction requiring an immediate. For SelectionDAG, start emitting
> TargetConstant for these arguments, and using timm to match them.
>
> Most of the work here is to cleanup target handling of constants. Some
> targets process intrinsics through intermediate custom nodes, which
> need to preserve TargetConstant usage to match the intrinsic
> expectation. Pattern inputs now need to distinguish whether a constant
> is merely compatible with an operand or whether it is mandatory.
>
> The GlobalISelEmitter needs to treat timm as a special case of a leaf
> node, simlar to MachineBasicBlock operands. This should also enable
> handling of patterns for some G_* instructions with immediates, like
> G_FENCE or G_EXTRACT.
>
> This does include a workaround for a crash in GlobalISelEmitter when
> ARM tries to uses "imm" in an output with a "timm" pattern source.

llvm-svn: 372314
2019-09-19 12:33:07 +00:00
David Green 0cfb78e52a [ARM] MVE i1 splat
We needn't BFI each lane individually into a predicate register when each lane
in the same. A simple sign extend and a vmsr will do.

Differential Revision: https://reviews.llvm.org/D67653

llvm-svn: 372313
2019-09-19 12:17:41 +00:00
Hans Wennborg ec841cf36c [cmake] Strip quotes in try_compile_only
After r372209, the compile command can end up including an argument with
quotes in it, e.g.

  -fprofile-instr-use="/foo/bar.profdata"

when invoking the compiler with execute_process, the compiler ends up
getting that argument with quotes and all, and fails to open the file.

This all seems horribly broken, but one way of working around it is to
simply strip the quotes from the string here. If they were there to
protect a path that's got spaces in it, that wasn't going to work
anyway because the string is later split by spaces.

llvm-svn: 372312
2019-09-19 11:28:32 +00:00
Owen Reynolds aa03c14827 Revert [llvm-ar] Include a line number when failing to parse an MRI script
Revert r372309 due to buildbot failures

Differential Revision: https://reviews.llvm.org/D67449

llvm-svn: 372311
2019-09-19 11:22:59 +00:00
Simon Pilgrim cce2342d46 Fix -Wdocumentation "@returns in a void function" warning. NFCI.
llvm-svn: 372310
2019-09-19 11:12:04 +00:00
Owen Reynolds 04398c729b [llvm-ar] Include a line number when failing to parse an MRI script
Errors that occur when reading an MRI script now include a corresponding
line number.

Differential Revision: https://reviews.llvm.org/D67449

llvm-svn: 372309
2019-09-19 10:51:43 +00:00
Simon Pilgrim da89495a3e Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFCI.
llvm-svn: 372308
2019-09-19 10:47:12 +00:00
Mark Murray 8a12e40185 [TestCommit] Trivial change to test commit access.
llvm-svn: 372307
2019-09-19 09:24:42 +00:00
Mark Murray 5e7c76aa38 [TestCommit] Trivial change to test commit access.
llvm-svn: 372306
2019-09-19 09:02:12 +00:00
Serguei Katkov a44768858c [Unroll] Add an option to control complete unrolling
Add an ability to specify the max full unroll count for LoopUnrollPass pass
in pass options.

Reviewers: fhahn, fedor.sergeev
Reviewed By: fedor.sergeev
Subscribers: hiraditya, zzheng, dmgreen, llvm-commits
Differential Revision: https://reviews.llvm.org/D67701

llvm-svn: 372305
2019-09-19 06:57:29 +00:00
Craig Topper c2d25ed1b3 [X86] Prevent crash in LowerBUILD_VECTORvXi1 for v64i1 vectors on 32-bit targets when the vector is a mix of constants and non-constant.
We need to materialize the constants as two 32-bit values that
are casted to v32i1 and then concatenated.

llvm-svn: 372304
2019-09-19 06:50:39 +00:00
Sam Parker 56aa691c41 [ARM] Fix for buildbots
I had missed that massive.mir also needed updating.

llvm-svn: 372303
2019-09-19 06:50:19 +00:00
Craig Topper d103bb654f [X86] Change a SmallVector& argument to SmallVectorImpl&. NFC
Avoids repeating the size.

llvm-svn: 372302
2019-09-19 06:27:12 +00:00
Craig Topper eff4fd6999 [X86] Remove unused argument from a helper function. NFC
llvm-svn: 372301
2019-09-19 06:27:07 +00:00
Michal Gorny c36b0bf310 [lldb] [Process/gdb-remote] Correct more missing LLDB_INVALID_SIGNAL_NUMBER
Correct more uses of 0 instead of LLDB_INVALID_SIGNAL_NUMBER.

Differential Revision: https://reviews.llvm.org/D67727

llvm-svn: 372300
2019-09-19 05:49:14 +00:00
Fangrui Song 84dc688bc7 [Builtins] Delete setjmp_syscall and qsetjmp
Similar to the resolution of gcc PR71876.
Nobody uses them or needs the [-Wincomplete-setjmp-declaration]
diagnostic.

llvm-svn: 372299
2019-09-19 04:41:38 +00:00
Tom Stellard 9f4c7571a1 AMDGPU/SILoadStoreOptimizer: Add const to more functions
Reviewers: arsenm, pendingchaos, rampitec, nhaehnle, vpykhtin

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65901

llvm-svn: 372298
2019-09-19 04:39:45 +00:00
Matt Arsenault bffbeecb44 AMDGPU/GlobalISel: RegBankSelect llvm.amdgcn.ds.swizzle
llvm-svn: 372297
2019-09-19 04:11:17 +00:00
Matt Arsenault 4f663a6367 AMDGPU/GlobalISel: RegBankSelect tbuffer load/store
These have the same operand structure as the non-t buffer operations.

llvm-svn: 372296
2019-09-19 04:11:12 +00:00
Yonghong Song c15aa241f8 [CLANG][BPF] change __builtin_preserve_access_index() signature
The clang intrinsic __builtin_preserve_access_index() currently
has signature:
  const void * __builtin_preserve_access_index(const void * ptr)

This may cause compiler warning when:
  - parameter type is "volatile void *" or "const volatile void *", or
  - the assign-to type of the intrinsic does not have "const" qualifier.
Further, this signature does not allow dereference of the
builtin result pointer as it is a "const void *" type, which
adds extra step for the user to do type casting.

Let us change the signature to:
  PointerT __builtin_preserve_access_index(PointerT ptr)
such that the result and argument types are the same.
With this, directly dereferencing the builtin return value
becomes possible.

Differential Revision: https://reviews.llvm.org/D67734

llvm-svn: 372294
2019-09-19 02:59:43 +00:00
Matt Arsenault 494243597b AMDGPU/GlobalISel: Select llvm.amdgcn.raw.buffer.store.format
This needs special handling due to some subtargets that have a
nonstandard register layout for f16 vectors

Also reject some illegal types on other targets.

llvm-svn: 372293
2019-09-19 02:35:08 +00:00
Matt Arsenault 67f1f6ff8c AMDGPU/GlobalISel: Select llvm.amdgcn.raw.buffer.store
llvm-svn: 372292
2019-09-19 02:30:27 +00:00
Matt Arsenault 838ff36553 AMDGPU/GlobalISel: RegBankSelect struct buffer load/store
llvm-svn: 372291
2019-09-19 02:26:53 +00:00
Matt Arsenault a62ef58346 AMDGPU/GlobalISel: RegBankSelect llvm.amdgcn.raw.buffer.{load|store}
llvm-svn: 372290
2019-09-19 02:25:09 +00:00
Matt Arsenault a30d022db6 AMDGPU/GlobalISel: Attempt to RegBankSelect image intrinsics
Images should always have 2 consecutive, mandatory SGPR arguments.

llvm-svn: 372289
2019-09-19 02:23:06 +00:00
Matt Arsenault 01213407c4 Fix typo
llvm-svn: 372288
2019-09-19 02:15:29 +00:00
Matt Arsenault c189f023ac MachineScheduler: Fix assert from not checking subregs
The assert would fail if there was a dead def of a subregister if
there was a previous use of a different subregister.

llvm-svn: 372287
2019-09-19 02:14:12 +00:00
Matt Arsenault 22e2c09515 AMDGPU/GlobalISel: Fix RegBankSelect G_SMULH/G_UMULH pre-gfx9
The scalar versions were only introduced in gfx9.

llvm-svn: 372286
2019-09-19 01:42:34 +00:00
Matt Arsenault d8399d12cd GlobalISel: Don't materialize immarg arguments to intrinsics
Encode them directly as an imm argument to G_INTRINSIC*.

Since now intrinsics can now define what parameters are required to be
immediates, avoid using registers for them. Intrinsics could
potentially want a constant that isn't a legal register type. Also,
since G_CONSTANT is subject to CSE and legalization, transforms could
potentially obscure the value (and create extra work for the
selector). The register bank of a G_CONSTANT is also meaningful, so
this could throw off future folding and legalization logic for AMDGPU.

This will be much more convenient to work with than needing to call
getConstantVRegVal and checking if it may have failed for every
constant intrinsic parameter. AMDGPU has quite a lot of intrinsics wth
immarg operands, many of which need inspection during lowering. Having
to find the value in a register is going to add a lot of boilerplate
and waste compile time.

SelectionDAG has always provided TargetConstant for constants which
should not be legalized or materialized in a register. The distinction
between Constant and TargetConstant was somewhat fuzzy, and there was
no automatic way to force usage of TargetConstant for certain
intrinsic parameters. They were both ultimately ConstantSDNode, and it
was inconsistently used. It was quite easy to mis-select an
instruction requiring an immediate. For SelectionDAG, start emitting
TargetConstant for these arguments, and using timm to match them.

Most of the work here is to cleanup target handling of constants. Some
targets process intrinsics through intermediate custom nodes, which
need to preserve TargetConstant usage to match the intrinsic
expectation. Pattern inputs now need to distinguish whether a constant
is merely compatible with an operand or whether it is mandatory.

The GlobalISelEmitter needs to treat timm as a special case of a leaf
node, simlar to MachineBasicBlock operands. This should also enable
handling of patterns for some G_* instructions with immediates, like
G_FENCE or G_EXTRACT.

This does include a workaround for a crash in GlobalISelEmitter when
ARM tries to uses "imm" in an output with a "timm" pattern source.

llvm-svn: 372285
2019-09-19 01:33:14 +00:00
Thomas Lively 21143b93a6 [WebAssembly] Sort output data sections to place .bss last
Summary:
This was always the intended behavior, but had not been
implemented. This ordering is important for Emscripten when generating
.mem files while compiling to JS, since only zeros at the end of
initialized memory can be dropped.

Fixes https://github.com/emscripten-core/emscripten/issues/8999

Reviewers: sbc100

Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67736

llvm-svn: 372284
2019-09-19 01:14:59 +00:00
GN Sync Bot 98a57332ef gn build: Merge r372282
llvm-svn: 372283
2019-09-19 01:03:39 +00:00
David Blaikie 798fe477e3 llvm-reduce: Add pass to reduce instructions
Patch by Diego Treviño!

Differential Revision: https://reviews.llvm.org/D66263

llvm-svn: 372282
2019-09-19 00:59:27 +00:00
Serge Guelton e93aded7f0 Initialize all fields in ABIArgInfo.
Due to usage of an uninitialized fields, we end up with
a Conditional jump or move depends on uninitialised value

Fixes https://bugs.llvm.org/show_bug.cgi?id=40547

Commited on behalf of Martin Liska <mliska@suse.cz>

llvm-svn: 372281
2019-09-19 00:54:40 +00:00
David Blaikie fa7f168a37 llvm-reduce: Avoid use-after-free when removing a branch instruction
Found my msan buildbot & pointed out by Nico Weber - thanks Nico!

llvm-svn: 372280
2019-09-19 00:35:32 +00:00
Alexander Shaposhnikov 4fd11c1e45 [Object] Extend MachOUniversalBinary::getObjectForArch
Make the method MachOUniversalBinary::getObjectForArch return MachOUniversalBinary::ObjectForArch
and add helper methods MachOUniversalBinary::getMachOObjectForArch, MachOUniversalBinary::getArchiveForArch
for those who explicitly expect to get a MachOObjectFile or an Archive.

Differential revision: https://reviews.llvm.org/D67700

Test plan: make check-all

llvm-svn: 372278
2019-09-19 00:02:12 +00:00
Roman Tereshin 84c368e2e2 [utils] Add minimal support for MIR inputs to update_llc_test_checks.py
update_{llc,mir}_test_checks.py applicability is determined by the
output (assembly or MIR), not the input, which makes
update_llc_test_checks.py the right tool to generate tests that start at
MIR and stop at the final assembly.

This commit adds the minimal support for this path. Main limitation that
remains:

- MIR has to have LLVM IR section, and the CHECK lines will be inserted
  into the LLVM IR functions that correspond to the MIR functions.

Running
  ../utils/update_llc_test_checks.py --llc-binary ./bin/llc
on a slightly modified  ../test/CodeGen/X86/bad-tls-fold.mir

produces the following diff:

+# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+# RUN: llc %s -o - | FileCheck %s
 --- |
   target triple = "x86_64-unknown-linux-gnu"

@@ -6,17 +7,31 @@
   @i = external thread_local global i32

   define i32 @or() {
+  ; CHECK-LABEL: or:
+  ; CHECK:       # %bb.0: # %entry
+  ; CHECK-NEXT:    movq {{.*}}(%rip), %rax
+  ; CHECK-NEXT:    orq $7, %rax
+  ; CHECK-NEXT:    movq i@{{.*}}(%rip), %rcx
+  ; CHECK-NEXT:    orq %rax, %rcx
+  ; CHECK-NEXT:    movl %fs:(%rcx), %eax
+  ; CHECK-NEXT:    retq
   entry:
     ret i32 undef
   }
-
   define i32 @and() {
+  ; CHECK-LABEL: and:
+  ; CHECK:       # %bb.0: # %entry
+  ; CHECK-NEXT:    movq {{.*}}(%rip), %rax
+  ; CHECK-NEXT:    orq $7, %rax
+  ; CHECK-NEXT:    movq i@{{.*}}(%rip), %rcx
+  ; CHECK-NEXT:    andq %rax, %rcx
+  ; CHECK-NEXT:    movl %fs:(%rcx), %eax
+  ; CHECK-NEXT:    retq
   entry:
     ret i32 undef
   }
 ...

(not applied)

llvm-svn: 372277
2019-09-18 23:44:17 +00:00
Roman Tereshin 73778e9878 [utils] Amend update_llc_test_checks.py to non-llc tooling, NFC
Very minor change aiming to make it easier to extend the script
downstream to support non-llc, but llc-like tools. The main objective is
to decrease the probability of merge conflicts.

llvm-svn: 372276
2019-09-18 23:44:16 +00:00
Thomas Lively dbcd7f5602 [WebAssembly] Restore defaults for stores per memop
Summary:
Large slowdowns were observed in Rust due to many small, constant
sized copies in conjunction with poorly-optimized memory.copy
implementations. Since memory.copy cannot be expected to be inlined
efficiently by engines at this time, stop using it for the smallest
copies. We continue to lower all memcpy intrinsics to memory.copy,
though.

Reviewers: aheejin, alexcrichton

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, JDevlieghere, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67639

llvm-svn: 372275
2019-09-18 23:18:16 +00:00
DeForest Richards 8535ba6fa0 [Docs] Moves topics to new categories
This commit moves several topics to new categories. It also removes a few duplicate links in Subsystem Documentation.

llvm-svn: 372274
2019-09-18 23:04:31 +00:00
Jessica Paquette ce65ebc39e [AArch64][GlobalISel] Support lowering musttail calls
Since we now lower most tail calls, it makes sense to support musttail.

Instead of always falling back to SelectionDAG, only fall back when a musttail
call was not able to be emitted as a tail call. Once we can handle most
incoming and outgoing arguments, we can change this to a `report_fatal_error`
like in ISelLowering.

Remove the assert that we don't have varargs and a musttail, and replace it
with a return false. Implementing this requires that we implement
`saveVarArgRegisters` from AArch64ISelLowering, which is an entirely different
patch.

Add GlobalISel lines to vararg-tallcall.ll to make sure that we produce correct
code. Right now we only fall back, but eventually this will be relevant.

Differential Revision: https://reviews.llvm.org/D67681

llvm-svn: 372273
2019-09-18 22:42:25 +00:00
Adrian Prantl 0779dffbd4 Remove the obsolete BlockByRefStruct flag from LLVM IR
DIFlagBlockByRefStruct is an unused DIFlag that originally was used by
clang to express (Objective-)C block captures in debug info. For the
last year Clang has been emitting complex DIExpressions to describe
block captures instead, which makes all the code supporting this flag
redundant.

This patch removes the flag and all supporting "dead" code, so we can
reuse the bit for something else in the future.

Since this only affects debug info generated by Clang with the block
extension this mostly affects Apple platforms and I don't have any
bitcode compatibility concerns for removing this. The Verifier will
reject debug info that uses the bit and thus degrade gracefully when
LTO'ing older bitcode with a newer compiler.

rdar://problem/44304813

Differential Revision: https://reviews.llvm.org/D67453

llvm-svn: 372272
2019-09-18 22:38:56 +00:00
David Blaikie 69a9235202 llvm-reduce: Remove inaccurate doxy comment about a return that isn't returned
Addressing post-commit code review feedback from Dávid Bolvanský -
thanks!

llvm-svn: 372271
2019-09-18 22:38:05 +00:00
David Blaikie c4da7eeccd llvm-reduce: Fix inconsistencies between int/unsigned usage (standardize on int)
llvm-svn: 372270
2019-09-18 22:30:25 +00:00
Kristof Umann b8ac93c73b [analyzer] PR43102: Fix an assertion and an out-of-bounds error for diagnostic location construction
Summary:
https://bugs.llvm.org/show_bug.cgi?id=43102

In today's edition of "Is this any better now that it isn't crashing?", I'd like to show you a very interesting test case with loop widening.

Looking at the included test case, it's immediately obvious that this is not only a false positive, but also a very bad bug report in general. We can see how the analyzer mistakenly invalidated `b`, instead of its pointee, resulting in it reporting a null pointer dereference error. Not only that, the point at which this change of value is noted at is at the loop, rather then at the method call.

It turns out that `FindLastStoreVisitor` works correctly, rather the supplied explodedgraph is faulty, because `BlockEdge` really is the `ProgramPoint` where this happens.
{F9855739}
So it's fair to say that this needs improving on multiple fronts. In any case, at least the crash is gone.

Full ExplodedGraph: {F9855743}

Reviewers: NoQ, xazax.hun, baloghadamsoftware, Charusso, dcoughlin, rnkovacs, TWeaver

Subscribers: JesperAntonsson, uabelho, Ka-Ka, bjope, whisperity, szepet, a.sidorin, mikhail.ramalho, donat.nagy, dkrupp, gamesh411, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D66716

llvm-svn: 372269
2019-09-18 22:24:26 +00:00
GN Sync Bot bdad30a8b8 gn build: Merge r372267
llvm-svn: 372268
2019-09-18 22:21:52 +00:00
Amy Huang 68eae49859 Add AutoUpgrade function to add new address space datalayout string to existing datalayouts.
Summary:
Add function to AutoUpgrade to change the datalayout of old X86 datalayout strings.
This adds "-p270:32:32-p271:32:32-p272:64:64" to X86 datalayouts that are otherwise valid
and don't already contain it.

This also removes the compatibility changes in https://reviews.llvm.org/D66843.
Datalayout change in https://reviews.llvm.org/D64931.

Reviewers: rnk, echristo

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67631

llvm-svn: 372267
2019-09-18 22:15:58 +00:00