Commit Graph

355667 Commits

Author SHA1 Message Date
Matt Arsenault 0da4353938 AMDGPU: Add baseline test for ptrmask infer address space 2020-05-28 10:04:02 -04:00
Frederik Gossen 6594d54571 [MLIR] Add `index_to_size` and `size_to_index` to the shape dialect
Add the two conversion operations `index_to_size` and `size_to_index` to the
shape dialect.
This facilitates the conversion of index types between the shape and the
standard dialect.

Differential Revision: https://reviews.llvm.org/D80280
2020-05-28 13:57:20 +00:00
Alexander Belyaev c3098e4f40 [MLIR] Add TensorFromElementsOp to Standard ops.
Differential Revision: https://reviews.llvm.org/D80705
2020-05-28 15:48:10 +02:00
Frederik Gossen dd484baffd [MLIR] Tidy up documentation for `Shape_JoinOp`, `Shape_ReduceOp`, and
`Shape_ConstSizeOp`

Fix places that refer to `shape.type` instead of `shape.shape`.

Differential Revision: https://reviews.llvm.org/D80278
2020-05-28 13:42:19 +00:00
Simon Pilgrim f6417f5db8 FileOutputBuffer.h - remove unused includes. NFC.
Move dependent includes down to source files where necessary.
2020-05-28 14:38:12 +01:00
Simon Pilgrim 1a945757ac WithColor.h - reduce unnecessary includes to forward declarations. NFC. 2020-05-28 14:38:11 +01:00
Frederik Gossen e73bb4fba7 [MLIR] Move `ConcatOp` to its lexicographic position
Purely cosmetic change.
The operation implementations in `Shape.cpp` are now lexicographic order.

Differential Revision: https://reviews.llvm.org/D80277
2020-05-28 13:37:22 +00:00
Simon Pilgrim 1ddac9563d [X86][SSE] Peek though MOVMSK source sign bits using SimplifyMultipleUseDemandedBits
Allows SimplifyDemandedBitsForTargetNode to peek through multi-use ops where MOVMSK only demands the signbit of each vector element.
2020-05-28 13:42:24 +01:00
Alok Kumar Sharma 7716681cfd Fixed bot failure after d20bf5a725
There was a failure on windows bit due to format mismatch on
different(Hex and Decimal) platforms even if meaning of output is same.

For example on X86 linux =>
DW_OP_plus_uconst 0x70, DW_OP_deref, DW_OP_lit4, DW_OP_mul
              ^
on X86 Windows-gnu =>
DW_AT_location (DW_OP_fbreg +112, DW_OP_deref, DW_OP_lit4, DW_OP_mul)

: error: CHECK-SAME: expected string not found in input
; CHECK-SAME: DW_OP_plus_uconst 0x70, DW_OP_deref, DW_OP_lit4, DW_OP_mul
              ^
<stdin>:28:17: note: scanning from here
 DW_AT_location (DW_OP_fbreg +112, DW_OP_deref, DW_OP_lit4, DW_OP_mul)
                ^
<stdin>:28:18: note: possible intended match here
 DW_AT_location (DW_OP_fbreg +112, DW_OP_deref, DW_OP_lit4, DW_OP_mul)

Now the test is limited to x86 using REQUIRED and -mtriple.

http://45.33.8.238/win/16214/step_11.txt
2020-05-28 18:01:38 +05:30
Dmitry Preobrazhensky f47e27e260 [AMDGPU][MC][GFX908] Corrected src0 of v_accvgpr_write to accept only VGPRs and inline constants.
This change disables use of special SGPR registers like scc, vccz, execz, etc as operands of v_accvgpr_write.

See bug 45414: https://bugs.llvm.org/show_bug.cgi?id=45414

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D80530
2020-05-28 15:10:55 +03:00
Simon Pilgrim 73ae678363 Fix MSVC signed/unsigned comparison warnings. NFC. 2020-05-28 13:07:06 +01:00
Simon Pilgrim ab5abce23c DWARFDebugMacro.h - remove unnecessary WithColor.h include. NFC. 2020-05-28 13:03:18 +01:00
Simon Pilgrim 84be4278e7 llvm-dwarfdump.h - remove unnecessary WithColor.h include. NFC. 2020-05-28 13:03:18 +01:00
Nemanja Ivanovic f9e94eb868 [Clang] Enable _Complex __float128
When I added __float128 a while ago, I neglected to add support for the complex
variant of the type. This patch just adds that.

Differential revision: https://reviews.llvm.org/D80533
2020-05-28 06:55:49 -05:00
Dmitry Preobrazhensky 45251ef534 [AMDGPU][MC] Corrected v_writelane_b32 to fix a decoding bug
Corrected vdst_in to match vdst operand type.
See bug 45193: https://bugs.llvm.org/show_bug.cgi?id=45193

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D80636
2020-05-28 14:43:49 +03:00
Sam McCall a56141b8f9 [clangd] Highlight related control flow.
Summary:
This means e.g. highlighting "return" will show other returns/throws
from the same function, highlighting a case will show all the
return/breaks etc.

This is a bit of an abuse of textDocument/highlight, but seems useful.

Reviewers: adamcz

Subscribers: ilya-biryukov, MaskRay, jkorous, mgrang, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78454
2020-05-28 13:25:11 +02:00
Dmitry Preobrazhensky bab5dadfcd [AMDGPU][MC][DISASSEMBLER] Corrected decoder to consume each code fragment only once
Summary: disabled disassembly of successfully decoded fragments of code.

See detailed bug description: https://bugs.llvm.org/show_bug.cgi?id=46101

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D80637
2020-05-28 14:20:18 +03:00
Valeriy Savchenko bd06c417e6 [analyzer] Allow bindings of the CompoundLiteralRegion
Summary:
CompoundLiteralRegions have been properly modeled before, but
'getBindingForElement` was not changed to accommodate this change
properly.

rdar://problem/46144644

Differential Revision: https://reviews.llvm.org/D78990
2020-05-28 14:11:57 +03:00
Georgii Rymar ad07d5f394 [yaml2obj] - Implement the "SectionHeaderTable" tag.
With the "SectionHeaderTable" it is now possible to reorder
entries in the section header table.

It also allows to stop emitting the table.

Differential revision: https://reviews.llvm.org/D80002
2020-05-28 13:42:43 +03:00
Sam McCall d283fc4f9d [DebugInfo] Use SplitTemplateClosers (foo<bar<baz> >) in DWARF too
Summary:
D76801 caused some regressions in debuginfo compatibility by changing how
certain functions were named.

For CodeView we try to mirror MSVC exactly: this was fixed in a549c0d004
For DWARF the situation is murkier. Per David Blaikie:
> In general DWARF doesn't specify this at all.
> [...]
> This isn't the only naming divergence between GCC and Clang

Nevertheless, including the space seems to provide better compatibility with
GCC and GDB. E.g. cpexprs.cc in the GDB testsuite requires this formatting.
And there was no particular desire to change the printing of names in debug
info in the first place (just in diagnostics and other more user-facing text).

Fixes PR46052

Reviewers: dblaikie, labath

Subscribers: aprantl, cfe-commits, dyung

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80554
2020-05-28 12:30:38 +02:00
Florian Hahn ab95ac0132 [AArch64] Precommit new fp extraction/insertion test. 2020-05-28 11:13:47 +01:00
Alok Kumar Sharma a0d847c6cd Fixed bot failure after d20bf5a725
There were some bot failures due unused funtion `rotateSign`
left in code.

http://lab.llvm.org:8011/builders/clang-ppc64le-rhel/builds/3731

error: unused function 'rotateSign' [-Werror,-Wunused-function]
static uint64_t rotateSign(int64_t I)
2020-05-28 15:42:04 +05:30
Cullen Rhodes 8a397b66b2 [AArch64][SVE] Add support for spilling/filling ZPR2/3/4
Summary:
This patch enables the register allocator to spill/fill lists of 2, 3
and 4 SVE vectors registers to/from the stack. This is implemented with
pseudo instructions that get expanded to individual LDR_ZXI/STR_ZXI
instructions in AArch64ExpandPseudoInsts.

Patch by Sander de Smalen.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D75988
2020-05-28 10:02:57 +00:00
Victor Campos c010d4d195 [ARM] Improve codegen of volatile load/store of i64
Summary:
Instead of generating two i32 instructions for each load or store of a volatile
i64 value (two LDRs or STRs), now emit LDRD/STRD.

These improvements cover architectures implementing ARMv5TE or Thumb-2.

The code generation explicitly deviates from using the register-offset
variant of LDRD/STRD. In this variant, the register allocated to the
register-offset cannot be reused in any of the remaining operands. Such
restriction seems to be non-trivial to implement in LLVM, thus it is
left as a to-do.

Differential Revision: https://reviews.llvm.org/D70072
2020-05-28 10:52:43 +01:00
Thomas Preud'homme 23ac16cf9b FileCheck [10/12]: Add support for signed numeric values
Summary:
This patch is part of a patch series to add support for FileCheck
numeric expressions. This specific patch adds support signed numeric
values, thus allowing negative numeric values.

As such, the patch adds a new class to represent a signed or unsigned
value and add the logic for type promotion and type conversion in
numeric expression mixing signed and unsigned values. It also adds
the %d format specifier to represent signed value.

Finally, it also adds underflow and overflow detection when performing a
binary operation.

Copyright:
    - Linaro (changes up to diff 183612 of revision D55940)
    - GraphCore (changes in later versions of revision D55940 and
                 in new revision created off D55940)

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson

Reviewed By: jhenderson, arichardson

Subscribers: MaskRay, hiraditya, llvm-commits, probinson, dblaikie, grimar, arichardson, kristina, hfinkel, rogfer01, JonChesterfield

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60390
2020-05-28 10:44:21 +01:00
Cullen Rhodes e533a176b3 [TableGen] Fix non-standard escape warnings for braces in InstAlias
Summary:
TableGen interprets braces ('{}') in the asm string of instruction aliases as
variants but when defining aliases with literal braces they have to be escaped
to prevent them being removed.

Braces are escaped with '\\', for example:

  def FooBraces : InstAlias<"foo \\{$imm\\}", (foo IntOperand:$imm)>;

Although when TableGen is emitting the assembly writer (-gen-asm-writer)
the AsmString that gets emitted is:

  AsmString = "foo \{$\x01\}";

In c/c++ braces don't need to be escaped which causes compilation
warnings:

  warning: use of non-standard escape character '\{' [-Wpedantic]

This patch fixes the issue by unescaping the flattened alias asm string
in the asm writer, by replacing '\{\}' with '{}'.

Reviewed By: hfinkel

Differential Revision: https://reviews.llvm.org/D79991
2020-05-28 09:36:24 +00:00
Marco Elver 69935d86ae [Clang][Sanitizers] Expect test failure on {arm,thumb}v7
Summary:
Versions of LLVM built on {arm,thumb}v7 appear to have differently
configured pass managers, which causes restrictions on which sanitizers
we may use.

As such, expect failure of the recently added "sanitize-coverage.c" test
on these architectures until we can investigate armv7's restrictions.

Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=46117

Reviewers: vitalybuka, glider

Reviewed By: glider

Subscribers: glider, kristof.beyls, danielkiss, cfe-commits, vvereschaka

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80668
2020-05-28 11:33:32 +02:00
Dmitry Vyukov 0969541ffc tsan: disable java_finalizer2 test on darwin
pthread_barrier_t is not supported on darwin.
Do what other tests that use pthread_barrier_t do.
2020-05-28 11:03:02 +02:00
Sander de Smalen ec0b66c318 [CodeGen] Specify meaning of ISD opcodes for scalable vectors
This patch contains changes to the description of EXTRACT_SUBVECTOR,
INSERT_SUBVECTOR, INSERT_VECTOR_ELT, EXTRACT_VECTOR_ELT and
CONCAT_VECTORS to specify their behaviour for scalable vectors.

For EXTRACT_SUBVECTOR it specifies that the IDX is scaled by the
same runtime scaling as the extracted (or inserted) vector. This
definition is the most natural extension to EXTRACT_SUBVECTOR for
scalable vectors, as most use-cases that work on fixed-width types
will have the same meaning for scalable types. For legalization for
example, it is common to split the vector operation to operate on
the LO and HI halfs of a vector.

For a fixed width vector <16 x i8> this would be expressed with:

  v16i8 %res = EXTRACT_SUBVECTOR v32i8 %v, i32 16

For a scalable vector, this would similarly be expressed as:

  nxv16i8 %res = EXTRACT_SUBVECTOR nxv32i8 %V, i32 16

By extending the meaning of IDX for scalable vectors, most existing
optimisations on EXTRACT/INSERT_SUBVECTOR work for scalable vectors
without any changes. This definition also allows extracting a
fixed-width subvector from a scalable vector, which is useful to
e.g. extract the low N lanes of a scalable vector.

This patch is not NFC because it sets the meaning of these nodes
for scalable vectors, which future patches will build upon.

Reviewers: efriedma, ctetreau, rogfer01, craig.topper

Reviewed By: efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79806
2020-05-28 09:29:15 +01:00
Alok Kumar Sharma d20bf5a725 [DebugInfo] Upgrade DISubrange to support Fortran dynamic arrays
This patch upgrades DISubrange to support fortran requirements.

Summary:
Below are the updates/addition of fields.
lowerBound - Now accepts signed integer or DIVariable or DIExpression,
earlier it accepted only signed integer.
upperBound - This field is now added and accepts signed interger or
DIVariable or DIExpression.
stride - This field is now added and accepts signed interger or
DIVariable or DIExpression.
This is required to describe bounds of array which are known at runtime.

Testing:
unit test cases added (hand-written)
check clang
check llvm
check debug-info

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D80197
2020-05-28 13:46:41 +05:30
Mehdi Amini 213c6cdf2e Harden MLIR detection of misconfiguration when missing dialect registration
This changes will catch error where C++ op are used without being
registered, either through creation with the OpBuilder or when trying to
cast to the C++ op.

Differential Revision: https://reviews.llvm.org/D80651
2020-05-28 08:14:49 +00:00
LLVM GN Syncbot 4b94cee650 [gn build] Port 5921782f74 2020-05-28 08:08:39 +00:00
Kazushi (Jam) Marukawa 5921782f74 [VE] Implements minimum MC layer for VE (3/4)
Summary:
Define ELF binary code for VE and modify code where should use this new code.

Depends on D79544.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D79545
2020-05-28 10:07:48 +02:00
Sjoerd Meijer 880c35a554 [HardwareLoops] LangRef Intrinsic descriptions
The HardwareLoop intrinsics were missing and not described in LangRef. This
adds these descriptions/definitions.

Differential Revision: https://reviews.llvm.org/D80316
2020-05-28 08:36:04 +01:00
Balázs Kéri 9081fa2099 [Analyzer][StreamChecker] Added check for "indeterminate file position".
Summary:
According to the standard, after a `wread` or `fwrite` call the file position
becomes "indeterminate". It is assumable that a next read or write causes
undefined behavior, so a (fatal error) warning is added for this case.
The indeterminate position can be cleared by some operations, for example
`fseek` or `freopen`, not with `clearerr`.

Reviewers: Szelethus, baloghadamsoftware, martong, NoQ, xazax.hun, dcoughlin

Reviewed By: Szelethus

Subscribers: rnkovacs, NoQ, xazax.hun, baloghadamsoftware, szepet, a.sidorin, mikhail.ramalho, Szelethus, donat.nagy, dkrupp, gamesh411, Charusso, martong, ASDenysPetrov, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80018
2020-05-28 08:21:57 +02:00
Kazu Hirata c4990a03c6 [JumpThreading] Use emplace_back instead of push_back (NFC)
Summary: This patch replaces push_back with emplace_back where appropriate.

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80688
2020-05-27 22:31:23 -07:00
Shengchen Kan 4954449995 [Driver][X86] Support branch align options with LTO
Summary: Before this patch, we use two different ways to pass options to align branch
depending on whether LTO is enabled. For example, `-mbranches-within-32B-boundaries`
w/o LTO and `-Wl,-plugin-opt=-x86-branches-within-32B-boundaries` w/ LTO.  It's
inconvenient, so this patch unifies the way: we only need to pass options like
`-mbranches-within-32B-boundaries` to align branches, no matter LTO is enabled or not.

Differential Revision: https://reviews.llvm.org/D80289
2020-05-28 13:17:14 +08:00
Sourabh Singh Tomar c1d5b831b1 [docs] Release notes for DIModule metadata
Updated the release notes for the changes in the DIModule metadata.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D80614
2020-05-28 10:17:40 +05:30
Jonas Devlieghere e5bb542362 [lldb/Test] Import all decorators.
Fixes "NameError: name 'skipIfReproducer' is not defined".
2020-05-27 21:13:08 -07:00
Jonas Devlieghere 5238b80058 [lldb/Reproducers] Skip or fix the remaining tests.
After this patch all remaining tests should pass on macOS when replayed
from a reproducer.

To capture the reproducers:

  ./bin/llvm-lit ../llvm-project/lldb/test/ --param lldb-run-with-repro=capture

To replay the reproducers:

  ./bin/llvm-lit ../llvm-project/lldb/test/ --param lldb-run-with-repro=replay
2020-05-27 21:02:36 -07:00
Vitaly Buka 12cd4a5164 [NFC,StackSafety] Add StackSafetyGlobalInfo class 2020-05-27 20:07:12 -07:00
LLVM GN Syncbot f830b406c6 [gn build] Port 660cda572d 2020-05-28 02:47:12 +00:00
Jan Korous 660cda572d [Analyzer][WebKit] NoUncountedMembersChecker
Differential Revision: https://reviews.llvm.org/D77178
2020-05-27 19:46:32 -07:00
Dan Liew f3a089506f Temporarily disable the following failing tests on Darwin:
AddressSanitizer-Unit :: ./Asan-i386-calls-Test/AddressSanitizer.LongJmpTest
  AddressSanitizer-Unit :: ./Asan-i386-calls-Test/AddressSanitizer.SigLongJmpTest
  AddressSanitizer-Unit :: ./Asan-i386-inline-Test/AddressSanitizer.LongJmpTest
  AddressSanitizer-Unit :: ./Asan-i386-inline-Test/AddressSanitizer.SigLongJmpTest

These failures will be examined properly when time permits.

rdar://problem/62141412
2020-05-27 19:32:06 -07:00
Philip Reames 98a87c65a3 [Statepoint] Reduce scope of usage of ImmutableStatepoint
Can't quite fully remove it yet as some more items need sunk the GCStatepointInst class from the wrapper, but we can at least reduce scope.
2020-05-27 18:57:42 -07:00
Xing GUO 3c3a6e26e7 [ObjectYAML][MachO] Add error handling in MachOEmitter.
Currently, `yaml2macho` doesn't support error handling. This patch helps improve it.

Differential Revision: https://reviews.llvm.org/D80535
2020-05-28 09:54:46 +08:00
Philip Reames 87bea912c2 [Statepoint] Replace uses of isX functions with idiomatic isa<X>
Now that all of the statepoint related routines have classes with isa support, let's cleanup.

I'm leaving the (dead) utitilities in tree for a few days so that I can do the same cleanup downstream without breakage.
2020-05-27 18:32:28 -07:00
Philip Reames 74671d5c14 Sink first bit of functionality from Statepoint to GCStatepointInst
Starting with the obvious stuff.  I initially tried to include the inline operand sequences too, but managed to get code which confused *me*.  Since several parts of those are being entirely removed in the near future, I may defer that portion until the cleanup is done.
2020-05-27 18:32:28 -07:00
Vitaly Buka a70edc2b16 [NFC,StackSafety] Cleanup alloca size calculation 2020-05-27 17:47:02 -07:00
Fangrui Song 1224e619d9 [ELF][test] Fix wrap-no-real.s after D51283
Give %t3.so a DT_SONAME so that the DT_NEEDED entry in a dependent executable has a fixed length.
2020-05-27 17:43:33 -07:00