Commit Graph

139961 Commits

Author SHA1 Message Date
Kostya Serebryany 8b6af7a9d3 [libFuzzer] refresh docs
llvm-svn: 285157
2016-10-26 01:55:17 +00:00
Dean Michael Berris f7bdbbcc58 Revert "[XRay] Implement `llvm-xray extract`, start of the llvm-xray tool"
Reverts r285155 -- misconfigured tests.

llvm-svn: 285156
2016-10-26 01:50:59 +00:00
Dean Michael Berris d21e0a7ba7 [XRay] Implement `llvm-xray extract`, start of the llvm-xray tool
Usage:

  llvm-xray extract <object file> [-o <filename or '-'>]

The tool gets the XRay instrumentation map from an object file and turns
it into YAML.  We first support ELF64 sleds on x86_64 binaries, with
provision for supporting other supported platforms and formats later.

This is the first of a many-part change to fully implement the
`llvm-xray` tool.

We also define a subcommand registration and dispatch mechanism to be
used by other further subcommand implementations for llvm-xray.

llvm-svn: 285155
2016-10-26 01:42:59 +00:00
Rui Ueyama 2241b84f48 Use printf instead of "echo -e" or "echo -n".
Not all echo commands support "-e". On the other hand, printf
command is in POSIX, so it's more portable than "echo -e".

llvm-svn: 285151
2016-10-26 01:07:26 +00:00
Kostya Serebryany 06b8757b57 [libFuzzer] simplify the code in TracePC::HandleTrace a bit more
llvm-svn: 285147
2016-10-26 00:42:52 +00:00
Kostya Serebryany a5b2e54fcb [libFuzzer] simplify the code to print new PCs
llvm-svn: 285145
2016-10-26 00:20:51 +00:00
Evgeniy Stepanov ea6d49d3ee Utility functions for appending to llvm.used/llvm.compiler.used.
llvm-svn: 285143
2016-10-25 23:53:31 +00:00
Kostya Serebryany 275e260258 [libFuzzer] simplify the code in TracePC::HandleTrace
llvm-svn: 285142
2016-10-25 23:52:25 +00:00
Lang Hames 8009f61c3d [docs] Avoid repetition of 'considerable' in Error docs.
llvm-svn: 285141
2016-10-25 23:08:32 +00:00
Lang Hames 497fd94109 [docs] Use consistent style for "do more stuff" in Error docs examples.
llvm-svn: 285138
2016-10-25 22:41:54 +00:00
Lang Hames ca20d9eb95 [docs] Fix yet another Error docs formatting issue...
llvm-svn: 285137
2016-10-25 22:38:50 +00:00
Lang Hames 4f8a9604d0 [docs] Fix a few more Error docs formatting issues.
Thanks to Pete Cooper for the review.

llvm-svn: 285136
2016-10-25 22:35:55 +00:00
Kostya Serebryany 117976818e [libFuzzer] add StandaloneFuzzTargetMain.c and a test for it
llvm-svn: 285135
2016-10-25 22:30:34 +00:00
Lang Hames 7a9ca33378 [docs] Fix a missing code-block in the new Error docs.
llvm-svn: 285134
2016-10-25 22:25:07 +00:00
Lang Hames 6b19ce6adb [docs] Fix a couple of typos in the new Error docs.
llvm-svn: 285133
2016-10-25 22:22:48 +00:00
James Y Knight 2e64b8b79e [Sparc] Don't overlap variable-sized allocas with other stack variables.
On SparcV8, it was previously the case that a variable-sized alloca
might overlap by 4-bytes the last fixed stack variable, effectively
because 92 (the number of bytes reserved for the register spill area) !=
96 (the offset added to SP for where to start a DYNAMIC_STACKALLOC).

It's not as simple as changing 96 to 92, because variables that should
be 8-byte aligned would then be misaligned.

For now, simply increase the allocation size by 8 bytes for each dynamic
allocation -- wastes space, but at least doesn't overlap. As the large
comment says, doing this more efficiently will require larger changes in
llvm.

Also adds some test cases showing that we continue to not support
dynamic stack allocation and over-alignment in the same function.

llvm-svn: 285131
2016-10-25 22:13:28 +00:00
Bob Haarman 26a87bd030 [codeview] support emitting indirect virtual base class information
Summary:
Fixes PR28281.

MSVC lists indirect virtual base classes in the field list of a class,
using LF_IVBCLASS records. This change makes LLVM emit such records
when processing DW_TAG_inheritance tags with the DIFlagVirtual and
(newly introduced) DIFlagIndirect tags.

Reviewers: rnk, ruiu, zturner

Differential Revision: https://reviews.llvm.org/D25578

llvm-svn: 285130
2016-10-25 22:11:52 +00:00
Simon Pilgrim de86241a09 [DAGCombiner] Enable (urem x, (shl pow2, y)) -> (and x, (add (shl pow2, y), -1)) combine for splatted vectors
llvm-svn: 285129
2016-10-25 22:01:09 +00:00
Rong Xu 33308f92eb [PGO] Fix select instruction annotation
Summary:
Select instruction annotation in IR PGO uses the edge count to infer the
branch count. It's currently placed in setInstrumentedCounts() where
no all the BB counts have been computed. This leads to wrong branch weights.
Move the annotation after all BB counts are populated.

Reviewers: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25961

llvm-svn: 285128
2016-10-25 21:47:24 +00:00
Simon Pilgrim daf82f5f33 [X86][SSE] Regenerated known-bits test with srem->urem fix
llvm-svn: 285124
2016-10-25 21:24:33 +00:00
Simon Pilgrim f534573e8c [DAGCombiner] Enable srem(x.y) -> urem(x,y) combine for vectors
SelectionDAG::SignBitIsZero (via SelectionDAG::computeKnownBits) has supported vectors since rL280927

llvm-svn: 285123
2016-10-25 21:20:18 +00:00
Lang Hames 03a88ccba3 [docs] Add more Error documentation to the Programmer's Manual.
This patch updates some of the existing Error examples, expands on the
documentation for handleErrors, and includes new sections that cover
a number of helpful utilities and common error usage idioms.

llvm-svn: 285122
2016-10-25 21:19:30 +00:00
Simon Pilgrim efd5643419 [X86][SSE] Added vector srem combine tests
llvm-svn: 285121
2016-10-25 21:14:11 +00:00
Simon Pilgrim 83fb4019f7 [X86][SSE] Added vector urem combine tests
llvm-svn: 285119
2016-10-25 21:10:12 +00:00
Simon Pilgrim 4ebb04510a [DAGCombiner] Enable sdiv(x.y) -> udiv(x,y) combine for vectors
SelectionDAG::SignBitIsZero (via SelectionDAG::computeKnownBits) has supported vectors since rL280927

llvm-svn: 285118
2016-10-25 20:56:42 +00:00
Guozhi Wei ae541f6a71 [InstCombine] Resubmit the combine of A->B->A BitCast and fix for pr27996
The original patch of the A->B->A BitCast optimization was reverted by r274094 because it may cause infinite loop inside compiler https://llvm.org/bugs/show_bug.cgi?id=27996.

The problem is with following code

xB = load (type B); 
xA = load (type A); 
+yA = (A)xB; B -> A
+zAn = PHI[yA, xA]; PHI 
+zBn = (B)zAn; // A -> B
store zAn;
store zBn;

optimizeBitCastFromPhi generates

+zBn = (B)zAn; // A -> B

and expects it will be combined with the following store instruction to another

store zAn 

Unfortunately before combineStoreToValueType is called on the store instruction, optimizeBitCastFromPhi is called on the new BitCast again, and this pattern repeats indefinitely.

optimizeBitCastFromPhi only generates BitCast for load/store instructions, only the BitCast before store can cause the reexecution of optimizeBitCastFromPhi, and BitCast before store can easily be handled by InstCombineLoadStoreAlloca.cpp. So the solution to the problem is if all users of a CI are store instructions, we should not do optimizeBitCastFromPhi on it. Then optimizeBitCastFromPhi will not be called on the new BitCast instructions.

Differential Revision: https://reviews.llvm.org/D23896

llvm-svn: 285116
2016-10-25 20:43:42 +00:00
Simon Pilgrim 61cdeb46c9 [X86][SSE] Added vector sdiv combine tests
llvm-svn: 285112
2016-10-25 20:25:47 +00:00
Robert Lougher 3080d71fc8 revert: "Remove debug location from common tail when tail-merging"
This reverts r285093, as it caused unexpected buildbot failures on
clang-ppc64le-linux, clang-ppc64be-linux, clang-ppc64be-linux-multistage
and clang-ppc64be-linux-lnt.  Failing test ubsan/TestCases/TypeCheck/vptr.cpp.

llvm-svn: 285110
2016-10-25 20:17:58 +00:00
Kostya Serebryany c48c93184a [libFuzzer] when mutating based on CMP traces also try adding +/- 1 to the desired bytes. Add another test for use_cmp
llvm-svn: 285109
2016-10-25 20:15:15 +00:00
Sanjay Patel f3dda13bd2 [InstCombine] Ensure that truncated int types are legal.
Fixes the FIXMEs in D25952 and rL285075.

Patch by bryant!

Differential Revision: https://reviews.llvm.org/D25955

llvm-svn: 285108
2016-10-25 20:11:47 +00:00
Evandro Menezes 7696dc0685 [AArch64] Adjust the cost model for Exynos M1.
Modify the maximum jump table size.

llvm-svn: 285106
2016-10-25 20:05:42 +00:00
Tim Shen 85de51db85 [APFloat] Make APFloat an interface class to the internal IEEEFloat. NFC.
Summary:
The intention is to make APFloat an interface class, so that later I can add a second implementation class DoubleAPFloat to correctly implement PPCDoubleDouble semantic. The interface of IEEEFloat is not public, and can be simplified (currently it's exactly the same as the old APFloat), but that belongs to a separate patch.

DoubleAPFloat should look like:
class DoubleAPFloat {
  const fltSemantics *Semantics;
  std::unique_ptr<APFloat> APFloats;  // Two heap-allocated APFloats.
};

There is no functional change, nor public interface change.

Reviewers: hfinkel, chandlerc, iteratee, echristo, kbarton

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D25536

llvm-svn: 285105
2016-10-25 19:55:59 +00:00
Evandro Menezes eb97e3554c Add option to specify minimum number of entries for jump tables
Add an option to allow easier experimentation by target maintainers with the
minimum number of entries to create jump tables.  Also clarify the name of
the other existing option governing the creation of jump tables.

Differential revision: https://reviews.llvm.org/D25883

llvm-svn: 285104
2016-10-25 19:53:51 +00:00
Vedant Kumar 22c1b7c1d8 [llvm-cov] Don't use colored output until we know it's supported
CodeCoverageTool::error() depends on CoverageViewOptions::Colors being
initialized. Should fix:

  http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/56

llvm-svn: 285103
2016-10-25 19:52:57 +00:00
Evandro Menezes 601f4cb9f7 Switch lowering: improve partitioning of jump tables
When there's a tie between partitionings of jump tables, consider also cases
that result in no jump tables, but in one or a few cases.  The motivation is
that many contemporary processors typically perform case switches fairly
quickly.

Differential revision: https://reviews.llvm.org/D25212

llvm-svn: 285099
2016-10-25 19:11:43 +00:00
Matthew Simpson c62266d680 [LV] Sink scalar operands of predicated instructions
When we predicate an instruction (div, rem, store) we place the instruction in
its own basic block within the vectorized loop. If a predicated instruction has
scalar operands, it's possible to recursively sink these scalar expressions
into the predicated block so that they might avoid execution. This patch sinks
as much scalar computation as possible into predicated blocks. We previously
were able to sink such operands only if they were extractelement instructions.

Differential Revision: https://reviews.llvm.org/D25632

llvm-svn: 285097
2016-10-25 18:59:45 +00:00
Sanjay Patel 8f9235dd7f [InstCombine] add tests for missing icmp + shl nuw fold
Patch by bryant!

Differential Revision: https://reviews.llvm.org/D25952

llvm-svn: 285095
2016-10-25 18:47:56 +00:00
Michael Ilseman e542804343 Add -strip-nonlinetable-debuginfo capability
This adds a new function to DebugInfo.cpp that takes an llvm::Module
as input and removes all debug info metadata that is not directly
needed for line tables, thus effectively stripping all type and
variable information from the module.

The primary motivation for this feature was the bitcode work flow
(cf. http://lists.llvm.org/pipermail/llvm-dev/2016-June/100643.html
for more background). This is not wired up yet, but will be in
subsequent patches.  For testing, the new functionality is exposed to
opt with a -strip-nonlinetable-debuginfo option.

The secondary use-case (and one that works right now!) is as a
reduction pass in bugpoint. I added two new bugpoint options
(-disable-strip-debuginfo and -disable-strip-debug-types) to control
the new features. By default it will first attempt to remove all debug
information, then only the type info, and then proceed to hack at any
remaining MDNodes.

Thanks to Adrian Prantl for stewarding this patch!

llvm-svn: 285094
2016-10-25 18:44:13 +00:00
Robert Lougher e32564774c Remove debug location from common tail when tail-merging
The branch folding pass tail merges blocks into a common-tail.  However, the
tail retains the debug information from one of the original inputs to the
merge (chosen randomly).  This is a problem for sampled-based PGO, as hits
on the common-tail will be attributed to whichever block was chosen,
irrespective of which path was actually taken to the common-tail.

This patch fixes the issue by nulling the debug location for the common-tail.

Differential Revision: https://reviews.llvm.org/D25742

llvm-svn: 285093
2016-10-25 18:44:07 +00:00
Michael Kuperstein cffedc4a94 Fix 80-char violations. NFC.
llvm-svn: 285092
2016-10-25 18:31:23 +00:00
Vedant Kumar d9f7446c84 [unittests] STLExtrasTest: Remove an MSVC 2013 workaround, NFCI.
Let's see what the bots have to say about this...

llvm-svn: 285091
2016-10-25 18:11:17 +00:00
Vedant Kumar 29d6302736 [unittests] Remove an MSVC 2013 workaround, NFCI.
Let's see what the bots have to say about this...

llvm-svn: 285090
2016-10-25 17:58:25 +00:00
Nico Weber 262a1334b1 Revert 285087.
The sanitizer-windows bot turned red with:

FAILED: utils/TableGen/CMakeFiles/obj.llvm-tblgen.dir/IntrinsicEmitter.cpp.obj
C:\PROGRA~2\MICROS~1.0\VC\bin\AMD64_~2\cl.exe ... -c
    C:\...\llvm\utils\TableGen\IntrinsicEmitter.cpp
c:\...\llvm\utils\tablegen\intrinsicemitter.cpp(254) :
  fatal error C1001: An internal error has occurred in the compiler.
http://lab.llvm.org:8011/builders/sanitizer-windows/builds/114/steps/build%20clang%20lld/logs/stdio

llvm-svn: 285089
2016-10-25 17:46:29 +00:00
Vedant Kumar a3661effd9 [llvm-cov] Add support for loading coverage from multiple objects
Differential Revision: https://reviews.llvm.org/D25086

llvm-svn: 285088
2016-10-25 17:40:55 +00:00
Nico Weber 04fbf573ce Try removing an MSVC2010 workaround.
Things seem to build fine locally without this, so let's
see what the bots think.

llvm-svn: 285087
2016-10-25 17:35:00 +00:00
Dan Gohman f50d964bdb [WebAssembly] Add immediate fields to call_indirect and memory operators.
call_indirect, grow_memory, and current_memory now have immediate
operands in the 0xd binary encoding.

llvm-svn: 285085
2016-10-25 16:55:52 +00:00
Dehao Chen c1472b5092 Move discriminator assignment to where it is used. (NFC)
llvm-svn: 285084
2016-10-25 16:50:27 +00:00
Andrea Di Biagio 824cabd06d [IndVarSimplify][Dwarf] When widening the IV increment, correctly set the debug loc.
When indvars widened an induction variable, the debug location for the loop
increment computation was incorrectly set equal to the debug loc of the loop
latch terminator.

This patch fixes the issue by propagating the correct location from the
original loop increment instruction to the new widened increment.

Differential Revision: https://reviews.llvm.org/D25872

llvm-svn: 285083
2016-10-25 16:45:17 +00:00
Pavel Labath ec534e6dfe Replace TimeValue by TimePoint in LegacyPassManager. NFC.
llvm-svn: 285081
2016-10-25 16:20:07 +00:00
Geoff Berry 91e9a5cc23 [EarlyCSE] Make MemorySSA memory dependency check more aggressive.
Now that MemorySSA keeps track of whether MemoryUses are optimized, use
getClobberingMemoryAccess() to check MemoryUse memory dependencies since
it should no longer be so expensive.

This is a follow-up change to https://reviews.llvm.org/D25881

llvm-svn: 285080
2016-10-25 16:18:47 +00:00
Sanjay Patel e3de152530 fix formatting; NFC
llvm-svn: 285078
2016-10-25 16:12:31 +00:00
Ulrich Weigand 7bdb485e18 [SystemZ] Do not use LOC(G) for volatile loads
It is not safe to use LOAD ON CONDITION to implement access to a memory
location marked "volatile", since the architecture leaves it unspecified
whether or not an access happens if the condition is false.

The current code already appears to care about that:
  def LOC  : CondUnaryRSY<"loc",  0xEBF2, nonvolatile_load, GR32, 4>;

Unfortunately, that "nonvolatile_load" operator is simply ignored
by the CondUnaryRSY class, and there was no test to catch it.

llvm-svn: 285077
2016-10-25 15:39:15 +00:00
Sanjay Patel d59f7f9047 [InstCombine] add test and code comment to show potentially misguided icmp trunc transform
llvm-svn: 285075
2016-10-25 15:16:39 +00:00
Simon Pilgrim 5c3c9707c3 [X86][SSE] Add support for (V)PMOVSX* constant folding
We already have (V)PMOVZX* combining support, this is the beginning of handling (V)PMOVSX* similarly - other combines in combineVSZext can be generalized in future patches.

This unearthed an interesting bug in that we were generating illegal build vectors on 32-bit targets - it was proving difficult to create a test for it from PMOVZX, but it fired immediately with PMOVSX. I've created a more general form of the existing getConstVector to handle these cases - ideally this should be handled in non-target-specific code but I couldn't find an equivalent.

Differential Revision: https://reviews.llvm.org/D25874

llvm-svn: 285072
2016-10-25 14:29:25 +00:00
Sanjay Patel 62fbfe4e21 [InstCombine] fix checks for previous commit (r285069)
Accidentally put in the hoped-for checks ahead of the transform!

llvm-svn: 285070
2016-10-25 13:30:19 +00:00
Sanjay Patel 97beffe037 [InstCombine] add tests for bitcast interference with min/max (PR28001)
llvm-svn: 285069
2016-10-25 13:27:56 +00:00
Rafael Espindola 20aa1779d0 fix warning
llvm-svn: 285064
2016-10-25 12:28:26 +00:00
Zvi Rackover 124470a202 [DAGCombine] Preserve shuffles when one of the vector operands is constant
Summary:
Do *not* perform combines such as:

    vector_shuffle<4,1,2,3>(build_vector(Ud, C0, C1 C2), scalar_to_vector(X))
    ->
    build_vector(X, C0, C1, C2)

Keeping the shuffle allows lowering the constant build_vector to a materialized
constant vector (such as a vector-load from the constant-pool or some other idiom).

Reviewers: delena, igorb, spatel, mkuper, andreadb, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25524

llvm-svn: 285063
2016-10-25 12:14:19 +00:00
Rafael Espindola 7912110ddc Make the LTO comdat api more symbol table friendly.
In an IR symbol table I would expect the comdats to be represented as:

- A table of strings, one for each comdat name.
- Each symbol has an optional index into that table.

The natural api for accessing that would be

InputFile:
ArrayRef<StringRef> getComdatTable() const;

Symbol:
int getComdatIndex() const;

This patch implements an API as close to that as possible.  The
implementation on top of the current IRObjectFile is a bit hackish,
but should map just fine over a symbol table and is very convenient to
use.

llvm-svn: 285061
2016-10-25 12:02:03 +00:00
Benjamin Kramer 7df3043db3 Fix an unused warning in WebAssemblyInstPrinter with NDEBUG.
Patch by Sam McCall!

Differential Revision: https://reviews.llvm.org/D25934

llvm-svn: 285055
2016-10-25 09:08:50 +00:00
Craig Topper 01e4667e02 [AVX-512] Add support for creating SIGN_EXTEND_VECTOR_INREG and ZERO_EXTEND_VECTOR_INREG for 512-bit vectors to support vpmovzxbq and vpmovsxbq.
Summary: The one tricky thing about this is that the sign/zero_extend_inreg uses v64i8 as an input type which isn't legal without BWI support. Though the vpmovsxbq and vpmovzxbq instructions themselves don't require BWI. To support this we need to add custom lowering for ZERO_EXTEND_VECTOR_INREG with v64i8 input. This can mostly reuse the existing sign extend code with a couple checks for sign extend vs zero extend added.

Reviewers: delena, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25594

llvm-svn: 285053
2016-10-25 04:00:29 +00:00
Peter Collingbourne 4f3b2df9bb GlobalDCE: Restore a statement accidentally removed in r285048.
llvm-svn: 285052
2016-10-25 02:57:27 +00:00
Matthias Braun c8440dddb2 MachineInstrBundle: Pass iterators to getBundle(Start|End); NFC
This is a function to go backwards in a block to find the first
instruction in a bundle, so iterator is a more natural choice for
parameter/return rather than a reference to a MachineInstruction.

llvm-svn: 285051
2016-10-25 02:55:17 +00:00
Peter Collingbourne ca7664e761 IR: Deduplicate getParent() functions on derived classes of GlobalValue into the base class. NFCI.
llvm-svn: 285050
2016-10-25 02:54:08 +00:00
Kostya Serebryany 3364f90783 [libFuzzer] simplify the code for use_cmp, also use the position hint when available, add a test
llvm-svn: 285049
2016-10-25 02:04:43 +00:00
Peter Collingbourne 7695cb6da8 GlobalDCE: Deduplicate code. NFCI.
llvm-svn: 285048
2016-10-25 01:58:26 +00:00
Sanjay Patel 02be063351 [InstCombine] auto-generate checks
llvm-svn: 285046
2016-10-25 00:44:02 +00:00
Sanjay Patel 5cff621dce [InstCombine] auto-generate checks
llvm-svn: 285045
2016-10-25 00:41:00 +00:00
Dan Gohman 48abaa9c74 [WebAssembly] Reorder load/store operands to match binary encoding.
The p2align operand of a load/store is encoded before the offset
operand; reorder the MachineInstr operands accordingly.

llvm-svn: 285044
2016-10-25 00:17:11 +00:00
Vedant Kumar 5c61c70387 [llvm-cov] Do not print out the filename of the object file
When we load coverage data from multiple objects, we don't have a way to
attribute a source object to a function record. Printing out the object
filename next to the source filename is already not very useful: soon,
it'll actually become misleading. Stop printing out the filename now.

llvm-svn: 285043
2016-10-25 00:08:33 +00:00
Dan Gohman 3acb187d95 [WebAssembly] Implement more WebAssembly binary encoding.
This changes locals from being declared by the emitLocal hook in
WebAssemblyTargetStreamer, rather than with an instruction. After exploring
the infastructure in LLVM more, this seems to make more sense since
declaring locals doesn't use an encoded opcode.

This also adds more 0xd opcodes, type encodings, and miscellaneous
binary encoding bits.

llvm-svn: 285040
2016-10-24 23:27:49 +00:00
Matthias Braun 8b38ffaa98 CodeGen/Passes: Pass MachineFunction as functor arg; NFC
Passing a MachineFunction as argument is more natural and avoids an
unnecessary round-trip through the logic determining the correct
Subtarget because MachineFunction already has a reference anyway.

llvm-svn: 285039
2016-10-24 23:23:02 +00:00
Sanjay Patel 60f80d7a8b [InstCombine] regenerate some checks
llvm-svn: 285036
2016-10-24 22:50:26 +00:00
Justin Bogner b63109944d cmake: Rename installhdrs to install-llvm-headers and fix the dependencies
The installhdrs target was inconsistently named and would behave
differently depending on whether or not you ran a build first. This
renames it to install-llvm-headers to match other target names and
adds a dependency on intrinsics_gen so that it will always install the
same set of things.

llvm-svn: 285035
2016-10-24 21:58:58 +00:00
Eli Friedman c5b7262073 Fix regression from my recent GlobalsAA fix.
There are two fixes here: one, AnalyzeUsesOfPointer can't return
false until it has checked all the uses of the pointer. Two, if a
global uses another global, we have to assume the address of the
first global escapes.

Fixes https://llvm.org/bugs/show_bug.cgi?id=30707 .

Differential Revision: https://reviews.llvm.org/D25798

llvm-svn: 285034
2016-10-24 21:47:44 +00:00
Simon Pilgrim e3e6585c2d [SelectionDAG] Update ComputeNumSignBits SRA/SHL handlers to accept scalar or vector splats
Use isConstOrConstSplat helper.

Also use APInt instead of getZExtValue directly to avoid out of range issues.

llvm-svn: 285033
2016-10-24 21:47:19 +00:00
Justin Bogner 51c6d93fed cmake: Make /usr/share/cmake installable with LLVM_DISTRIBUTION_COMPONENTS
Add a cmake-exports install component and appropriate targets for
LLVM_DISTRIBUTION_COMPONENTS to work with.

llvm-svn: 285030
2016-10-24 21:40:15 +00:00
Matthias Braun fc371558a0 Use MachineInstr::mop_iterator instead of MIOperands; NFC
(Const)?MIOperands is equivalent to the C++ style
MachineInstr::mop_iterator. Use the latter for consistency except for a
few callers of MIOperands::analyzePhysReg().

llvm-svn: 285029
2016-10-24 21:36:43 +00:00
Kevin Enderby 79d6c63f61 nother additional error check for an invalid Mach-O file
when contained in a Mach-O universal file and the
cputypes in both headers don’t match.

llvm-svn: 285026
2016-10-24 21:15:11 +00:00
Simon Pilgrim d8ec09c74f Use SDValue::getConstantOperandVal() helper. NFCI.
llvm-svn: 285025
2016-10-24 20:56:52 +00:00
Vedant Kumar 26f89df41f [pbqp] unique_ptr-ify (Vector|Matrix)::Data, NFC.
Suggested by David Blaikie.

llvm-svn: 285024
2016-10-24 20:51:46 +00:00
Vedant Kumar 06ca6ea6c3 [pbqp] Delete some dead code, NFC.
I took the opportunity to replace some copy|move constructors|assignment
operators with default implementations.

As a follow-up, I plan on threading unique_ptr<T []> through a few areas
per David Blaikie's advice.

Differential Revision: https://reviews.llvm.org/D24424

llvm-svn: 285018
2016-10-24 20:35:35 +00:00
Dan Gohman 5d3391f859 [WebAssembly] Fix a broken URL.
llvm-svn: 285017
2016-10-24 20:35:17 +00:00
Dan Gohman 4becc58587 [WebAssembly] Define the `end` opcode value.
CFGStackify differentiates between END_LOOP and END_BLOCK, but wasm
itself doesn't. For now, just use the same opcode for both.

llvm-svn: 285016
2016-10-24 20:32:04 +00:00
Dan Gohman c968297b95 [WebAssembly] Update opcode values according to recent spec changes.
This corresponds to the "0xd" opcode renumbering.

llvm-svn: 285014
2016-10-24 20:21:49 +00:00
Dan Gohman 4fc4e42dea [WebAssembly] Add an option to make get_local/set_local explicit.
This patch adds a pass, controlled by an option and off by default for
now, for making implicit get_local/set_local explicit. This simplifies
emitting wasm with MC.

Differential Revision: https://reviews.llvm.org/D25836

llvm-svn: 285009
2016-10-24 19:49:43 +00:00
Davide Italiano c3e0ce8f85 Merge two if conditions into one. NFCI.
llvm-svn: 285008
2016-10-24 19:41:47 +00:00
Peter Collingbourne 6733564e5a Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject.
These functions are about classifying a global which will actually be
emitted, so it does not make sense for them to take a GlobalValue which may
for example be an alias.

Change the Mach-O object writer and the Hexagon, Lanai and MIPS backends to
look through aliases before using TargetLoweringObjectFile interfaces. These
are functional changes but all appear to be bug fixes.

Differential Revision: https://reviews.llvm.org/D25917

llvm-svn: 285006
2016-10-24 19:23:39 +00:00
Sanjay Patel 87eea10711 [x86] add tests for {-1,0,1} select of constants
llvm-svn: 285005
2016-10-24 19:13:29 +00:00
Mandeep Singh Grang da99e33ae3 [llvm] Remove redundant --check-prefix=CHECK from tests
Reviewers: MatzeB, mcrosier, rengolin

Differential Revision: https://reviews.llvm.org/D25894

llvm-svn: 285003
2016-10-24 18:57:55 +00:00
Peter Collingbourne 16e9b944e9 CodeGen: Do not add a global's address space to the folding set profile.
It is already part of the type (which is part of the global, which is already
being added), so there's no need to do it.

llvm-svn: 285002
2016-10-24 18:56:09 +00:00
Adrian Prantl 28d2d281e7 add-discriminators: Fix handling of lexical scopes.
This fixes a bug in the handling of lexical scopes, when more than one
scope is defined on the same line or functions are inlined into call
sites that are on the same line as the function definition. This
situation can easily happen in macro expansions.

The problem is solved by introducing a SmallDenseMap<DIScope *,
DILexicalBlockFile *, 1> that keeps track of all the different lexical
scopes that share a line/file location.

Fixes PR30681.

llvm-svn: 284998
2016-10-24 18:23:51 +00:00
Benjamin Kramer bc473621b8 Clarify that MSVC is not the issue here anymore.
llvm-svn: 284997
2016-10-24 18:11:05 +00:00
Krzysztof Parzyszek eb6172404d Revert r284972 and remove other defaulted copy/move constructors/=
David Blaikie pointed out that we get them for free without having to
write anything.

llvm-svn: 284996
2016-10-24 17:40:46 +00:00
Ehsan Amiri c90b02cf50 [PPC] Generate positive FP zero using xor insn instead of loading from constant area
https://reviews.llvm.org/D23614

Currently we load +0.0 from constant area. That can change to be generated using
XOR instruction.

llvm-svn: 284995
2016-10-24 17:31:09 +00:00
Hans Wennborg 47f2616b6a ReleaseNotes: mention new compiler requirements
llvm-svn: 284994
2016-10-24 17:29:52 +00:00
Eli Friedman b37864b58d Revert r284580+r284917. ("Synthesize TBB/TBH instructions")
The optimization has correctness issues, so reverting for now to fix tests
on thumb1 targets.

llvm-svn: 284993
2016-10-24 17:20:50 +00:00
Simon Pilgrim a072e375b5 Removed FIXME from include ordering comment
Nothing to fix, it's just the way it has to be.

llvm-svn: 284991
2016-10-24 17:15:05 +00:00
Rong Xu b05bac940d Check the number of Args in LibCallsShrinkWrap.
Some library fucntions can have no argument.

llvm-svn: 284989
2016-10-24 16:50:12 +00:00
Evandro Menezes eff2bd9d4f [AArch64] Optionally use the Newton series for reciprocal estimation
Add support for estimating the square root or its reciprocal and division or
reciprocal using the combiner generic Newton series.

Differential revision: https://reviews.llvm.org/D25291

llvm-svn: 284986
2016-10-24 16:14:58 +00:00
Justin Lebar 566eb864b6 [ADT] static_assert that SmallDenseMap is instantiated with a power-of-two number of inline buckets.
Summary:
If you try to instantiate it with a non-power-of-two buckets, DenseMap
will assert at runtime (!) if we ever outgrow our inline storage.

I believe using a constexpr function inside of a static_assert is safe
now that we've unsupported MSVC 2013 and GCC < 4.8.

Reviewers: bkramer, qcolombet, escha

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25900

llvm-svn: 284985
2016-10-24 16:06:53 +00:00
Geoff Berry 6815468768 [EarlyCSE] Optimize MemoryPhis and reduce memory clobber queries w/ MemorySSA
Summary:
When using MemorySSA, re-optimize MemoryPhis when removing a store since
this may create MemoryPhis with all identical arguments.

Also, when using MemorySSA to check if two MemoryUses are reading from
the same version of the heap, use the defining access instead of calling
getClobberingAccess, since the latter can currently result in many more
AA calls.  Once the MemorySSA use optimization tracking changes are
done, we can remove this limitation, which should result in more loads
being CSE'd.

Reviewers: dberlin

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D25881

llvm-svn: 284984
2016-10-24 15:54:00 +00:00
Ehsan Amiri 1f31e9157d [PPC] Better codegen for AND, ANY_EXT, SRL sequence
https://reviews.llvm.org/D24924

This improves the code generated for a sequence of AND, ANY_EXT, SRL instructions. This is a targetted fix for this special pattern. The pattern is generated by target independet dag combiner and so a more general fix may not be necessary. If we come across other similar cases, some ideas for handling it are discussed on the code review.

llvm-svn: 284983
2016-10-24 15:46:58 +00:00
Sanjay Patel 7b12e36740 [x86] regenerate checks
llvm-svn: 284982
2016-10-24 15:43:40 +00:00
Nicolai Haehnle a785209bc2 AMDGPU: Fix Two Address problems with v_movreld
Summary:
The v_movreld machine instruction is used with three operands that are
in a sense tied to each other (the explicit VGPR_32 def and the implicit
VGPR_NN def and use). There is no way to express that using the currently
available operand bits, and indeed there are cases where the Two Address
instructions pass does the wrong thing.

This patch introduces a new set of pseudo instructions that are identical
in intended semantics as v_movreld, but they only have two tied operands.

Having to add a new set of pseudo instructions is admittedly annoying, but
it's a fairly straightforward and solid approach. The only alternative I
see is to try to teach the Two Address instructions pass about Three Address
instructions, and I'm afraid that's trickier and is going to end up more
fragile.

Note that v_movrels does not suffer from this problem, and so this patch
does not touch it.

This fixes several GL45-CTS.shaders.indexing.* tests.

Reviewers: tstellarAMD, arsenm

Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D25633

llvm-svn: 284980
2016-10-24 14:56:02 +00:00
Nico Weber b38d341106 Revert 284971.
It seems to break selfhost on some bots, see e.g.
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/21
http://lab.llvm.org:8011/builders/clang-ppc64be-linux-multistage/builds/20
http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt/builds/22

llvm-svn: 284979
2016-10-24 14:52:04 +00:00
Nirav Dave 1a9044b782 [MC] Fix Various End Of Line Comment checkings
Fix AsmParser lines to correctly handle end-of-line pre-processor
comments parsing when '#' is not the assembly line comment prefix.

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25567

llvm-svn: 284978
2016-10-24 14:35:29 +00:00
Pavel Labath 676a875b06 [Chrono] Fix !HAVE_FUTIMENS build
If we don't have futimens(), we fall back to futimes(), which only supports
microsecond timestamps. In that case, we need to explicitly cast away the extra
precision in setLastModificationAndAccessTime().

llvm-svn: 284977
2016-10-24 14:19:28 +00:00
Pavel Labath 51c454c1a9 Remove unused #includes of TimeValue.h. NFC.
llvm-svn: 284975
2016-10-24 14:00:26 +00:00
Pavel Labath bff47b51b6 [Object] Replace TimeValue with std::chrono
Summary:
Most of the changes are very straight-forward. The only choice I had to make was
to use second-precision time points in the Archive classes. I did this because
the archive files use that precision in the on-disk representation anyway.

Reviewers: rafael, zturner

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25773

llvm-svn: 284974
2016-10-24 13:38:27 +00:00
Joel Jones 504bf334b0 AArch64 ILP32 relocations for assembly and ELF
Summary:
Add relocations for AArch64 ILP32. Includes:
  - Addition of definitions for R_AARCH32_*
  - Definition of new -target-abi: ilp32
  - Definition of data layout string
  - Tests for added relocations. Not comprehensive, but matches
    existing tests for 64-bit. Renames "CHECK-OBJ" to "CHECK-OBJ-LP64".
  - Tests for llvm-readobj

Reviewers: zatrazz, peter.smith, echristo, t.p.northover

Subscribers: aemerson, rengolin, mehdi_amini

Differential Revision: https://reviews.llvm.org/D25159

llvm-svn: 284973
2016-10-24 13:37:13 +00:00
Krzysztof Parzyszek f74683f930 [RDF] Add default move constructors/assignment operators
llvm-svn: 284972
2016-10-24 13:15:20 +00:00
Pablo Barrio f9e0d0b7d0 [JumpThreading] Unfold selects that depend on the same condition
Summary:
These are good candidates for jump threading. This enables later opts
(such as InstCombine) to combine instructions from the selects with
instructions out of the selects. SimplifyCFG will fold the select
again if unfolding wasn't worth it.

Patch by James Molloy and Pablo Barrio.

Reviewers: reames, bkramer, mcrosier, gberry, haicheng, jmolloy, sebpop

Subscribers: jojo, rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D25477

llvm-svn: 284971
2016-10-24 13:04:45 +00:00
Simon Pilgrim 6d2de6aa9e Fix windows builds by swapping windows.h and wincrypt.h ordering.
We need to include windows.h first even though it breaks default include ordering rules

llvm-svn: 284968
2016-10-24 12:39:23 +00:00
Pavel Labath 757ca886cd Remove TimeValue usage from llvm/Support
Summary:
This is a follow-up to D25416. It removes all usages of TimeValue from
llvm/Support library (except for the actual TimeValue declaration), and replaces
them with appropriate usages of std::chrono. To facilitate this, I have added
small utility functions for converting time points and durations into appropriate
OS-specific types (FILETIME, struct timespec, ...).

Reviewers: zturner, mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25730

llvm-svn: 284966
2016-10-24 10:59:17 +00:00
Simon Dardis 9c34854833 [mips] synci microMIPS instruction definition.
Add synci to the microMIPS instruction definitions, mark the MIPS sync & synci
as not being part of microMIPS. This does not cover the sync instruction alias,
as that will be handled with a different patch. Add sync to the valid tests for
microMIPS.

Reviewers: vkalintiris

Differential Revision: https://reviews.llvm.org/D25795

llvm-svn: 284962
2016-10-24 10:23:59 +00:00
Hal Finkel fd448408e3 [llvm-opt-report] Fix unroll-count reporting
Fix the implementation of OptReportLocationInfo's operator < so that contexts
with different unroll counts are reported separately.

llvm-svn: 284957
2016-10-24 05:07:18 +00:00
Craig Topper 8ec5c7326d [AVX-512] Remove masked pmin/pmax intrinsics and autoupgrade to native IR.
Clang patch to replace 512-bit vector and 64-bit element versions with native IR will follow.

llvm-svn: 284955
2016-10-24 04:04:16 +00:00
Sanjay Patel 9ca028c2d6 [DAG] enhance computeKnownBits to handle SRL/SRA with vector splat constant
llvm-svn: 284953
2016-10-23 23:13:31 +00:00
Simon Pilgrim d06641d3dc Use SDValue::getConstantOperandVal() helper. NFCI.
llvm-svn: 284949
2016-10-23 20:17:21 +00:00
Justin Lebar a45e6fde58 Remove LLVM_CONSTEXPR.
Summary: With MSVC 2013 and GCC < 4.8 gone, we can use the "constexpr" keyword.

Reviewers: bkramer, mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25901

llvm-svn: 284947
2016-10-23 19:39:16 +00:00
Simon Pilgrim d09c04d267 [CostModel][X86] Added tests for current integer signed/unsigned remainder costs
llvm-svn: 284940
2016-10-23 18:35:02 +00:00
Simon Pilgrim 6ac1e98b09 [X86][SSE] Add SSE41/AVX1 costs for vector shifts.
We were defaulting to SSE2 costs which weren't taking into account the availability of PBLENDW/PBLENDVB to improve merging of per-element shift results.

llvm-svn: 284939
2016-10-23 16:49:04 +00:00
Simon Pilgrim e16b1e2271 [CostModel][X86] Added tests for current integer trunc costs
llvm-svn: 284938
2016-10-23 15:17:52 +00:00
Simon Pilgrim 96ef0c1103 Use APInt::isAllOnesValue instead of popcnt. NFCI.
More obvious implementation and faster too.

llvm-svn: 284937
2016-10-23 15:09:44 +00:00
Dylan McKay 479a13c0aa [AVR] Add the machine code disassembler
This adds a super basic implementation of a machine code disassembler.

It doesn't support any operands with custom encoding.

llvm-svn: 284930
2016-10-22 23:57:59 +00:00
Simon Pilgrim d3829c89bc [X86][AVX512VL] Added support for combining target 256-bit shuffles to AVX512VL VPERMV3
llvm-svn: 284922
2016-10-22 20:15:39 +00:00
Simon Pilgrim 56c0524f0f [X86][AVX512] Added support for combining target shuffles to AVX512 VPERMV3
llvm-svn: 284921
2016-10-22 19:53:59 +00:00
Brian Gesiak ae8c2517b4 [lit] Add more testing instructions to README
Summary:
r283710 introduced two regressions, one to llvm-lit, and the other to
lit executables that were installed via setuptools. Add instructions on
how to test for these regressions in the future.

Reviewers: ddunbar, delcypher, beanz, chapuni, cmatthews, echristo

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D25459

llvm-svn: 284919
2016-10-22 17:27:31 +00:00
James Molloy 2bae8640d7 [ARM] Fix crash in ConstantIslands
tPCRelJT may not be the first instruction in a block. Check that instead of dereferencing a broken iterator.

llvm-svn: 284917
2016-10-22 09:58:37 +00:00
Zvi Rackover 8eb99d88d4 [X86] Apply the Update LLC Test Checks tool on the mmx-bitcast test
llvm-svn: 284916
2016-10-22 07:15:00 +00:00
Craig Topper b084c90a18 [X86] Add support for printing shuffle comments for VALIGN instructions.
llvm-svn: 284915
2016-10-22 06:51:56 +00:00
Craig Topper 7b2b8db438 [X86] Add support for lowering v4i64 and v8i64 shuffles directly to PALIGNR. I think shuffle combine can figure it out later, but we should try to get it right up front.
llvm-svn: 284914
2016-10-22 06:51:52 +00:00
Craig Topper 9f374533e3 [X86] Remove unnecessary AVX2 check that was already covered by an assertion earlier in the function. NFC
llvm-svn: 284913
2016-10-22 06:51:49 +00:00
Craig Topper bea5cb5491 [X86] Remove 128-bit lane handling from the main loop of matchVectorShuffleAsByteRotate. Instead check for is128LaneRepeatedSuffleMask before the loop and just loop over the repeated mask.
I plan to use the loop to support VALIGND/Q shuffles so this makes it easier to reuse.

llvm-svn: 284912
2016-10-22 06:51:44 +00:00
Simon Pilgrim 0d376bcbf0 [X86][SSE] Use getConstVector helper for VPERMV mask generation. NFCI.
llvm-svn: 284911
2016-10-22 06:18:36 +00:00
Daniel Berlin f5361139bb Now that VS2013 is gone, make a memoryssa structure an anonymous union again
llvm-svn: 284910
2016-10-22 04:15:41 +00:00
Kostya Serebryany 65f102d4d2 [libFuzzer] mutation: insert the size of the input in bytes as one of the ways to mutate a binary integer
llvm-svn: 284909
2016-10-22 03:48:53 +00:00
Gerolf Hoflehner 9e2afa8bd7 [BasicAA] Fix - missed alias in GEP expressions
In BasicAA GEP operand values get adjusted ("wrap-around") based on the
pointersize. Otherwise, in non-64b modes, AA could report false negatives.
However, a wrap-around is valid only for a fully evaluated expression.
It had been introduced to fix an alias problem in
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160118/326163.html.
This commit restricts the wrap-around to constant gep operands only where the
value is known at compile-time.

llvm-svn: 284908
2016-10-22 02:41:39 +00:00
Davide Italiano 738837eed9 [CtorUtils] Modernize. No functional changes intended.
llvm-svn: 284904
2016-10-22 01:21:24 +00:00
Kostya Serebryany 10ae9e23a3 [libFuzzer] typo in a test
llvm-svn: 284903
2016-10-22 01:07:38 +00:00
Kostya Serebryany 2bfff021ad [libFuzzer] add a test for asan's strict_string_checks=1
llvm-svn: 284902
2016-10-22 00:05:44 +00:00
David L. Jones 0db4549a1e Fix map insertion that is elided in release build.
The assert() macro doesn't actually execute its body in Release builds, so using
it to check cache invariants requires that the insertion be outside of the
assert() statement. This change does that, and also makes sure to return the
actual map contents.

llvm-svn: 284898
2016-10-21 23:30:39 +00:00
Sanjay Patel 5b7767f646 [x86] add test for missing vector SRA combine via computeKnownBits
llvm-svn: 284896
2016-10-21 23:02:31 +00:00
Justin Lebar 7b15e2946f [ADT] Don't rely on string literals not being convertible to non-const char* in CachedHashString.
The build was breaking on some platforms because we assumed that
CachedHashString("foo") would match the CachedHashString(StringRef)
constructor rather than the CachedHashString(char*) constructor.

To fix this, provide a CachedHashString(const char*) constructor, and
add a dummy argument to the old CachedHashString(char*) constructor.

llvm-svn: 284892
2016-10-21 22:10:23 +00:00
Konstantin Zhuravlyov fda33eaf0c [AMDGPU] Perform uchar to float combine for ISD::SINT_TO_FP
This will prevent following regression when enabling i16 support (D18049):
  test/CodeGen/AMDGPU/cvt_f32_ubyte.ll

Differential Revision: https://reviews.llvm.org/D25805

llvm-svn: 284891
2016-10-21 22:10:03 +00:00
Justin Lebar 5e83dfedb8 Switch SmallSetVector to use DenseSet when it overflows its inline space.
Summary:
SetVector already used DenseSet, but SmallSetVector used std::set.  This
leads to surprising performance differences.  Moreover, it means that
the set of key types accepted by SetVector and SmallSetVector are
quite different!

In order to make this change, we had to convert some callsites that used
SmallSetVector<std::string, N> to use SmallSetVector<CachedHashString, N>
instead.

Reviewers: timshen

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25648

llvm-svn: 284887
2016-10-21 21:45:01 +00:00
Justin Bogner 8659d16631 Support: Annotate Error and Expected<> with LLVM_NODISCARD
It's always a mistake to ignore return values with Error or Expected
types.

llvm-svn: 284884
2016-10-21 21:01:12 +00:00
Bob Haarman 62c730c9bd fixed typo in InstrProf.h; NFC
llvm-svn: 284880
2016-10-21 20:38:37 +00:00
Justin Lebar 3c37dc0cb2 [ADT] Get rid of use of LLVM_NOEXCEPT in CachedHashString.h.
LLVM_NOEXCEPT is no longer necessary (yay).

llvm-svn: 284876
2016-10-21 20:28:00 +00:00