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20502 Commits

Author SHA1 Message Date
Chris Lattner b7b75e1b68 Fix a conditional so we don't access past the end of the range. Thanks to 
Andrew for bringing this to my attn.

llvm-svn: 23850
 2005-10-20 22:50:10 +00:00
Andrew Lenharth d4c0ed74e4 added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh 
llvm-svn: 23849
 2005-10-20 19:39:24 +00:00
Andrew Lenharth 7e0e8234f6 add cttz and ctpop 
llvm-svn: 23848
 2005-10-20 19:38:11 +00:00
Nate Begeman 7efe53d90b Fix a couple bugs in the const div stuff where we'd generate MULHS/MULHU 
for types that aren't legal, and fail a divisor is less than zero
comparison, which would cause us to drop a subtract.

llvm-svn: 23846
 2005-10-20 17:45:03 +00:00
Chris Lattner a6efeb01f9 don't use llabs with apparently VC++ doesn't have 
llvm-svn: 23845
 2005-10-20 17:01:00 +00:00
Chris Lattner 35852fc391 Fix order of eval problem from when I refactored this into a function. 
llvm-svn: 23844
 2005-10-20 16:56:40 +00:00
Andrew Lenharth eb0ad1863b Sounds good, finish the intop conversion. 
llvm-svn: 23843
 2005-10-20 14:42:48 +00:00
Nate Begeman 60bbe2d1e5 Add some more patterns for i64 on ppc 
llvm-svn: 23842
 2005-10-20 07:51:08 +00:00
Chris Lattner 3cf40798ab add a new method, play around with some code. 
Fix a *bug* in the extendIntervalEndTo method.  In particular, if adding
[2:10) to an interval containing [0:2),[10:30), we produced [0:10),[10,30).
Which is not the most smart thing to do.  Now produce [0:30).

llvm-svn: 23841
 2005-10-20 07:39:25 +00:00
Chris Lattner 6380f3c96d add a new method 
llvm-svn: 23840
 2005-10-20 07:37:59 +00:00
Chris Lattner 8816353040 Refactor some code, pulling it out into a function. No functionality change. 
llvm-svn: 23839
 2005-10-20 06:06:30 +00:00
Chris Lattner 0c0b38bb4c Do NOT touch FP ops with LSR. This fixes a testcase Nate sent me from an 
inner loop like this:

LBB_RateConvertMono8AltiVec_2:  ; no_exit
        lis r2, ha16(.CPI_RateConvertMono8AltiVec_0)
        lfs f3, lo16(.CPI_RateConvertMono8AltiVec_0)(r2)
        fmr f3, f3
        fadd f0, f2, f0
        fadd f3, f0, f3
        fcmpu cr0, f3, f1
        bge cr0, LBB_RateConvertMono8AltiVec_2  ; no_exit

to an inner loop like this:

LBB_RateConvertMono8AltiVec_1:  ; no_exit
        fsub f2, f2, f1
        fcmpu cr0, f2, f1
        fmr f0, f2
        bge cr0, LBB_RateConvertMono8AltiVec_1  ; no_exit

Doh! good catch!

llvm-svn: 23838
 2005-10-20 04:47:10 +00:00
Chris Lattner fd07fcda67 Add some pattern fragments to simplify the repetitive parts of the patterns 
for some common ops and use them for a few examples.  Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.

llvm-svn: 23837
 2005-10-20 04:21:06 +00:00
Chris Lattner cd4be8798f simplify this a bit by using immediates 
llvm-svn: 23836
 2005-10-20 03:57:03 +00:00
Nate Begeman c6f067a8c4 Move the target constant divide optimization up into the dag combiner, so 
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.

llvm-svn: 23835
 2005-10-20 02:15:44 +00:00
Nate Begeman 5765717aad Enable targets to say that integer divide is expensive, which will trigger 
an upcoming optimization in the DAG Combiner.

llvm-svn: 23834
 2005-10-20 02:14:14 +00:00
Andrew Lenharth 794f15868a forgot this one 
llvm-svn: 23833
 2005-10-20 00:29:02 +00:00
Andrew Lenharth 7b69867052 ret 0; works, not much else 
still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.

llvm-svn: 23832
 2005-10-20 00:28:31 +00:00
John Criswell 196e8c1f58 This fixes PR638: 
Regression/CodeGen/Generic/2004-02-08-UnwindSupport.llx

llvm-svn: 23831
 2005-10-19 20:07:15 +00:00
Jim Laskey 74ab9960f2 Added InstrSchedClass to each of the PowerPC Instructions. 
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.

llvm-svn: 23830
 2005-10-19 19:51:16 +00:00
John Criswell b2544ff7a7 Moved to Regression/Codegen/Generic. 
llvm-svn: 23829
 2005-10-19 18:52:52 +00:00
John Criswell 14582b1a73 This is a generic test for all code generators. It originally came from 
Regression/Codegen/X86.

llvm-svn: 23826
 2005-10-19 18:51:07 +00:00
Nate Begeman 9f3c26c4ea Write patterns for the various shl and srl patterns that don't involve 
doing something clever.

llvm-svn: 23824
 2005-10-19 18:42:01 +00:00
John Criswell 6b7df0ef4e Force i386 code generation for an i386 specific test. 
llvm-svn: 23821
 2005-10-19 18:30:39 +00:00
Jim Laskey 9761100055 Push processor descriptions to the top of target and add command line info. 
llvm-svn: 23820
 2005-10-19 13:34:52 +00:00
Chris Lattner c9ad735e78 add support for literal immediates in patterns to match, allowing us to 
write things like this:

def : Pat<(add GPRC:$in, 12),
          (ADD12 GPRC:$in)>;

Andrew: if this isn't enough or doesn't work for you, please lemme know.
llvm-svn: 23819
 2005-10-19 04:41:05 +00:00
Chris Lattner c16b0c387f now that tblgen is smarter, use integers directly. This should help Andrew too 
llvm-svn: 23818
 2005-10-19 04:32:04 +00:00
Chris Lattner 7f6f565846 Add basic support for integer constants in pattern results. 
llvm-svn: 23817
 2005-10-19 04:30:56 +00:00
Chris Lattner 2ae2f99326 Fix some checking that was causing duraid to get a perplexing assertion 
instead of a happy error message

llvm-svn: 23816
 2005-10-19 04:12:14 +00:00
Chris Lattner b8014e10ae Add support for patterns that have physical registers in them. Testcase: 
def : Pat<(trunc G8RC:$in),
          (OR8To4 G8RC:$in, X0)>;

Even though this doesn't make any sense on PPC :)

llvm-svn: 23815
 2005-10-19 02:07:26 +00:00
Chris Lattner c8f899f98d Asserting here is to violent 
llvm-svn: 23814
 2005-10-19 01:55:23 +00:00
Chris Lattner 5f37623218 teach ppc backend these are copies 
llvm-svn: 23813
 2005-10-19 01:50:36 +00:00
Chris Lattner 62041778e6 Make this work with the internalize change 
llvm-svn: 23812
 2005-10-19 01:41:47 +00:00
Chris Lattner 5b6f4dc623 Convert these cases to patterns 
llvm-svn: 23811
 2005-10-19 01:38:02 +00:00
Chris Lattner 8baf5043a8 Nate wants to define 'Pat's which turn into instructions that don't have 
patterns.  Certainly a logical request.

llvm-svn: 23810
 2005-10-19 01:27:22 +00:00
Nate Begeman 9eaa6bac06 Woo, it kinda works. We now generate this atrociously bad, but correct, 
code for long long foo(long long a, long long b) { return a + b; }

_foo:
        or r2, r3, r3
        or r3, r4, r4
        or r4, r5, r5
        or r5, r6, r6
        rldicr r2, r2, 32, 31
        rldicl r3, r3, 0, 32
        rldicr r4, r4, 32, 31
        rldicl r5, r5, 0, 32
        or r2, r3, r2
        or r3, r5, r4
        add r4, r3, r2
        rldicl r2, r4, 32, 32
        or r4, r4, r4
        or r3, r2, r2
        blr

llvm-svn: 23809
 2005-10-19 01:12:32 +00:00
Chris Lattner 38d7f2be4c Testcase that crashes llvmgcc in type layout 
llvm-svn: 23806
 2005-10-19 00:52:21 +00:00
Chris Lattner ecdf842311 apply some tblgen majik to simplify the X register definitions 
llvm-svn: 23805
 2005-10-19 00:17:55 +00:00
Nate Begeman 5172ce641e Teach Legalize how to do something with EXTRACT_ELEMENT when the type of 
the pair of elements is a legal type.

llvm-svn: 23804
 2005-10-19 00:06:56 +00:00
Nate Begeman 92e77502f3 Make a new reg class for 64 bit regs that aliases the 32 bit regs. This 
will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.

Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG.  Something wll have to be
figured out.

llvm-svn: 23803
 2005-10-19 00:05:37 +00:00
Nate Begeman 78afac2ddd Add the ability to lower return instructions to TargetLowering. This 
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).

llvm-svn: 23802
 2005-10-18 23:23:37 +00:00
Chris Lattner 0a71a9ac86 Fix Generic/2005-10-18-ZeroSizeStackObject.ll by not requesting a zero 
sized stack object if either the array size or the type size is zero.

llvm-svn: 23801
 2005-10-18 22:14:06 +00:00
Chris Lattner 84b36df7e9 new testcase 
llvm-svn: 23798
 2005-10-18 22:13:39 +00:00
Chris Lattner 8396a308a7 remove hack 
llvm-svn: 23797
 2005-10-18 22:11:42 +00:00
Chris Lattner 13a57822a1 This was never updated for the project makefile changes 
llvm-svn: 23790
 2005-10-18 18:50:26 +00:00
Chris Lattner 46a97ab3e8 This never got updated to reflect the project makefile changes 
llvm-svn: 23789
 2005-10-18 18:48:30 +00:00
Jim Laskey d812a2e449 Simple edits; remove unimplimented cases and clarify long haul SLU cases. 
llvm-svn: 23788
 2005-10-18 16:59:23 +00:00
Chris Lattner 5a2fb9787b Fix the JIT encoding of LWA, LD, STD, and STDU. 
llvm-svn: 23787
 2005-10-18 16:51:22 +00:00
Jim Laskey c6533006c8 Checking in first round of scheduling tablegen files. Not tied in as yet. 
llvm-svn: 23786
 2005-10-18 16:23:40 +00:00
Chris Lattner 53b9c3ad4c add a case 
llvm-svn: 23785
 2005-10-18 06:30:51 +00:00