Commit Graph

374842 Commits

Author SHA1 Message Date
Paul Walker b74c4dbb96 [SVE] Move INT_TO_FP i1 promotion into custom lowering.
AddPromotedToType is being used to legalise INT_TO_FP operations
when the source is a predicate. The point where this introduces
vector extends might cause problems in the future so this patch
falls back to manual promotion within custom lowering.

Differential Revision: https://reviews.llvm.org/D90093
2020-12-15 11:57:07 +00:00
Paul Walker 6d35bd1d48 [CodeGenPrepare] Update optimizeGatherScatterInst for scalable vectors.
optimizeGatherScatterInst does nothing specific to fixed length vectors
but uses FixedVectorType to extract the number of elements.  This patch
simply updates the code to use VectorType and getElementCount instead.

For testing I just copied Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
replacing `<4 x ` with `<vscale x 4`.

Differential Revision: https://reviews.llvm.org/D92572
2020-12-15 10:57:51 +00:00
Simon Pilgrim bd07092669 [X86] Remove trailing whitespace. NFC. 2020-12-15 10:11:38 +00:00
Simon Pilgrim 15a31389b2 [X86][AVX] LowerBUILD_VECTOR - reduce 256/512-bit build vectors with zero/undef upper elements + pad.
As discussed on D92645, we don't do a good job of recognising when we don't require the full width of a ymm/zmm build vector because the upper elements are undef/zero.

This commit allows us to make use of implicit zeroing of upper elements with AVX instructions, which we emulate in DAG with a INSERT_SUBVECTOR into the bottom of a undef/zero vector of the original type.

This exposed a limitation in getTargetConstantBitsFromNode which didn't extract bits from INSERT_SUBVECTORs of different element widths which I've included as well to prevent a couple of regressions.
2020-12-15 10:11:38 +00:00
Florian Hahn 8a7e770638
[LV] Add reduction test, which exposed a crash in a pending patch. 2020-12-15 09:42:00 +00:00
Florian Hahn 318f5798d8
[VPlan] Use VPDef for VPWidenGEPRecipe.
This patch turns updates VPWidenGEPRecipe to manage the value it defines
using VPDef. The VPValue is used  during VPlan construction and
codegeneration instead of the plain IR reference where possible.

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D90561
2020-12-15 09:30:14 +00:00
Florian Hahn ad1161f9b5
[VPlan] Use VPdef for VPWidenCall.
This patch turns updates VPWidenREcipe to manage the value it defines
using VPDef.

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D90559
2020-12-15 09:20:07 +00:00
Jan Svoboda 56c5548d7f [clang][cli] Squash multiple cc1 -fxxx-exceptions flags into single -exception-model=xxx option
This patch enables marshalling of the exception model options while enforcing their mutual exclusivity. The clang driver interface remains the same, this only affects the cc1 command line.

Depends on D93215.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D93216
2020-12-15 10:15:58 +01:00
Jan Svoboda 573255b47e [clang][cli] Squash exception model in LangOptions into one member
This squashes multiple members in LangOptions into one. This is leveraged in a follow-up patch that implements marshalling of related command-line options.

Depends on D93214.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D93215
2020-12-15 10:15:58 +01:00
Jan Svoboda f24e58df7d [clang][cli] Create accessors for exception models in LangOptions
This abstracts away the members that are being replaced in a follow-up patch.

Depends on D83979.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D93214
2020-12-15 10:15:58 +01:00
xndcn 9c328e7afa [clangd] Add hover info for `this` expr
How about add hover information for `this` expr?
It seems useful to show related information about the class for `this` expr sometimes.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D92041
2020-12-15 09:47:29 +01:00
Kazushi (Jam) Marukawa a2eb07aa55 [VE] Support atomic exchange instructions
Support atomic exchange and atomic compare and exchange instructions.
Change CAS and TS1AM instructions for ISel patterns.  Add selectADDRzi
pattern for them.  Add TS1AM pseudo instruction also for better ISel.
Add shouldExpandAtomicRMWInIR() function to expand all atomicrmw
instructions except atomicrmw xchg.  Add custom lower for i8/i16
atomicrmw xchg.  Modify replaceFI to support CAS/TS1AM instructions
which use "reg+disp" operands instead of "reg+imm+disp" operands.
And, add several regression tests to check the correctness.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93161
2020-12-15 17:43:11 +09:00
Hsiangkai Wang 14a91d676b [RISCV][NFC] Define scalable vectors for half types.
This is a preperation work for vfadd intrinsics.

Differential Revision: https://reviews.llvm.org/D93275
2020-12-15 16:23:22 +08:00
Georgii Rymar 83aea14ed6 [llvm-readelf] - Don't print OS/Processor specific prefix for known ELF file types.
This is a change suggested in post commit comments for
D93096 (https://reviews.llvm.org/D93096#2451796).

Imagine we want to add a custom OS specific ELF file type.
For that we can update the `ElfObjectFileType` array:

```
static const EnumEntry<unsigned> ElfObjectFileType[] = {
...
  {"Core",         "CORE (Core file)",         ELF::ET_CORE},
  {"MyType",       "MyType (my description)",     0xfe01},
};
```

The current code then might print:
```
OS Specific: (MyType (my description))
```

Though instead we probably would like to see a nicer output, e.g:
```
Type: MyType (my description)
```

To achieve that we can reorder the code slightly.

It is impossible to add a test I think, because we have no custom values in
the `ElfObjectFileType` array in LLVM.

Differential revision: https://reviews.llvm.org/D93217
2020-12-15 10:56:25 +03:00
Max Kazantsev 8b330f1f69 [SCEV] Add missing type check into getRangeForAffineNoSelfWrappingAR
We make type widening without checking if it's needed. Bail if the max
iteration count is wider than AR's type.
2020-12-15 14:50:32 +07:00
Amara Emerson a69b76c500 [GlobalISel][IRTranslator] Ensure branch probabilities are added when translating invoke edges.
This uses a straightforward port of findUnwindDestinations() from SelectionDAG.

Differential Revision: https://reviews.llvm.org/D93256
2020-12-14 23:36:54 -08:00
Kazu Hirata 504e4be2c1 [IR] Remove isPowerOf2ByteWidth
The predicate used to be used with the C backend, which was removed on
Mar 23, 2012 in commit 64a232343a.  It
seems to be unused since then.
2020-12-14 23:00:17 -08:00
Max Kazantsev 2fc2e6de82 [Test] Test on assertion failure with expensive SCEV range inference 2020-12-15 13:47:19 +07:00
Kazu Hirata ddc5a5920e [Analysis] Use llvm::erase_value (NFC) 2020-12-14 22:40:13 -08:00
Raul Tambre a72d462eb9 Re-apply "[CMake][compiler-rt][AArch64] Avoid preprocessing LSE builtins separately"
aa772fc85e (D92530) has landed fixing relocations on Darwin.
3000c19df6 (D93236) has landed working around an assembly parser bug on Darwin.
Previous quick-fix d9697c2e6b (D93198) included in this commit.

Invoking the preprocessor ourselves is fragile and would require us to replicate CMake's handling of definitions, compiler flags, etc for proper compatibility.
In my toolchain builds this notably resulted in a bunch of warnings from unused flags as my CMAKE_C_FLAGS includes CPU-specific optimization options.
Notably this part was already duplicating the logic for VISIBILITY_HIDDEN define.

Instead, symlink the files and set the proper set of defines on each.
This should also be faster as we avoid invoking the compiler multiple times.

Fixes https://llvm.org/PR48494

Differential Revision: https://reviews.llvm.org/D93278
2020-12-15 08:18:07 +02:00
Raul Tambre 3000c19df6 [Compiler-rt][AArch64] Workaround for .cfi_startproc assembler parser bug.
Put .cfi_startproc on a new line to avoid hitting the assembly parser bug in MasmParser::parseDirectiveCFIStartProc().

Reviewed By: tambre

Differential Revision: https://reviews.llvm.org/D93236
2020-12-15 08:14:42 +02:00
Med Ismail Bennani dc82890a77 [lldb/API] Expose Target::CreateBreakpoint(..., move_to_nearest_code) overload
This patch exposes the Target::CreateBreakpoint overload with the
boolean argument to move to the neareast code to the SBAPI.

This is useful when creating column breakpoints to restrict lldb's
resolution to the pointed source location, preventing it to go to the next
line.

rdar://72196842

Differential Revision: https://reviews.llvm.org/D93266

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2020-12-15 06:18:04 +01:00
Med Ismail Bennani 1d3f1eb855 Revert "[lldb/API] Expose Target::CreateBreakpoint(..., move_to_nearest_code) overload"
This reverts commit 04696ff002e7d311887b7b7e6e171340a0623dd9.

Exposing the LazyBool private type in SBTarget.h breaks some tests.
2020-12-15 06:18:04 +01:00
Hsiangkai Wang a6805a0e02 [RISCV] Define vadd/vsub/vrsub intrinsics and lower to V instructions.
This patch is based on the proposal from Roger Ferrer Ibanez.
http://lists.llvm.org/pipermail/llvm-dev/2020-October/145850.html

Differential Revision: https://reviews.llvm.org/D93013
2020-12-15 12:56:49 +08:00
LLVM GN Syncbot 086954412f [gn build] Port d2ed9d6b7e 2020-12-15 03:35:00 +00:00
Nico Weber a852ee199c Reland "[MachineDebugify] Insert synthetic DBG_VALUE instructions"
This reverts commit 841f9c937f.
The change landed many months ago; something else broke those tests.
2020-12-14 22:34:23 -05:00
Med Ismail Bennani 04701698eb [lldb/API] Expose Target::CreateBreakpoint(..., move_to_nearest_code) overload
This patch exposes the Target::CreateBreakpoint overload with the
boolean argument to move to the neareast code to the SBAPI.

This is useful when creating column breakpoints to restrict lldb's
resolution to the pointed source location, preventing it to go to the next
line.

rdar://72196842

Differential Revision: https://reviews.llvm.org/D93266

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2020-12-15 04:24:44 +01:00
Nico Weber 841f9c937f Revert "[MachineDebugify] Insert synthetic DBG_VALUE instructions"
This reverts commit 2a5675f11d.
The tests it adds fail: https://reviews.llvm.org/D78135#2453736
2020-12-14 22:14:48 -05:00
Nico Weber da2551f3d1 Revert "[Debugify] Support checking Machine IR debug info"
This reverts commit c4d2d4337d.
Necessary to revert 2a5675f11d.
2020-12-14 22:14:48 -05:00
Luo, Yuanke 18925dd872 [X86] Add test case for commit e52bc1d2bb.
Differential Revision: https://reviews.llvm.org/D93173
2020-12-15 11:14:16 +08:00
Nico Weber 7799ef7121 Revert "Lex: Migrate HeaderSearch::LoadedModuleMaps to FileEntryRef"
This reverts commit a40db5502b.
and follow-up d636b881bb

Somewhat speculative, likely broke check-clang on Windows:
https://reviews.llvm.org/D92975#2453482
2020-12-14 22:05:08 -05:00
Nico Weber c9ede6f336 Revert "[amdgpu] Default to code object v3"
This reverts commit 4b2e7d0215.
Breaks check-clang, see https://reviews.llvm.org/D93258#2453600
2020-12-14 22:01:26 -05:00
Qiu Chaofan 38b4442198 [NFC] [Legalizer] Use common method for expanding fp-to-int operands
Reviewed By: RKSimon, steven.zhang

Differential Revision: https://reviews.llvm.org/D92481
2020-12-15 10:45:40 +08:00
Rong Xu c36f31c4db [PGO] remove unintentional code in early commit
Remove unintentional code in
commit 54e03d [PGO] Verify BFI counts after loading profile data.
2020-12-14 18:41:49 -08:00
River Riddle d7eba20052 [mlir][Inliner] Refactor the inliner to use nested pass pipelines instead of just canonicalization
Now that passes have support for running nested pipelines, the inliner can now allow for users to provide proper nested pipelines to use for optimization during inlining. This revision also changes the behavior of optimization during inlining to optimize before attempting to inline, which should lead to a more accurate cost model and prevents the need for users to schedule additional duplicate cleanup passes before/after the inliner that would already be run during inlining.

Differential Revision: https://reviews.llvm.org/D91211
2020-12-14 18:09:47 -08:00
Siva Chandra f0cd6aa614 [libc] Add remainder[f|l] and remquo[f|l] to the list of aarch64 entrypoints. 2020-12-14 18:06:05 -08:00
Xiang1 Zhang c4d2d4337d [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D91595
2020-12-14 17:53:46 -08:00
Siva Chandra b1067a9b3c [libc][NFC] Skip adding dummy targets for skipped unit tests. 2020-12-14 17:52:47 -08:00
Xiang1 Zhang fc0f4010bb Revert "[Debugify] Support checking Machine IR debug info"
This reverts commit 57a3d9ec4a.
2020-12-14 17:48:49 -08:00
Cheng Wang af68c3b892 [libc] Add memcmp implementation.
Reviewed By: gchatelet

Differential Revision: https://reviews.llvm.org/D93009
2020-12-15 09:47:29 +08:00
Xiang1 Zhang 57a3d9ec4a [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D95195
2020-12-14 17:38:01 -08:00
Craig Topper b094eaa392 [RISCV] Prevent assertion in the assembler if vmerge or vfmerge are given a V0 destination. 2020-12-14 17:22:55 -08:00
Craig Topper 2cf12ae0cc [RISCV] Handle Match_InvalidSImm5 in RISCVAsmParser::MatchAndEmitInstruction 2020-12-14 17:22:55 -08:00
Craig Topper 413596ee45 [RISCV] Teach debug output from assembly parser to print register names instead of enum values. 2020-12-14 17:22:55 -08:00
Alexander Kornienko 9c49b0bba0 Remove the ast_type_traits namespace.
This is the final cleanup after https://reviews.llvm.org/D74499

Reviewed By: steveire

Differential Revision: https://reviews.llvm.org/D93244
2020-12-15 02:16:12 +01:00
Siva Chandra Reddy b266c818e7 [libc][Obvious] Mark functions in DummyFEnv.h as static inline. 2020-12-14 17:12:54 -08:00
Jon Chesterfield 4b2e7d0215 [amdgpu] Default to code object v3
[amdgpu] Default to code object v3
v4 is not yet readily available, and doesn't appear
to be implemented in the back end

Reviewed By: t-tye

Differential Revision: https://reviews.llvm.org/D93258
2020-12-15 01:11:09 +00:00
Reid Kleckner d2ed9d6b7e Revert "ADT: Migrate users of AlignedCharArrayUnion to std::aligned_union_t, NFC"
We determined that the MSVC implementation of std::aligned* isn't suited
to our needs. It doesn't support 16 byte alignment or higher, and it
doesn't really guarantee 8 byte alignment. See
https://github.com/microsoft/STL/issues/1533

Also reverts "ADT: Change AlignedCharArrayUnion to an alias of std::aligned_union_t, NFC"

Also reverts "ADT: Remove AlignedCharArrayUnion, NFC" to bring back
AlignedCharArrayUnion.

This reverts commit 4d8bf870a8.

This reverts commit d10f9863a5.

This reverts commit 4b5dc150b9.
2020-12-14 17:04:06 -08:00
Changpeng Fang ce0c0013d8 AMDGPU: If a store defines (alias) a load, it clobbers the load.
Summary:
 If a store defines (must alias) a load, it clobbers the load.

Fixes: SWDEV-258915

Reviewers:
  arsenm

Differential Revision:
  https://reviews.llvm.org/D92951
2020-12-14 16:34:32 -08:00
Nemanja Ivanovic eed0b9acdf [PowerPC] Temporarily disable asan longjmp tests
Commit bfdc19e778 seems to have broken
some PPC bots with a couple of asan test cases. Disable those test
cases for now until I can resolve the issue.
2020-12-14 18:22:08 -06:00