Commit Graph

7954 Commits

Author SHA1 Message Date
Gus Smith 744146f60b [MLIR][Sparse] Refactor lattice code into its own file
Moves iteration lattice/merger code into new SparseTensor/Utils directory. A follow-up CL will add lattice/merger unit tests.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D104757
2021-06-24 23:03:44 +00:00
thomasraoux 1a86559276 [mlir][VectorToGPU] Add conversion for scf::For op with Matrix operands
Differential Revision: https://reviews.llvm.org/D104134
2021-06-24 15:42:28 -07:00
thomasraoux 6413226dce [mlir][VectorToGPU] Add conversion for splat constant to MMA const matrix
Differential Revision: https://reviews.llvm.org/D104133
2021-06-24 15:38:12 -07:00
Martin Storsjö 9264728450 [mlir] Rename StringRef _lower() method calls to _insensitive() 2021-06-25 00:22:01 +03:00
Mehdi Amini 652f4b5140 Attempt to disable MLIR JIT tests on PowerPC to unbreak the bot
This is until we figure how to turn on the large code size model.
2021-06-24 17:48:46 +00:00
William S. Moses 44985872b8 [MLIR][SCF] Inline single block ExecuteRegionOp
This commit adds a canonicalization pass which inlines any single block execute region

Differential Revision: https://reviews.llvm.org/D104865
2021-06-24 13:15:26 -04:00
Alex Zinenko 10b8eb482c [mlir] remove repeated use of TypeToLLVM.cpp in cmake targets 2021-06-24 18:34:49 +02:00
William S. Moses 929189a499 [MLIR][LLVM] Expose type translator from LLVM to MLIR Type
This commit moves the type translator from LLVM to MLIR to a public header for use by external projects or other code.

Unlike a previous attempt (https://reviews.llvm.org/D104726), this patch moves the type conversion into separate files which remedies the linker error which was only caught by CI.

Differential Revision: https://reviews.llvm.org/D104834
2021-06-24 12:06:34 -04:00
Nicolas Vasilache 57fe7fd37d [mlir][Linalg] Add support for scf::ForOp in comprehensive bufferization (7/n)
scf::ForOp bufferization analysis proceeds just like for any other op (including FuncOp) at its boundaries; i.e. if:

1. The tensor operand is inplaceable.
2. The matching result has no subsequent read (i.e. all reads dominate the scf::ForOp).
3. In  and does not create a RAW interference.

then it can bufferize inplace.

Still there are a few differences:

1. bbArgs for an scf::ForOp are always considered inplaceable when seen from ops inside the body. This is because a) either the matching tensor operand is not inplaceable and an alloc will be inserted (which makes bbArg itself inplaceable); or b) the tensor operand and bbArg are both already inplaceable.
2. Bufferization within the scf::ForOp body has implications to the outside world : the scf.yield terminator may well ping-pong values of the same type. This muddies the water for alias analysis and is not supported atm. Such cases result in a pass failure.

Differential revision: https://reviews.llvm.org/D104490
2021-06-24 15:03:28 +00:00
Tobias Gysi 78dc1e4978 [mlir][linalg][python] Add shape-only tensor support to OpDSL.
Add an index_dim annotation to specify the shape to loop mapping of shape-only tensors. A shape-only tensor serves is not accessed withing the body of the operation but is required to span the iteration space of certain operations such as pooling.

Differential Revision: https://reviews.llvm.org/D104767
2021-06-24 14:11:15 +00:00
Tobias Gysi 25bb616490 [mlir][linalg][python] Add attribute support to the YAML codegen.
Extend the yaml code generation to support the index attributes that https://reviews.llvm.org/D104711 added to the OpDSL.

Differential Revision: https://reviews.llvm.org/D104712
2021-06-24 12:33:48 +00:00
Nicolas Vasilache e3ea2d7061 [mlir][Linalg] Add basic lowering test to library calls
This test shows how convert-linalg-to-std rewrites named linalg ops as library calls.
This can be coupled with a C++ shim to connect to existing libraries such as https://gist.github.com/nicolasvasilache/691ef992404c49dc9b5d543c4aa6db38.
Everything can then be linked together with mlir-cpu-runner and MLIR can call C++ (which can itself call MLIR if needed).

This should evolve into specific rewrite patterns that can be applied on op instances independently rather than having to use a full conversion.

Differential Revision: https://reviews.llvm.org/D104842
2021-06-24 10:56:48 +00:00
Tobias Gysi 31f888ea9a [mlir][linalg][python] Add attribute support to the OpDSL.
Extend the OpDSL with index attributes. After tensors and scalars, index attributes are the third operand type. An index attribute represents a compile-time constant that is limited to index expressions. A use cases are the strides and dilations defined by convolution and pooling operations.

The patch only updates the OpDSL. The C++ yaml codegen is updated by a followup patch.

Differential Revision: https://reviews.llvm.org/D104711
2021-06-24 09:40:32 +00:00
Abid Malik c2fd2b5194 [MLIR][OpenMP]Basic OpenMP target operation
This includes a basic implementation for the OpenMP target
operation. Currently, the if, thread_limit, private, shared, device, and nowait clauses are included in this implementation.

Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>

Reviewed By: ftynse, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D102816
2021-06-24 09:58:25 +01:00
Anthony Canino 3f429e82d3 Implement an scf.for range folding optimization pass.
In cases where arithmetic (addi/muli) ops are performed on an scf.for loops induction variable with a single use, we can fold those ops directly into the scf.for loop.

For example, in the following code:

```
scf.for %i = %c0 to %arg1 step %c1 {
  %0 = addi %arg2, %i : index
  %1 = muli %0, %c4 : index
  %2 = memref.load %arg0[%1] : memref<?xi32>
  %3 = muli %2, %2 : i32
  memref.store %3, %arg0[%1] : memref<?xi32>
}
```

we can lift `%0` up into the scf.for loop range, as it is the only user of %i:

```
%lb = addi %arg2, %c0 : index
%ub = addi %arg2, %i : index
scf.for %i = %lb to %ub step %c1 {
  %1 = muli %0, %c4 : index
  %2 = memref.load %arg0[%1] : memref<?xi32>
  %3 = muli %2, %2 : i32
  memref.store %3, %arg0[%1] : memref<?xi32>
}
```

Reviewed By: mehdi_amini, ftynse, Anthony

Differential Revision: https://reviews.llvm.org/D104289
2021-06-24 01:07:28 +00:00
William S. Moses 71f6f7e00a Revert "[MLIR][LLVM] Expose type translator from LLVM to MLIR Type"
This reverts commit 5616a79398.
2021-06-23 13:27:13 -04:00
William S. Moses 5616a79398 [MLIR][LLVM] Expose type translator from LLVM to MLIR Type
This commit moves the type translator from LLVM to MLIR to a public header for use by external projects or other code

Differential Revision: https://reviews.llvm.org/D104726
2021-06-23 13:22:50 -04:00
Nicolas Vasilache f0d43a29e3 [mlir][LLVMIR] Fold ExtractValueOp coming from InsertValueOp
Differential Revision: https://reviews.llvm.org/D104769
2021-06-23 10:04:24 +00:00
Tobias Gysi f1844f15c1 [mlir][linalg] Change the FillOp library call signature.
Adapt the FillOp library call signature to the updated operand order introduced in https://reviews.llvm.org/D10412. The patch reverts the special treatment of FillOp in LinalgToStandard.

Differential Revision: https://reviews.llvm.org/D104360
2021-06-23 09:37:14 +00:00
Tobias Gysi 7cef24ee83 [mlir][linalg] Adapt the FillOp builder signature.
Change the build operand order from output, value to value, output. The patch makes the argument order consistent with the pretty printed order updated by https://reviews.llvm.org/D104356.

Differential Revision: https://reviews.llvm.org/D104359
2021-06-23 08:06:43 +00:00
Tobias Gysi a21a6f51bc [mlir][linalg] Change the pretty printed FillOp operand order.
The patch changes the pretty printed FillOp operand order from output, value to value, output. The change is a follow up to https://reviews.llvm.org/D104121 that passes the fill value using a scalar input instead of the former capture semantics.

Differential Revision: https://reviews.llvm.org/D104356
2021-06-23 07:03:00 +00:00
Vinayaka Bandishti a873b6d466 [MLIR] Generalize detecting mods during slice computing
During slice computation of affine loop fusion, detect one id as the mod
of another id w.r.t a constant in a more generic way. Restrictions on
co-efficients of the ids is removed. Also, information from the
previously calculated ids is used for simplification of affine
expressions, e.g.,

If `id1` = `id2`,
  `id_n - divisor * id_q - id_r + id1 - id2 = 0`, is simplified to:
  `id_n - divisor * id_q - id_r = 0`.

If `c` is a non-zero integer,
  `c*id_n - c*divisor * id_q - c*id_r = 0`, is simplified to:
  `id_n - divisor * id_q - id_r = 0`.

Reviewed By: bondhugula, ayzhuang

Differential Revision: https://reviews.llvm.org/D104614
2021-06-23 12:29:34 +05:30
Vinayaka Bandishti 0e55112242 [NFC][PDL] Fix documentation typo, redundant test
Correct a documentation typo, and delete a duplicate test in
`pdl-to-pdl-interp-rewriter.mlir`.

Reviewed By: pr4tgpt, bondhugula, rriddle

Differential Revision: https://reviews.llvm.org/D104688
2021-06-23 12:27:12 +05:30
Jack Xia 4666f309df Fix typo in Toy Tutorial Ch-4
multiple_transpose -> multiply_transpose
2021-06-23 03:33:34 +00:00
River Riddle 84bd07aff9 [mlir] Fix GCC5 build after D104516
GCC5 isn't able to implicitly capture `this` properly in an `auto` lambda.
2021-06-23 03:16:34 +00:00
River Riddle c43e8c0eef [mlir][OpDefGen] Don't emit attribute name getters when there are no attributes
This avoids generating otherwise unnecessary methods.
2021-06-23 03:03:54 +00:00
River Riddle 0246dd3004 [mlir] Fix slicing-utils.mlir test after D104516
Remove the duplicate unnecessary CHECK labels at the bottom of the file.
2021-06-23 02:52:17 +00:00
River Riddle 6569cf2a44 [mlir] Add a ThreadPool to MLIRContext and refactor MLIR threading usage
This revision refactors the usage of multithreaded utilities in MLIR to use a common
thread pool within the MLIR context, in addition to a new utility that makes writing
multi-threaded code in MLIR less error prone. Using a unified thread pool brings about
several advantages:

* Better thread usage and more control
We currently use the static llvm threading utilities, which do not allow multiple
levels of asynchronous scheduling (even if there are open threads). This is due to
how the current TaskGroup structure works, which only allows one truly multithreaded
instance at a time. By having our own ThreadPool we gain more control and flexibility
over our job/thread scheduling, and in a followup can enable threading more parts of
the compiler.

* The static nature of TaskGroup causes issues in certain configurations
Due to the static nature of TaskGroup, there have been quite a few problems related to
destruction that have caused several downstream projects to disable threading. See
D104207 for discussion on some related fallout. By having a ThreadPool scoped to
the context, we don't have to worry about destruction and can ensure that any
additional MLIR thread usage ends when the context is destroyed.

Differential Revision: https://reviews.llvm.org/D104516
2021-06-23 01:29:24 +00:00
River Riddle 18465bcf4d [mlir][NFC] Cleanup the MLIRTestReducer pass 2021-06-23 01:29:24 +00:00
River Riddle 36b538f583 [mlir][NFC] Move several small methods from .cpp to .h to allow more aggressive inlining
Differential Revision: https://reviews.llvm.org/D104756
2021-06-23 00:52:26 +00:00
Aart Bik b13cbf537f [mlir][sparse] integration test for "simply dynamic" sparse output tensors
Reviewed By: gussmith23

Differential Revision: https://reviews.llvm.org/D104583
2021-06-22 14:28:02 -07:00
River Riddle 6000749804 [mlir] Fix build on gcc-5 after D104167 2021-06-22 21:16:02 +00:00
Aart Bik 36b66ab9ed [mlir][sparse] add support for "simply dynamic" sparse tensor expressions
Slowly we are moving toward full support of sparse tensor *outputs*. First
step was support for all-dense annotated "sparse" tensors. This step adds
support for truly sparse tensors, but only for operations in which the values
of a tensor change, but not the nonzero structure (this was refered to as
"simply dynamic" in the [Bik96] thesis).

Some background text was posted on discourse:
https://llvm.discourse.group/t/sparse-tensors-in-mlir/3389/25

Reviewed By: gussmith23

Differential Revision: https://reviews.llvm.org/D104577
2021-06-22 13:37:32 -07:00
River Riddle 87e59e47e9 [mlir] Remove the Identifier ThreadLocalCache from MLIRContext
This used to be important for reducing lock contention when accessing identifiers, but
the cost of the cache can be quite large if parsing in a multi-threaded context. After
D104167, the win of keeping a cache is not worth the cost.

Differential Revision: https://reviews.llvm.org/D104737
2021-06-22 19:56:05 +00:00
River Riddle e4e31e19bb [mlir][OpGen] Cache Identifiers for known attribute names in AbstractOperation.
Operations currently rely on the string name of attributes during attribute lookup/removal/replacement, in build methods, and more. This unfortunately means that some of the most used APIs in MLIR require string comparisons, additional hashing(+mutex locking) to construct Identifiers, and more. This revision remedies this by caching identifiers for all of the attributes of the operation in its corresponding AbstractOperation. Just updating the autogenerated usages brings up to a 15% reduction in compile time, greatly reducing the cost of interacting with the attributes of an operation. This number can grow even higher as we use these methods in handwritten C++ code.

Methods for accessing these cached identifiers are exposed via `<attr-name>AttrName` methods on the derived operation class. Moving forward, users should generally use these methods over raw strings when an attribute name is necessary.

Differential Revision: https://reviews.llvm.org/D104167
2021-06-22 19:56:05 +00:00
Butygin 82c1fb5750 [mlir] Fix invalid handling of AllocOp symbolOperands by SimplifyAllocConst.
symbolOperands were completely ignored by SimplifyAllocConst. Also, slightly improved diagnostic message for verifyAllocLikeOp.

Differential Revision: https://reviews.llvm.org/D104260
2021-06-22 15:39:53 +03:00
Stephan Herhut bb6afc69b2 [mlir][memref] Add memref.copy operation
As the name suggests, it copies from one memref to another.

Differential Revision: https://reviews.llvm.org/D104657
2021-06-22 13:21:44 +02:00
Matthias Springer 060208b4c8 [mlir][NFC] Move SubTensorOp and SubTensorInsertOp to TensorDialect
The main goal of this commit is to remove the dependency of Standard dialect on the Tensor dialect.

* Rename SubTensorOp -> tensor.extract_slice, SubTensorInsertOp -> tensor.insert_slice.
* Some helper functions are (already) duplicated between the Tensor dialect and the MemRef dialect. To keep this commit smaller, this will be cleaned up in a separate commit.
* Additional dialect dependencies: Shape --> Tensor, Tensor --> Standard
* Remove dialect dependencies: Standard --> Tensor
* Move canonicalization test cases to correct dialect (Tensor/MemRef).

Note: This is a fixed version of https://reviews.llvm.org/D104499, which was reverted due to a missing update to two CMakeFile.txt.

Differential Revision: https://reviews.llvm.org/D104676
2021-06-22 17:55:53 +09:00
Tobias Gysi 4882cacf12 [mlir][linalg] Adapt FillOp to use a scalar operand.
Adapt the FillOp definition to use a scalar operand instead of a capture. This patch is a follow up to https://reviews.llvm.org/D104109. As the input operands are in front of the output operands the patch changes the internal operand order of the FillOp. The pretty printed version of the operation remains unchanged though. The patch also adapts the linalg to standard lowering to ensure the c signature of the FillOp remains unchanged as well.

Differential Revision: https://reviews.llvm.org/D104121
2021-06-22 06:44:52 +00:00
Matthias Springer 2ba387a316 [mlir][linalg] Fusion of PadTensorOp
Note: This commit (and previous ones) implements the same functionality as https://reviews.llvm.org/D103243 (which is abandoned).

Differential Revision: https://reviews.llvm.org/D104683
2021-06-22 11:48:49 +09:00
Rob Suderman ad1a9d629b [mlir][tosa] Enable tosa.div for TosaMakeBroadcastable
TosaMakeBroadcastable needs to include tosa.div, which was added later in the
specification.

Reviewed By: sjarus, NatashaKnk

Differential Revision: https://reviews.llvm.org/D104157
2021-06-21 16:12:11 -07:00
Ahmed S. Taei 7e2d672a67 Add polynomial approximation for trigonometric sine and cosine functions
The approximation relays on range reduced version y \in [0, pi/2]. An input x will have
the property that sin(x) = sin(y), -sin(y), cos(y), -cos(y) depends on which quadrable x
is in, where sin(y) and cos(y) are approximated with 5th degree polynomial (of x^2).
As a result a single pattern can be used to compute approximation for both sine and cosine.

Reviewed By: ezhulenev

Differential Revision: https://reviews.llvm.org/D104582
2021-06-21 13:00:33 -07:00
thomasraoux 1244bca53f [mlir][vector] Support distributing transfer op with permutation map
Differential Revision: https://reviews.llvm.org/D104263
2021-06-21 12:56:08 -07:00
Mehdi Amini 60d97fb4cf Revert "[mlir][NFC] Move SubTensorOp and SubTensorInsertOp to TensorDialect"
This reverts commit 83bf801f5f.

This breaks the build with -DBUILD_SHARED_LIBS=ON
2021-06-21 16:39:24 +00:00
Matthias Springer 83bf801f5f [mlir][NFC] Move SubTensorOp and SubTensorInsertOp to TensorDialect
The main goal of this commit is to remove the dependency of Standard dialect on the Tensor dialect.

* Rename ops: SubTensorOp --> ExtractTensorOp, SubTensorInsertOp --> InsertTensorOp
* Some helper functions are (already) duplicated between the Tensor dialect and the MemRef dialect. To keep this commit smaller, this will be cleaned up in a separate commit.
* Additional dialect dependencies: Shape --> Tensor, Tensor --> Standard
* Remove dialect dependencies: Standard --> Tensor
* Move canonicalization test cases to correct dialect (Tensor/MemRef).

Differential Revision: https://reviews.llvm.org/D104499
2021-06-22 00:11:21 +09:00
Alexander Belyaev 2e972e366a [mlir] Remove "getNumPayloadInductionVariables".
This method always returns 0 after
https://reviews.llvm.org/rG7cddf56d608f07b8e49f7e2eeb4a20082611adb6

Differential Revision: https://reviews.llvm.org/D104645
2021-06-21 16:38:47 +02:00
Vladislav Vinogradov 628e136738 [mlir][ODS] Fix copy ctor for generate Pass classes
Redirect the copy ctor to the actual class instead of
overwriting it with `TypeID` based ctor.

This allows the final Pass classes to have extra fields and logic for their copy.

Reviewed By: lattner

Differential Revision: https://reviews.llvm.org/D104302
2021-06-21 14:07:31 +03:00
Benjamin Kramer 596989da65 [mlir][Linalg] Silence warnings in Release builds. NFC.
mlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp:940:8: warning: unused variable 'opProducesRootRead' [-Wunused-variable]
  bool opProducesRootRead =
       ^
mlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp:942:8: warning: unused variable 'opProducesRootWrite' [-Wunused-variable]
  bool opProducesRootWrite =
       ^
mlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp:1498:11: warning: unused variable 'resultNumber' [-Wunused-variable]
  int64_t resultNumber = result.getResultNumber();
          ^
mlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp:1497:11: warning: unused variable 'operandNumber' [-Wunused-variable]
  int64_t operandNumber = operand.getOperandNumber();
          ^
mlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp:267:20: warning: unused function 'getInPlace' [-Wunused-function]
static InPlaceSpec getInPlace(Value v) {
                   ^
2021-06-21 12:56:41 +02:00
Matthias Springer 66f878cee9 [mlir][NFC] Remove Standard dialect dependency on MemRef dialect
* Remove dependency: Standard --> MemRef
* Add dependencies: GPUToNVVMTransforms --> MemRef, Linalg --> MemRef, MemRef --> Tensor
* Note: The `subtensor_insert_propagate_dest_cast` test case in MemRef/canonicalize.mlir will be moved to Tensor/canonicalize.mlir in a subsequent commit, which moves over the remaining Tensor ops from the Standard dialect to the Tensor dialect.

Differential Revision: https://reviews.llvm.org/D104506
2021-06-21 17:55:23 +09:00
Matthias Springer 225b960cfc [mlir][linalg] Support low padding in subtensor(pad_tensor) lowering
Differential Revision: https://reviews.llvm.org/D104591
2021-06-21 16:34:26 +09:00