Commit Graph

287707 Commits

Author SHA1 Message Date
Fangrui Song b72daf00f4 [ELF] Increase NextGroupId with --end-group
Reviewers: ruiu, espindola

Subscribers: emaste, arichardson, llvm-commits

Differential Revision: https://reviews.llvm.org/D45846

llvm-svn: 330379
2018-04-19 23:23:23 +00:00
Saleem Abdulrasool 3fe5b7a497 Implement proper support for `-falign-functions`
This implements support for the previously ignored flag
`-falign-functions`.  This allows the frontend to request alignment on
function definitions in the translation unit where they are not
explicitly requested in code.  This is compatible with the GCC behaviour
and the ICC behaviour.

The scalar value passed to `-falign-functions` aligns functions to a
power-of-two boundary.  If flag is used, the functions are aligned to
16-byte boundaries.  If the scalar is specified, it must be an integer
less than or equal to 4096.  If the value is not a power-of-two, the
driver will round it up to the nearest power of two.

llvm-svn: 330378
2018-04-19 23:14:57 +00:00
Artem Dergachev 72da02fc30 [CFG] [analyzer] Don't treat argument constructors as temporary constructors.
Function argument constructors (that are used for passing objects into functions
by value) are completely unlike temporary object constructors, but we were
treating them as such because they are also wrapped into a CXXBindTemporaryExpr.

This patch adds a partial construction context layer for call argument values,
but doesn't proceed to transform it into an actual construction context yet.
This is tells the clients that we aren't supporting these constructors yet.

Differential Revision: https://reviews.llvm.org/D45650

llvm-svn: 330377
2018-04-19 23:09:22 +00:00
Kuba Mracek 1707fa3374 [sanitizer] Generalize atomic_uint8_t, atomic_uint16_t, ... into a template. NFC.
Differential Revision: https://reviews.llvm.org/D44246

llvm-svn: 330376
2018-04-19 23:00:43 +00:00
Artem Dergachev f7281b4752 [analyzer] RetainCount: Accept more "safe" CFRetain wrappers.
r315736 added support for the misplaced CF_RETURNS_RETAINED annotation on
CFRetain() wrappers. It works by trusting the function's name (seeing if it
confirms to the CoreFoundation naming convention) rather than the annotation.

There are more false positives caused by users using a different naming
convention, namely starting the function name with "retain" or "release"
rather than suffixing it with "retain" or "release" respectively.

Because this isn't according to the naming convention, these functions
are usually inlined and the annotation is therefore ignored, which is correct.
But sometimes we run out of inlining stack depth and the function is
evaluated conservatively and then the annotation is trusted.

Add support for the "alternative" naming convention and test the situation when
we're running out of inlining stack depth.

rdar://problem/18270122

Differential Revision: https://reviews.llvm.org/D45117

llvm-svn: 330375
2018-04-19 23:00:22 +00:00
Sam Clegg 0dbe57e752 [WebAssembly] Fix bug where reloc addends were written as unsigned
Relocation addends can be negative so should be written as
signed LEBs. This bug meant that writing value between 64
and 128 would be incorrectly interpreted as negative by the
object file readers.

Differential Revision: https://reviews.llvm.org/D45825

llvm-svn: 330374
2018-04-19 22:48:03 +00:00
Jessica Paquette 1eca23bdd8 [MachineOutliner] NFC: Move EnableLinkOnceODROutlining into MachineOutliner.cpp
This moves the EnableLinkOnceODROutlining flag from TargetPassConfig.cpp into
MachineOutliner.cpp. It also removes OutlineFromLinkOnceODRs from the
MachineOutliner constructor. This is now handled by the moved command-line
flag.

llvm-svn: 330373
2018-04-19 22:17:07 +00:00
Reid Kleckner 6a2a5e0abb Don't do aligned allocations on MSVCRT before 19.12 (update 15.3)
Reviewers: EricWF, pcc

Subscribers: christof, cfe-commits

Differential Revision: https://reviews.llvm.org/D45836

llvm-svn: 330372
2018-04-19 22:12:10 +00:00
Simon Pilgrim 0a6bfb1843 [llvm-mca][X86] Add prefetch instruction resource tests
llvm-svn: 330371
2018-04-19 22:11:58 +00:00
Sam Clegg f009da2448 [WebAssembly] Enabled -triple=wasm32-unknown-unknown-wasm path using ELF directive parser.
This is a temporary solution until a proper WASM implementation of
MCAsmParserExtension is in place, but at least for now will unblock this
path.

Added test to make sure this path works with the WASM Assembler.

Patch By Wouter van Oortmerssen!

Differential Revision: https://reviews.llvm.org/D45386

llvm-svn: 330370
2018-04-19 22:00:53 +00:00
Rafael Espindola 991c1cd5f7 Add a test. NFC.
We have relatively few tests on the contents of non alloc
sections. This one would have found a bug in a patch I am working on.

llvm-svn: 330369
2018-04-19 21:58:28 +00:00
Sanjay Patel ad8976db16 [Reassociate] add baseline tests for binop swapping; NFC
Similar to rL330086, I don't know if we want to do these 
transforms here, but we might as well have the tests
here either way to show that this pass is missing 
potential functionality (intentionally or not).

llvm-svn: 330368
2018-04-19 21:56:17 +00:00
Peter Collingbourne be084eca5b COFF: Remove OutputSection::getPermissions() and getCharacteristics().
All callers can just access the header directly.

Differential Revision: https://reviews.llvm.org/D45800

llvm-svn: 330367
2018-04-19 21:48:37 +00:00
Simon Pilgrim 7209117868 [llvm-mca][FMA] Add FMA resource tests
llvm-svn: 330366
2018-04-19 21:32:22 +00:00
Stanislav Mekhanoshin 160f85794d [AMDGPU] Use packed literals with zero either lower or hi part
Differential Revision: https://reviews.llvm.org/D45790

llvm-svn: 330365
2018-04-19 21:16:50 +00:00
Gerolf Hoflehner bf26d54047 [llvm-objdump] Issue error message when object file cannot be created
llvm-svn: 330364
2018-04-19 20:48:35 +00:00
Craig Topper 6496d51284 [X86] Remove non-existant instruction name from X86DisassemblerTables.cpp.
This instruction was removed a long time so we don't need to check for it here.

llvm-svn: 330363
2018-04-19 20:44:15 +00:00
Jin Lin 585f2699cf Refine the loop rotation's API
Summary:
The following changes addresses the following two issues.

1) The existing loop rotation pass contains both loop latch simplification and loop rotation. So one flag RotationOnly is added to be passed to the loop rotation pass.
2) The threshold value is initialized with MAX_UINT since the loop rotation utility should not have threshold limit.

Reviewers: dmgreen, efriedma

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D45582

llvm-svn: 330362
2018-04-19 20:29:43 +00:00
Peter Collingbourne fa322abee9 COFF: Rename Chunk::getPermissions to getOutputCharacteristics.
In an upcoming change I will need to make a distinction between section
type (code, data, bss) and permissions. The term that I use for both
of these things is "output characteristics".

Differential Revision: https://reviews.llvm.org/D45799

llvm-svn: 330361
2018-04-19 20:03:24 +00:00
Reid Kleckner 317a6ddea7 Remove impossible _MSC_VER check
Summary:
It is immediately preceded by this check:
  #if _MSC_VER < 1900
  #error "MSVC versions prior to Visual Studio 2015 are not supported"
  #endif

Reviewers: EricWF

Subscribers: christof, cfe-commits

Differential Revision: https://reviews.llvm.org/D45829

llvm-svn: 330360
2018-04-19 19:40:12 +00:00
Lang Hames ee68ec06a1 [ORC] Fix an assertion condition from r329934.
Thanks to Alexander Ivchenko for finding the issue!

llvm-svn: 330359
2018-04-19 19:30:35 +00:00
Craig Topper bc895a3afc [X86] Enable popcnt false dependency breaking on Silvermont and Goldmont.
Silvermont and Goldmont have the same issue on popcnt as Sandy Bridge, Haswell, Broadwell, and Skylake. Believe it is fixed in Goldmont Plus.

llvm-svn: 330358
2018-04-19 19:25:24 +00:00
Chandler Carruth 32e62f9c5b [PM/LoopUnswitch] Detect irreducible control flow within loops and skip unswitching non-trivial edges.
Summary:
This fixes the bug pointed out in review with non-trivial unswitching.

This also provides a basis that should make it pretty easy to finish
fleshing out a routine to scan an entire function body for irreducible
control flow, but this patch remains minimal for disabling loop
unswitch.

Reviewers: sanjoy, fedor.sergeev

Subscribers: mcrosier, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D45754

llvm-svn: 330357
2018-04-19 18:44:25 +00:00
Lang Hames 9bbd653084 [ORC] Make VSO symbol resolution/finalization operations private.
This forces these operations to be carried out via a
MaterializationResponsibility instance, ensuring responsibility is explicitly
tracked.

llvm-svn: 330356
2018-04-19 18:42:49 +00:00
Kostya Kortchinsky 46eab8d9fe [sanitizer] Minor refactor of some ReservedAddressRange functions
Summary:
Some of the functions had spurious conditional statements and checks, and some
intermediary variables that I feel made the code more complicated than it needs
to be. Also, when unmapping the whole range, the range size would be 0, but
the base was set to the address of the end of the range, which sounds prone to
error. I think nulling out the base in this scenario is a better way to go.

Reviewers: alekseyshl, flowerhack

Reviewed By: alekseyshl

Subscribers: kubamracek, delcypher, #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D45775

llvm-svn: 330355
2018-04-19 18:38:15 +00:00
Adrian McCarthy 4ee16bfff7 Fix narrowing warning by appending `f` to literal constant.
llvm-svn: 330354
2018-04-19 18:31:57 +00:00
David Zarzycki d488daa032 [UnitTests] NFC/build-perf: Break up nontrivial compile jobs
RecursiveASTVisitorTest.cpp is one of the longest compile jobs and a
build bottleneck on many-core machines. This patch breaks that file and
some peer files up into smaller files to increase build concurrency and
overall rebuild performance.

llvm-svn: 330353
2018-04-19 18:19:02 +00:00
Simon Pilgrim 4a486c13fa [llvm-mca][X86] Add resource test for every out-of-order scheduler model
I've copied and regenerated a resource file from btver2 to every x86 scheduler model supported by llvm-mca so we have at least some basic coverage.

For most this has been the avx1 tests, but for silvermont I've used sse42 as thats the latest it supports.

More will be added later.

llvm-svn: 330352
2018-04-19 18:08:10 +00:00
Simon Pilgrim 4ba057dbd1 [X86][SLM] Fix typo using SandyBridge resources.
Luckily this was on instructions not supported on Silvermont....

llvm-svn: 330351
2018-04-19 18:01:52 +00:00
Rafael Espindola 4809e2c11d Define InputSection::getOffset inline.
This is much simpler than the other section types and there are many
places where the section type is statically know.

llvm-svn: 330350
2018-04-19 18:00:46 +00:00
Craig Topper b5f2659130 [X86] Correct the scheduling data for register forms of XCHG and XADD on Intel CPUs.
The XCHG16rr/XCHG32rr/XCHG64rr instructions should be 3 uops just like XCHG8rr. I believe they're just implemented as 3 move uops with a temporary register.

XADD is probably 2 moves and an add also using a temporary register.

Change the latency for both from 2 cycles to 3 cycles. Only 2 of the uops are serialized in their execution, the move into the temporary and the move out of the temporary. The move from one GPR to the other should be able to go in parallel with this if there are ALU resources available.

llvm-svn: 330349
2018-04-19 18:00:17 +00:00
Sanjay Patel a201787fd7 [Reassociate] fix formatting; NFC
llvm-svn: 330348
2018-04-19 17:56:36 +00:00
Simon Pilgrim 5e492d29a3 [X86] Merge some MMX instregex
There's a lot more but I'd prefer focussing on removing unnecessary InstRWs first.

llvm-svn: 330347
2018-04-19 17:32:10 +00:00
Rafael Espindola f4d6e8caea Simplify Repl handling.
Now that we don't ICF synthetic sections, we can go back to the old
logic on whose responsibility it is to check Repl.

The idea is that Sec->something() will not check Repl. It is the
responsibility of the caller to find the correct Sec.

llvm-svn: 330346
2018-04-19 17:26:50 +00:00
Krzysztof Parzyszek fbee8574ab [if-converter] Handle BBs that terminate in ret during diamond conversion
This fixes https://llvm.org/PR36825.

Original patch by Valentin Churavy (D45218).

Differential Revision: https://reviews.llvm.org/D45731

llvm-svn: 330345
2018-04-19 17:26:46 +00:00
Krzysztof Parzyszek 2a9a83cd3f [Hexagon] Use legal types when lowering CONCAT_VECTORS via BUILD_VECTOR
llvm-svn: 330344
2018-04-19 17:11:58 +00:00
Francis Visoiu Mistrih dca79d2867 [llvm-objdump] Remove test object file
Forgot to remove it from the previous commit.

llvm-svn: 330343
2018-04-19 17:05:03 +00:00
Francis Visoiu Mistrih 1834682b97 [llvm-objdump] Print "..." instead of random data for virtual sections
When disassembling with -D, skip virtual sections by printing "..." for
each symbol.

This patch also implements `MachOObjectFile::isSectionVirtual`.

Test case comes from:

```
.zerofill __DATA,__common,_data64unsigned,472,3
```

Differential Revision: https://reviews.llvm.org/D45824

llvm-svn: 330342
2018-04-19 17:02:57 +00:00
Teresa Johnson aa94393ec5 [gold/ThinLTO] Invoke llvm_shutdown when exiting after ThinLTO indexing
Summary:
Instead of manually invoking PrintStatistics, simply invoke
llvm_shutdown which will take care of destroying managed statics, and as
a side effect will destroy the StatisticInfo ManagedStatic, invoking
PrintStatistics when needed.

Reviewers: fhahn

Subscribers: inglorion, llvm-commits

Differential Revision: https://reviews.llvm.org/D45820

llvm-svn: 330341
2018-04-19 16:55:13 +00:00
Rafael Espindola aded409325 Simplify getOffset for synthetic sections.
We had a single symbol using -1 with a synthetic section. It is
simpler to just update its value.

This is not a big will by itself, but will allow having a simple
getOffset for InputSeciton.

llvm-svn: 330340
2018-04-19 16:54:30 +00:00
Rafael Espindola 6275a7aa39 Rename MergeInputSection::getOffset.
Unlike the getOffset in the base class, this one computes the offset
in the parent synthetic section, not the final output section.

llvm-svn: 330339
2018-04-19 16:05:07 +00:00
Steven Wu 79cbd1163a [CXX] Templates specialization visibility can be wrong
Summary:
Under some conditions, LinkageComputer can get the visibility for
ClassTemplateSpecializationDecl wrong because it failed to find the Decl
that has the explicit visibility.

This fixes:
llvm.org/bugs/pr36810
rdar://problem/38080953

Reviewers: rsmith, arphaman, doug.gregor

Reviewed By: doug.gregor

Subscribers: doug.gregor, cfe-commits

Differential Revision: https://reviews.llvm.org/D44670

llvm-svn: 330338
2018-04-19 15:46:43 +00:00
Mark Searles 1bc6e71f32 [AMDGPU] Do not only rely on BB number when finding bottom loop
We should also check that the "bottom" basic block of a loopis a successor of the "header" basic block, otherwise we don't propagate the information correctly when the CFG is complex. This fixes an important rendering problem with Wolfsentein 2, because of one vector-memory wait was missing.

Differential Revision: https://reviews.llvm.org/D43831

llvm-svn: 330337
2018-04-19 15:42:30 +00:00
Ivan A. Kosarev 9b20c245ca [NEON] Define vfma_n_f32() and vfmaq_n_f32() intrinsics in AArch32 mode
Differential Revision: https://reviews.llvm.org/D45670

llvm-svn: 330336
2018-04-19 15:27:28 +00:00
Simon Pilgrim f209321d61 [llvm-mca][X86] Add mmx instruction to btver2 resource tests
Useful to see scheduler class deltas against xmm equivalents

llvm-svn: 330335
2018-04-19 15:09:46 +00:00
Florian Hahn b789165e6b [NewGVN] Add ops as dependency if we cannot find a leader for ValueOp.
If those operands change, we might find a leader for ValueOp, which
could enable new phi-of-op creation.

This fixes a case where we missed creating a phi-of-ops node. With D43865
and this patch, bootstrapping clang/llvm works with -enable-newgvn, whereas
without it, the "value changed after iteration" assertion is triggered.

Reviewers: dberlin, davide

Reviewed By: dberlin

Differential Revision: https://reviews.llvm.org/D42180

llvm-svn: 330334
2018-04-19 15:05:47 +00:00
Krzysztof Parzyszek d92c37e090 [Hexagon] Generate code for vector bswap intrinsics
llvm-svn: 330333
2018-04-19 14:46:44 +00:00
Simon Pilgrim f21ace6cdd [X86][BtVer2] Remove SSE4A EXTRQ/EXTRQI InstRW overrides.
These are already handled identically by WriteALU.

llvm-svn: 330332
2018-04-19 14:38:36 +00:00
Erich Keane b127a39404 Fix __attribute__((force_align_arg_pointer)) misalignment bug
The force_align_arg_pointer attribute was using a hardcoded 16-byte
alignment value which in combination with -mstack-alignment=32 (or
larger) would produce a misaligned stack which could result in crashes
when accessing stack buffers using aligned AVX load/store instructions.

Fix the issue by using the "stackrealign" function attribute instead
of using a hardcoded 16-byte alignment.

Patch By: Gramner

Differential Revision: https://reviews.llvm.org/D45812

llvm-svn: 330331
2018-04-19 14:27:05 +00:00
Krzysztof Parzyszek 23bcf06a15 [Hexagon] Add/fix patterns for 32/64-bit vector compares and logical ops
llvm-svn: 330330
2018-04-19 14:24:31 +00:00